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21 Commits

Author SHA1 Message Date
Joel Stanley
d916109169 ARM: dts: aspeed: ast2600evb: Fix compatible string 
The AST2600 EVB is not an A1.

Signed-off-by: Joel Stanley <joel@jms.id.au>
 2022-09-28 12:31:40 +09:30
Cédric Le Goater
da41645f11 ARM: dts: aspeed: ast2600-evb: Enable Quad SPI RX tranfers 
Now that the pinctrl definitions of the ast2600 SoC have been fixed,
see commit 925fbe1f7e ("dt-bindings: pinctrl: aspeed-g6: add FWQSPI
function/group"), it is safe to activate QSPI on the ast2600 evb.

Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20220603073705.1624351-1-clg@kaod.org
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2022-09-28 12:31:40 +09:30
Joel Stanley
9deb10cf16 ARM: dts: aspeed: ast2600-evb: Update I2C devices 
The AST2600A3 EVB has the following I2C devices:

 - ADT7490 at 0x2e
 - EEPROM at 0xa0
 - LM75 at 0x9a

The bus these devices appear on can be configured by jumpers. The device
tree is configured with the buses given by the default jumper settings.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Link: https://lore.kernel.org/r/20220623094717.3873328-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2022-08-18 16:24:04 +10:00
Krzysztof Kozlowski
aa5e062085 ARM: dts: ast2600-evb: fix board compatible 
The AST2600 EVB board should have dedicated compatible.

Fixes: 2ca5646b5c ("ARM: dts: aspeed: Add AST2600 and EVB")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220529104928.79636-5-krzysztof.kozlowski@linaro.org
 2022-06-22 12:16:44 +02:00
Joel Stanley
8dc7aa0a72 ARM: dts: aspeed: ast2600-evb: Enable GFX device 
Enable the GFX device with a framebuffer memory region.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220302024930.18758-3-tommy_huang@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2022-05-19 17:18:56 +09:30
Howard Chiu
0ef77237c5 ARM: dts: aspeed: ast2600-evb: Enable virtual hub 
Enable Aspeed VHub for HID emulation

Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com>
Link: https://lore.kernel.org/r/SG2PR06MB23155E8A6193118544A7DBF3E61E9@SG2PR06MB2315.apcprd06.prod.outlook.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2022-05-19 17:14:20 +09:30
Howard Chiu
08daf2c891 ARM: dts: aspeed: ast2600-evb: Enable video engine 
Enable video engine and reserve memory for it.

Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com>
Link: https://lore.kernel.org/r/SG2PR06MB23159B914BF7EF937FEDD2B5E61E9@SG2PR06MB2315.apcprd06.prod.outlook.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2022-05-19 17:13:25 +09:30
Howard Chiu
4d338ee40b ARM: dts: aspeed: ast2600-evb: Enable RX delay for MAC0/MAC1 
Since mac0/1 and mac2/3 are physically located on different die,
they have different properties by nature, which is mac0/1 has smaller delay step.

The property 'phy-mode' on ast2600 mac0 and mac1 is recommended to set to 'rgmii-rxid'
which enables the RX interface delay from the PHY chip.
Refer page 45 of SDK User Guide v08.00
https://github.com/AspeedTech-BMC/openbmc/releases/download/v08.00/SDK_User_Guide_v08.00.pdf

Fixes: 2ca5646b5c ("ARM: dts: aspeed: Add AST2600 and EVB")
Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com>
Link: https://lore.kernel.org/r/SG2PR06MB23152A548AAE81140B57DD69E6E09@SG2PR06MB2315.apcprd06.prod.outlook.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2022-05-19 13:04:54 +09:30
Troy Lee
8dec60e7b8 ARM: dts: aspeed: Grow u-boot partition 64MiB OpenBMC flash layout 
Aspeed AST2600 u-boot requires 600KiB+ flash space. Sharing the same
openbmc-flash-layout-64.dtsi requires to resize the flash partition.

The updated flash layout as follows:
- u-boot: 896 KiB
- u-boot-env: 128 KiB
- kernel: 9MiB
- rofs: 32 MiB
- rwfs: 22 MiB

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210316085932.2601-1-troy_lee@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2021-06-03 16:19:50 +09:30
Steven Lee
2c042ff716 ARM: dts: aspeed: ast2600evb: Add phase correction for emmc controller. 
Set MMC timing-phase register by adding the phase correction binding in the
device tree.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210524073308.9328-3-steven_lee@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2021-05-25 17:10:05 +09:30
Steven Lee
47b99d02bd ARM: dts: aspeed: ast2600evb: Add sdhci node and gpio regulator for A2 evb. 
AST2600 A2 (or newer) EVB has gpio regulators for toggling signal voltage
between 3.3v and 1.8v, the patch adds sdhci node and gpio regulator in
the dts file and adds comment for describing the reference design.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210524073308.9328-2-steven_lee@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2021-05-25 17:09:39 +09:30
Ryan Chen
a74c6525f1 ARM: dts: aspeed: ast2600evb: Add enable ehci and uhci 
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Link: https://lore.kernel.org/r/20201009024937.11246-4-ryan_chen@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2021-02-10 21:21:36 +10:30
Joel Stanley
2ba56f464f ARM: dts: aspeed: ast2600evb: Add MAC0 
MAC0 was not functional in the AST2600A0 SoC. This has been resolved
with the A1, so allow use of this port on EVBs with the A1 and
subsequent revisions.

A0 EVBs will still boot with this change, but the first Ethernet device
will not be functional.

Signed-off-by: Joel Stanley <joel@jms.id.au>
 2020-11-19 22:31:18 +10:30
Joel Stanley
b2fa526ca2 ARM: dts: aspeed: ast2600evb: Enable FSI master 
Use the first FSI master.

Signed-off-by: Joel Stanley <joel@jms.id.au>
 2020-05-05 16:37:15 +09:30
Joel Stanley
ea4bb33a9d ARM: dts: aspeed: ast2600evb: Enable i2c buses 
With the exception of i2c10 and i2c11 which conflict with the pins
for the third and forth MDIO controllers.

i2c0 has an ADT7490 fan controller/thermal monitor device connected. The
devicetree describes an adt74490 on i2c0, however bus that it appears on
depends on jumper settings, so it may not be present on all EVBs. It is
included to assist testing of I2C.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2019-11-07 21:23:38 +10:30
Joel Stanley
a750904577 ARM: dts: ast2600evb: Enable UART workaround 
The UART has an issue on A0 that can be worked around by using the
Synopsis driver.

Tested-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2019-11-01 20:54:45 +10:30
Andrew Jeffery
ad5d102784 ARM: dts: ast2600-evb: Add pinmux properties for enabled MACs 
All 2600-evb MACs use RGMII/MDIO.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2019-11-01 15:33:20 +10:30
Joel Stanley
a45d88725d ARM: dts: aspeed: ast2600evb: Use custom flash layout 
The AST2600 u-boot and kernel images have outgrown the OpenBMC layout.
While BMC machines use 128MB SPI NOR chips, we only have 64MB on the EVB
so use a layout that has a smaller region for the ro and rw filesystems.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2019-11-01 15:33:20 +10:30
Cédric Le Goater
6700acf666 ARM: dts: ast2600-evb: Enable FMC and SPI devices 
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2019-11-01 15:33:20 +10:30
Andrew Jeffery
311b57f051 ARM: dts: ast2600-evb: eMMC configuration 
Enable the eMMC controller and limit it to 52MHz to avoid the host
controller reporting bus error conditions.

Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2019-11-01 15:29:48 +10:30
Joel Stanley
2ca5646b5c ARM: dts: aspeed: Add AST2600 and EVB 
The AST2600 is a new SoC by ASPEED. It contains a dual core Cortex A7
CPU and shares many periperhals with the existing AST2400 and AST2500.

Link: https://lore.kernel.org/r/20190911165614.31641-1-joel@jms.id.au
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2019-09-12 12:05:08 +02:00