Add 1v1, 1v8 and 3v3 PWR regulators on stm32mp131. Temporary add them
as fixed regulators, waiting for full SCMI regulators support.
This is a precursor patch to enable USB support on STM32MP13.
Note: USB support requires these regulators to be enabled before
entering kernel.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add ADC1 and ADC2 support to STM32MP13 SoC family.
The STM32MP131 provides only ADC2, while other STM32MP13 SoCs provide
both ADC1 and ADC2.
Internal channels support limitations:
- VREFINT internal channel requires calibration data from OTP memory.
The nvmem properties used to access OTP are not defined for time being,
as OTP support is not yet enabled.
- VBAT internal channel is not defined by default in SoC DT, and
has be defined in board DT when needed, instead. This avoids unwanted
current consumption on battery, when ADC conversions are performed
on any other channels.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The pl18x MMCI driver does not use the interrupt-names property,
the binding document has been updated to recommend this property
be unused, remove it.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Current internal optee version enables ASYNc notif and in suche case
interrupt is mandatory in optee node.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The recent addition pinctrl.yaml in commit c09acbc499 ("dt-bindings:
pinctrl: use pinctrl.yaml") resulted in some node name warnings.
Fix the node names to the preferred 'pinctrl'.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP13 is a single core A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Marc Zyngier <maz@kernel.org>
As EXTI/GIC mapping has changed between STM32MP15 and STM32MP13, a new
compatible is needed to choose mp13 mapping table in stm32-exti driver.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
MDMA on STM32MP13x SoCs is the same than on STM32MP15x SoCs: it offers up
to 32 channels and supports 48 requests.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA1 and DMA2 on STM32MP13x SoCs are the same than on STM32MP15x SoCs: they
offer up to 8 channels and request lines are routed through DMAMUX1.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
STM32MP13 embeds 2 instances of SDMMC peripheral.
Add the required information in SoC device tree file.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
On STM32MP13, the embedded SDMMC peripheral version is v2.2.
Update arm,primecell-periphid for SDMMC in the SoC DT file.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The max-frequency limitation is due to IOs.
On STM32MP13, it is 130MHz. Update the corresponding property.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
To align with bootloaders device tree files, and thanks to what was
added in yaml file [1], the compatible property for sdmmc1 node is
updated with "st,stm32-sdmmc2" string.
[1] commit 552bc46484 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
compatible")
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
