For Tegra30 Pegatron Chagall, the sdmmc3_dat3_pb5 pin was defined
multiple times, leading to a DT validation error. Remove the duplicate
entry.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some boards are using the interrupt-parent property to point at the GPIO
controller since it handles the interrupts for the GPIO keys. However, a
node needs an interrupts property for interrupt-parent to be meaningful,
which these boards don't have.
gpio-keys in these cases will directly use the GPIO lines specified in
the key definitions and rely on the implicit conversion of those GPIOs
to interrupts by the operating system, so explicit specification of the
interrupts is not required.
Remove the unnecessary interrupt-parent properties.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename the unknown nvidia,ioreset property to nvidia,io-reset, as
specified in the DT bindings and supported by the driver.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra124 Nyan and Venice 2 boards were missing the required power-supply
property in their display panel device tree nodes. Add these properties
to fix validation errors.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Pinmux node names should have a pinmux- prefix and not use underscores.
Fix up some cases that didn't follow those rules.
Signed-off-by: Thierry Reding <treding@nvidia.com>
MCP23017 is an IO expander offering 16 input/output port expander with
interrupt output.
On stm32mp135f-dk, only INTA is routed (on PG12), but MCP23017 can mirror
the bank B interrupts on INTA, that's why the property microchip,irq-mirror
is used.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
i.MX fixes for 6.1, 2nd round:
- Switch to usb-role-switch for fixing USB device mode on
tqma8mqml-mba8mx board, so that Dual Role is fully functional.
- A series from Marek Vasut to fix dt-schema warning caused by NAND
controller size-cells.
- Fix file permission of imx93-pinfunc header.
- Enable OCOTP clock in soc-imx8m driver to fix a kexec kernel hang
issue.
* tag 'imx-fixes-6.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx8m: Enable OCOTP clock before reading the register
arm64: dts: imx93-pinfunc: drop execution permission
arm64: dts: imx8mn: Fix NAND controller size-cells
arm64: dts: imx8mm: Fix NAND controller size-cells
ARM: dts: imx7: Fix NAND controller size-cells
arm64: dts: imx8mm-tqma8mqml-mba8mx: Fix USB DR
Link: https://lore.kernel.org/r/20221116090402.GA1274@T480
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As many other Allwinner SoCs from the last years, the first USB host
controller pair in the Allwinner H3 and H5 chips share a USB PHY with
the MUSB OTG controller. This is probably the reason why we didn't have
a "phys" property in those host controller nodes.
This works fine as long as the MUSB controller driver is loaded, as this
takes care of the proper PHY setup, including the muxing between MUSB
and the HCI.
However this requires the MUSB driver to be enabled and loaded, and also
upsets U-Boot, which cannot use a HCI port without a "phys" property.
Similar to what we did in commit cc72570747 ("arm64: dts: allwinner:
A64: properly connect USB PHY to port 0"), add the "phys" property to
the OHCI0 and EHCI0 DT nodes in the shared H3/H5 .dtsi file.
This is not only the proper description of the hardware, but also avoids
a nasty error message in U-Boot triggered by a recent patch. (The port
never worked in host mode, but the error was suppressed due to a bug.)
When using the MUSB port in OTG mode, this also fixes host mode
switching, so people can use OTG adapters to connect a USB device to
port 0.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221110005507.19464-1-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The Allwinner F1C100s series of SoCs contain a LRADC (aka. KEYADC)
compatible to the version in other SoCs.
The manual doesn't mention the ratio of the input voltage that is used,
but comparing actual measurements with the values in the register
suggests that it is 3/4 of Vref.
Add the DT node describing the base address and interrupt. As in the
older SoCs, there is no explicit reset or clock gate, also there is a
dedicated, non-multiplexed pin, so need for more properties.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-8-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The CIR (infrared receiver) controller in the Allwinner F1C100s series
of SoCs is compatible to the ones used in other Allwinner SoCs.
Add the DT node describing the resources of the controller.
There are multiple possible pinmuxes, but none as them seem to be an
obvious choice, so refrain from adding any pincontroller subnodes for
now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-7-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The clock source and the sched_clock provided by the arm_global_timer
on Rockchip rk3066a/rk3188 are quite unstable because their rates
depend on the CPU frequency.
Recent changes to the arm_global_timer driver makes it impossible to use.
On the other side, the arm_global_timer has a higher rating than the
ROCKCHIP_TIMER, it will be selected by default by the time framework
while we want to use the stable Rockchip clock source.
Keep the arm_global_timer disabled in order to have the
DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/f275ca8d-fd0a-26e5-b978-b7f3df815e0a@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Some Ux500 DTS updates for v6.2:
- Some cleanups from Krzysztof for the SPI nodes.
- Fix up the NFC chip in Janice.
- Drop a bogus power domain regulator that isn't used for
the crypto blocks. (We use proper power domains now.)
- Add GPS to the Kyle.
* tag 'ux500-dts-for-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Add GPS to the Kyle
ARM: dts: DBx500 cryp and hash uses power domain
ARM: dts: ux500: Fix up the Janice NFC chip
ARM: dts: ste: ux500: align SPI node name with dtschema
Link: https://lore.kernel.org/r/CACRpkdaXmmZWsGdTG5tqNragkoefcTeUHjR+ZwNyNaa0S7s-7Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The SPEAr600 has three Synchronous serial port to enables synchronous
serial communication with slave or master peripherals (SPI). Lets add these
nodes to be able to use them.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Interrupt 12 of the Interrupt controller belongs to the SMI controller,
the right one for the display controller is the interrupt 13.
Fixes: 8113ba917d ("ARM: SPEAr: DT: Update device nodes")
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
AT91 DT for 6.2
It contains:
- interrupt support for ethernet PHYs on pcb8290 board
- thermal management support for SAMA7G5 by adding OTP controller
(that keeps temperature sensor calibration data), proper ADC
bindings and describing thermal zones
- securam node from SAMA7G5 is now described with generic name (sram)
- remove of status = "okay" from SAM9X60-EK regulators
* tag 'at91-dt-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sam9x60ek: remove status = "okay" for regulators
ARM: dts: at91: sama7g5: use generic name for securam
ARM: dts: at91: sama7g5: add thermal zones node
ARM: dts: at91: sama7g5: add temperature sensor
ARM: dts: at91: sama7g5: add cells for temperature calibration
ARM: dts: at91: sama7g5: add io-channel-cells to adc node
ARM: dts: at91: sama7g5: add otpc node
ARM: dts: lan966x: Add interrupt support for PHYs on pcb8290
Link: https://lore.kernel.org/r/20221110115431.180908-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
AT91 fixes for 6.1
It contains:
- signal name fix for a pin on SAMA7G5
- memory self-refresh fix for SAMA7G5 by avoid soft resetting AC
DLL which can introduce glitches in RAM controller and lead to
unexpected behavior
- led support fix for lan966x-pcb8291 board by enabling sgpio node
* tag 'at91-fixes-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: pm: avoid soft resetting AC DLL
ARM: dts: lan966x: Enable sgpio on pcb8291
ARM: dts: at91: sama7g5: fix signal name of pin PB2
Link: https://lore.kernel.org/r/20221110115411.180876-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the touchscreen now, since the driver is available.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
If not specified, the mmc0 and mmc1 devices will be the devices
mmc@2190000 and mmc@2194000, which are in disabled state on the iMX.6
Sabrelite devices.
The actual SD card reader devices are the ones at mmc@2198000 and
mmc@219c000.
Set aliases to use the correct mmc devices order.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It was discovered that the watchdog triggers when the device is put into
"Suspend-To-Idle"/"freeze" low-power mode. Setting WDW bit disables
watchdog when the device is put into WAIT mode.
Signed-off-by: Andrej Picej <andrej.picej@norik.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The NAND controller size-cells should be 0 per DT bindings.
Fix the following warning produces by DT bindings check:
"
nand-controller@33002000: #size-cells:0:0: 0 was expected
nand-controller@33002000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
"
Fix the missing space in node name too.
Fixes: e7495a45a7 ("ARM: dts: imx7: add GPMI NAND and APBH DMA")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The usage of the label property for gpio-leds has been deprecated
a long time ago. In bcm2835-rpi.dtsi the ACT LED uses such a label
and derive it to almost every Raspberry Pi board. Since we cannot break
userspace interface this property must be kept. But we can move the
ACT LED into a separate dtsi and include them from the board files.
This change have two benefits:
- with both new refs it's now clear the LED part is included from a dtsi
- new boards do not include the deprecated stuff automatically
Reported-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/20221110173105.6633-3-stefan.wahren@i2se.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
TP-Link routers have flash space partitioned according to the partitions
table. It may look like fixed partitioning but those partitions can be
actually reorganized. New can be added (or some removed), offsets and
sizes may change.
Fix DT to use binding for the TP-Link SafeLoader partitioning method.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20221108110708.13693-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
According to the commit log of the commit 3ac395a5b3 ("ARM: dts:
bcm283x: Use firmware PM driver for V3D"), the initial intent behind the
bcm2835-rpi-common DTSI was to share data between the RaspberryPies
based on the BCM2835, 36 and 37.
However, it was included by these SoCs' main DTSI. This is creating an
improper layering.
On top of that, bcm2835.dtsi is being included by bcm2711.dtsi, which
means that, even though the bcm2835-rpi-common DTSI wasn't actually
meant to contain data for the BCM2711, it actually leaks into the
BCM2711 DTSI.
In order to remove both issues, let's remove the include of
bcm2835-rpi-common.dtsi from bcm283{5-7}.dtsi and put them into the
bcm283{6,7}-rpi.dtsi.
BCM2835 has to be handled with special care due to the fact that
bcm2835.dtsi is being included by bcm2711.dtsi. Thus, we chose to
include bcm2835-rpi-common.dtsi directly into the board DTS. This will
be more error-prone, but given that it's a fairly old SoC by now, the
chance that we will get more BCM2835 boards is fairly low.
BCM2711 isn't modified since the content of bcm2835-rpi-common.dtsi was
only a power-domain for the v3d that was overridden anyway.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221026-rpi-display-fw-clk-v1-1-5c29b7a3d8b0@cerno.tech
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Remove the regulators node and define fixed regulators in the root node.
Prevents the sdhci-omap driver from waiting in probe deferral forever
because of the missing vmmc-supply and keeps am335x-pcm-953 consistent with
the other Phytec AM335 boards.
Fixes: bb07a829ec ("ARM: dts: Add support for phyCORE-AM335x PCM-953 carrier board")
Signed-off-by: Dominik Haller <d.haller@phytec.de>
Message-Id: <20221011143115.248003-1-d.haller@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Similar to commit a6c30873ee ("ARM: 8989/1: use .fpu assembler
directives instead of assembler arguments").
GCC and GNU binutils support setting the "sub arch" via -march=,
-Wa,-march, target function attribute, and .arch assembler directive.
Clang was missing support for -Wa,-march=, but this was implemented in
clang-13.
The behavior of both GCC and Clang is to
prefer -Wa,-march= over -march= for assembler and assembler-with-cpp
sources, but Clang will warn about the -march= being unused.
clang: warning: argument unused during compilation: '-march=armv6k'
[-Wunused-command-line-argument]
Since most assembler is non-conditionally assembled with one sub arch
(modulo arch/arm/delay-loop.S which conditionally is assembled as armv4
based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is
conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the
.arch assembler directive.
Add a few more instances found in compile testing as found by Arnd and
Nathan.
Link: 1d51c699b9
Link: https://bugs.llvm.org/show_bug.cgi?id=48894
Link: https://github.com/ClangBuiltLinux/linux/issues/1195
Link: https://github.com/ClangBuiltLinux/linux/issues/1315
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
