Ville Syrjälä
882ecff709
drm/i915: Use intel_crtc_needs_modeset() more
...
Prefer our own intel_crtc_needs_modeset() wrapper to
drm_atomic_crtc_needs_modeset() whenever we are dealing
with the intel_ types instead of drm_ types. Makes things
a bit neater in general.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221031214037.1636-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-11-03 18:25:47 +02:00
Ville Syrjälä
d5c45330c8
drm/i915: Simplify modifier lookup in watermark code
...
Replace the huge modifier lists in the watermark code with
a few calls to intel_fb.c.
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-7-ville.syrjala@linux.intel.com
2022-10-03 18:45:41 +03:00
Ville Syrjälä
334810f820
drm/i915: Fix watermark calculations for DG2 CCS+CC modifier
...
Take the DG2 CCS+CC modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
tile-4 modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: 680025dcc4 ("drm/i915/dg2: Add support for DG2 clear color compression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-6-ville.syrjala@linux.intel.com
2022-10-03 18:45:38 +03:00
Ville Syrjälä
f25d9f81a8
drm/i915: Fix watermark calculations for DG2 CCS modifiers
...
Take the DG2 CCS modifiers into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking these
tile-4 modifiers are linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: 4c3afa7213 ("drm/i915/dg2: Add support for DG2 render and media compression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-5-ville.syrjala@linux.intel.com
2022-10-03 18:45:33 +03:00
Ville Syrjälä
a627455bbe
drm/i915: Fix watermark calculations for gen12+ CCS+CC modifier
...
Take the gen12+ CCS+CC modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: d1e2775e9b ("drm/i915/tgl: Add Clear Color support for TGL Render Decompression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-4-ville.syrjala@linux.intel.com
2022-10-03 18:45:30 +03:00
Ville Syrjälä
91c9651425
drm/i915: Fix watermark calculations for gen12+ MC CCS modifier
...
Take the gen12+ MC CCS modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
v2: Split RC CCS vs. MC CCS to separate patches
Cc: stable@vger.kernel.org
Fixes: 2dfbf9d287 ("drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media engine")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-3-ville.syrjala@linux.intel.com
2022-10-03 18:45:26 +03:00
Ville Syrjälä
a89a96a586
drm/i915: Fix watermark calculations for gen12+ RC CCS modifier
...
Take the gen12+ RC CCS modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
v2: Split RC CCS vs. MC CCS to separate patches
Cc: stable@vger.kernel.org
Fixes: b3e57bccd6 ("drm/i915/tgl: Gen-12 render decompression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-2-ville.syrjala@linux.intel.com
2022-10-03 18:45:17 +03:00
Ville Syrjälä
0c31611437
drm/i915: Add some debug prints for intel_modeset_all_pipes()
...
Print out on which pipes, and for what reason, we are forcing a
full modeset.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20220928060813.23264-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-09-30 16:01:28 +03:00
Radhakrishna Sripada
851d635a0b
drm/i915/mtl: Update MBUS_DBOX credits
...
Display version 14 platforms have different credits values
compared to ADL-P. Update the credits based on pipe usage.
v2: Simplify DBOX BW Credit definition(MattR)
v3:
- Simplify only pipe per dbuf bank check(MattR)
- Skip modeset check to handle the case when a new pipe within
dbuf bank gets added/removed.(MattR)
Bspec: 49213
Cc: Jose Roberto de Souza <jose.souza@intel.com >
Cc: Matt Roper <matthew.d.roper@intel.com >
Original Author: Caz Yokoyama
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20220913183341.908028-5-radhakrishna.sripada@intel.com
2022-09-14 14:50:33 -07:00
Jani Nikula
c73cdd12de
drm/i915/ipc: use intel_uncore_rmw() to enable/disable
...
Don't duplicate the rmw function.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/113a17cd18401b0e4c83396575b67aa6efb07346.1662983005.git.jani.nikula@intel.com
2022-09-13 19:55:12 +03:00
Jani Nikula
70296670f6
drm/i915/display: move IPC under display wm sub-struct
...
Move display IPC related member under drm_i915_private display
sub-struct.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/04ccaaceee9293e5a6c75761ba9d36792c36f095.1662983005.git.jani.nikula@intel.com
2022-09-13 19:55:08 +03:00
Jani Nikula
62a21a7c6a
drm/i915/ipc: register debugfs only if IPC available
...
It looks like trying to enable IPC via debugfs on platforms that don't
have IPC resulted in dmesg info message about IPC being enabled, which
is clearly not possible and would not happen.
Seems sensible to register IPC debugfs only on platforms that have IPC.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/b18edb4f96c9d2ec728ef04e6f99d161fe5641d1.1662983005.git.jani.nikula@intel.com
2022-09-13 19:55:05 +03:00
Jani Nikula
dde01ed5b0
drm/i915/ipc: move IPC debugfs to skl_watermark.c
...
Follow the new direction for debugfs files, moving the details where the
implementation is. It seems quite natural skl_watermark.c is the place
that controls IPC details, even for debugfs, not
intel_display_debugfs.c.
Rename the functions and convert dev_priv->i915 while at it.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/9d59b18f5dc06e86a48c1ce0f40d625f51e3e85a.1662983005.git.jani.nikula@intel.com
2022-09-13 19:55:01 +03:00
Jani Nikula
23fbdb07d6
drm/i915/ipc: refactor and rename IPC functions
...
Rename the IPC functions to have skl_watermark_ipc_ prefix, rename
enable to update to reflect what the function actually does, and add
enabled function to abstract direct ->ipc_enabled access for state
query.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/536237d5bc919e8c97a96796f235f5bb264ceff2.1662983005.git.jani.nikula@intel.com
2022-09-13 19:54:46 +03:00
Radhakrishna Sripada
825477e779
drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailbox
...
From Meteorlake, Latency Level, SAGV bloack time are read from
LATENCY_SAGV register instead of the GT driver pcode mailbox. DDR type
and QGV information are also to be read from Mem SS registers.
v2:
- Simplify MTL_MEM_SS_INFO_QGV_POINT macro(MattR)
- Nit: Rearrange the bit def's from higher to lower(MattR)
- Restore platform definition for ADL-P(MattR)
- Move back intel_qgv_point def to intel_bw.c(Jani)
v3:
- Rebase
Bspec: 64636, 64608
Cc: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Original Author: Caz Yokoyama
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-9-radhakrishna.sripada@intel.com
2022-09-12 15:25:19 -07:00
Ville Syrjälä
3fecf93c86
drm/i915: Use REG_FIELD_GET() to extract skl+ wm latencies
...
Replace the hand rolled stuff with REG_FIELD_GET() for reading
out the skl+ watermark latencies.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20220908191646.20239-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-09-09 16:50:46 +03:00
Ville Syrjälä
42a0d25649
drm/i915: Extract skl_watermark.c
...
Pull all the skl+ watermark code (and the dbuf/sagv/ipc code
since it's all sort of intertwined and I'm too lazy to think
of a finer grained split right now) into its own file from the
catch-all intel_pm.c.
Also sneak in the s/dev_priv/i915/ rename while at it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20220908191646.20239-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2022-09-09 16:50:33 +03:00