Commit Graph

11658 Commits

Author SHA1 Message Date
Tim Harvey
07ce211afa arm64: dts: imx8mp-venice-gw74xx: add cpu-supply node for cpufreq
Add regulator config for cpu-supply in order to support cpufreq.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:54 +08:00
Tim Harvey
21e24d257f arm64: dts: imx8mp-venice-gw74xx: add USB DR support
Add support for USB DR on USB1 interface. Host/Device detection is done
using the usb-role-switch connector with a GPIO as USB1_OTG_ID is not
connected internally.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:54 +08:00
Peng Fan
a90a37bbea arm64: dts: imx93: add mediamix blk ctrl node
Add i.MX93 mediamix blk ctrl node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:54 +08:00
Peng Fan
e85d3458a8 arm64: dts: imx93: add src node
Add i.MX93 SRC node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:54 +08:00
Vladimir Oltean
5dfc7922ba arm64: dts: ls1028a-rdb: add more ethernet aliases
Commit "arm64: dts: ls1028a: enable swp5 and eno3 for all boards" which
Shawn declared as applied, but for which I can't find a sha1sum, has
enabled a new Ethernet port on the LS1028A-RDB (&enetc_port3), but
U-Boot, which passes a MAC address to Linux' device tree through the
/aliases node, fails to do this for this newly enabled port.

Fix that by adding more ethernet aliases in the only
backwards-compatible way possible: at the end of the current list.

And since it is possible to very easily convert either swp4 or swp5 to
DSA user ports now (which have a MAC address of their own), using these
U-Boot commands:

=> fdt addr $fdt_addr_r
=> fdt rm /soc/pcie@1f0000000/ethernet-switch@0,5/ports/port@4 ethernet

it would be good if those DSA user ports (swp4, swp5) gained a valid MAC
address from U-Boot as well. In order for that to work properly,
provision two more ethernet aliases for &mscc_felix_port{4,5} as well.

The resulting ordering is slightly unusual, but to me looks more natural
than eno0, eno2, swp0, swp1, swp2, swp3, eno3, swp4, swp5.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:31 +08:00
Joy Zou
d314fd245d arm64: dts: imx8mq: update sdma node name format
Node names should be generic, so change the sdma node name format 'sdma'
into 'dma-controller'.

Signed-off-by: Joy Zou <joy.zou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:31 +08:00
Peng Fan
aff77421f1 arm64: dts: imx93: add lpspi nodes
Add i.MX93 lpspi nodes

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:31 +08:00
Peng Fan
1225396fef arm64: dts: imx93: add lpi2c nodes
Add i.MX93 lpi2c nodes

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:30 +08:00
Peng Fan
b4aa33b3e5 arm64: dts: imx93: add a55 pmu
Add A55 PMU node for perf usage

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:30 +08:00
Peng Fan
000aed86e4 arm64: dts: imx93: add blk ctrl node
Add i.MX93 BLK CTRL MIX node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:30 +08:00
Peng Fan
0dfb380d24 arm64: dts: imx93: add s4 mu node
Add s4 mu node for sentinel communication

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:30 +08:00
Peng Fan
e41ba69571 arm64: dts: imx93: add gpio clk
Add the GPIO clk, otherwise GPIO may not work if clk driver disable the
GPIO clk during kernel boot.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:29 +08:00
Peng Fan
f2484a9470 arm64: dts: imx93: correct SDHC clk entry
DUMMY clk only works with clk_ignore_unused and bootloader enables those
clks that required for SDHC work properly.

Correct SDHC clk entry with real clk.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:29 +08:00
Alexander Stein
fb4f0b6956 arm64: dts: tqma8mpql: add USB DR support
Add support for USB DR on USB1 interface. Host/Device detection is done
using the usb-role-switch connector.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:29 +08:00
Philippe Schenker
63a71a9010 arm64: dts: verdin-imx8mm: introduce hdmi-connector
The Lontium LT8912B driver needs a HDMI connector to be connected to
port 1. Introduce this connector to be enabled in a device tree overlay.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:29 +08:00
Marcel Ziswiler
ac2ac9ff2d arm64: dts: verdin-imx8mm: add lvds panel node
Add an LVDS panel node to be extended by a device tree overlay.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:28 +08:00
Marcel Ziswiler
8728c63c10 arm64: dts: verdin-imx8mm: rename sn65dsi83 to sn65dsi84
Rename sn65dsi83 to sn65dsi84 as that is the exact chip used on the
Verdin DSI to LVDS Adapter.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:28 +08:00
Clark Wang
0acd1b1cf3 arm64: dts: imx8ulp: increase the clock speed of LPSPI
LPSPI transfer max speed is half of the root clock.
Increase the root clock speed to support faster data transmission.

And update the parent clock of all i2c/spi with IMX8ULP_CLK_FROSC_DIV2
which could produce accurate clock for i2c/spi usage.

Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:28 +08:00
Peng Fan
d2209e6584 arm64: dts: imx8ulp: add mailbox node
Add Sentinel Message Unit(MU), Generic MU nodes.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:28 +08:00
Peng Fan
ed4b58fa5a arm64: dts: imx8ulp: add pmu node
Add i.MX8ULP pmu node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Peng Fan
b2ca63697b arm64: dts: imx8ulp: correct the scmi sram node name
Follow sram/sram.yaml to update the sram node name.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Peng Fan
7e2c9e5146 arm64: dts: imx8ulp: drop undocumented property in cgc
The clocks and clocks-names are not documented in binding doc,
and the clk-imx8ulp driver not use the undocumented property,
so drop them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Martin Kepplinger
79d38f6b08 arm64: dts: imx8mq-librem5: fix mipi_csi description
Properties are not documented so lead to the following error:
'#address-cells', '#size-cells', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+'

Fix this by removing unneeded properties.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Angus Ainslie
2d43092e32 arm64: dts: imx8mq-librem5: add usb-role-switch property to dwc3
In order to enable (PD and data) role switching on the Librem 5 phone,
add the usb-role-switch property to imx8mq's dwc3 node.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Angus Ainslie
6ba73ecff0 arm64: dts: imx8mq-librem5: add USB type-c properties for role switching
Add the connector properties to the USB type-c stanza to enable (PD)
role-switching on the Librem 5 phone.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:26 +08:00
Sebastian Krzyszkowiak
6effe295e1 arm64: dts: imx8mq-librem5: Add bq25895 as max17055's power supply
This allows the userspace to notice that there's not enough
current provided to charge the battery, and also fixes issues
with 0% SOC values being considered invalid.

Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:26 +08:00
Guido Günther
c504745d82 arm64: dts: imx8mq-librem5: add RGB pwm notification leds
Describe the RGB notification leds on the Librem 5 phone.
Use the common defines so we're sure to adhere to the common patterns,
use predefined led colors and functions so we're being warned in case
of deprecations.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:26 +08:00
Martin Kepplinger
f00df2bdb5 arm64: dts: imx8mq-librem5: describe the voice coil motor for focus control
Describe the focus motor that will be used for the rear camera - even
though the rear camera sensor driver is not yet in the mainline. The
focus motor is a separate device and can be controlled already.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:26 +08:00
Vladimir Oltean
68ad0821fc arm64: dts: ls1028a: enable swp5 and eno3 for all boards
In order for the LS1028A based boards to benefit from support for
multiple CPU ports, the second DSA master and its associated CPU port
must be enabled in the device trees. This does not change the default
CPU port from the current port 4.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:25 +08:00
Vladimir Oltean
d72e3b4e76 arm64: dts: ls1028a: mark enetc port 3 as a DSA master too
The LS1028A switch has 2 internal links to the ENETC controller.

With DSA's ability to support multiple CPU ports, we should mark both
ENETC ports as DSA masters.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:25 +08:00
Vladimir Oltean
b340ee0263 arm64: dts: ls1028a: move DSA CPU port property to the common SoC dtsi
Since the CPU port 4 of the switch is hardwired inside the SoC to go to
the enetc port 2, this shouldn't be something that the board files need
to set (but whether that CPU port is used or not is another discussion).

So move the DSA "ethernet" property to the common dtsi.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:25 +08:00
Richard Zhu
d506505000 arm64: dts: imx8mp-evk: Add PCIe support
Add PCIe support on i.MX8MP EVK board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:25 +08:00
Richard Zhu
9e65987b95 arm64: dts: imx8mp: Add iMX8MP PCIe support
Add i.MX8MP PCIe support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:24 +08:00
Marcel Ziswiler
7db9905d48 arm64: dts: imx8ulp: no executable source file permission
This fixes the following error:

arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h: error: do not set
 execute permissions for source files

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:24 +08:00
Marek Vasut
4dcb6c0fef arm64: dts: imx8mp: Add SNVS LPGPR
Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store
e.g. boot counter.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:24 +08:00
Martyn Welch
f703b6026d arm64: dts: imx8mp-msc-sm2s: Add device trees for MSC SM2S-IMX8PLUS SoM and carrier board
Add device trees for one of a number of MSC's (parent company, Avnet)
variants of the SM2S-IMX8PLUS system on module along with the compatible
SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of SoMs use
the NXP i.MX8MP SoC and provide the SMARC module interface.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:24 +08:00
Jagan Teki
4d50d2bf0e arm64: dts: imx8mm: Fix typo in license text for Engicam boards
Fix the Amarula Solutions typo mistake in license text for Engicam
i.MX8M boards add in below commits.

commit <60ac35268f85b> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M
Mini SoM")
commit <aec8ad34f7f24> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M
Plus EDIMM2.2 Starter Kit")
commit <eefe06b295087> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M
Plus SoM")

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Peng Fan
b57f7d2141 arm64: dts: imx8-ss-dma: add IPG clock for i2c
i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk.

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Frieder Schrempf
de9618e84f arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-S
This adds support for the Kontron Electronics SL i.MX8MM OSM-S SoM
and the matching baseboard BL i.MX8MM OSM-S.

The SoM hardware complies to the Open Standard Module (OSM) 1.0
specification, size S (https://sget.org/standards/osm).

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Frieder Schrempf
b63791966e arm64: dts: imx8mm-kontron: Add SPI NOR partition layout
This is the layout used by the bootloader. Add it to the kernel
devicetree to make the same layout available in Linux and have
the devicetrees synced.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Frieder Schrempf
9cb41873f8 arm64: dts: imx8mm-kontron: Use voltage rail names from schematic for PMIC regulator-names
Improve the naming of the regulators to contain the voltage rail
names from the schematic.

Suggested-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Frieder Schrempf
3e44946da2 arm64: dts: imx8mm-kontron: Remove low DDRC operating point
For some reason there is a problem with finding a DDR configuration
that works on all operating points and all LPDDR4 types used on the
SoM. Therefore the bootloader currently doesn't configure the lowest
of the three operating points. Let's also skip this in the kernel
devicetree to make sure it isn't used.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:22 +08:00
Frieder Schrempf
eef2c0217e arm64: dts: imx8mm-kontron: Use the VSELECT signal to switch SD card IO voltage
It turns out that it is not necessary to declare the VSELECT signal as
GPIO and let the PMIC driver set it to a fixed high level. This switches
the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5
accordingly.

Instead we can do it like other boards already do and simply mux the
VSELECT signal of the USDHC interface to the pin. This makes sure that
the correct voltage is selected by setting the PMIC's SD_VSEL input
to high or low accordingly.

Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:22 +08:00
Frieder Schrempf
587c1fed72 arm64: dts: imx8mm-kontron: Adjust compatibles, file names and model strings
The official naming includes "SL" (SoM-Line) or "BL" (Board-Line).
By updating we make sure, that we can maintain this more easily in
future and make sure that the proper devicetree can be selected for
the hardware.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:22 +08:00
Peng Fan
a763d0cf29 arm64: dts: imx8mp: add VPU blk ctrl node
Add i.MX8MP VPU blk ctrl node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:22 +08:00
Peng Fan
df680992dd arm64: dts: imx8mp: add vpu pgc nodes
Add i.MX8MP PGC nodes for vpu, which are used to supply power for VPU.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:21 +08:00
Max Krummenacher
310dde60dd arm64: dts: imx8mp-verdin: add cpu-supply
Add the cpu-supply property to all CPU nodes to enable the cpufreq
driver.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:21 +08:00
Tim Harvey
8130fa7108 arm64: dts: imx8mm-venice-gw7903: add digital I/O ctl gpios
The GW7903-C revision introduced two additional GPIO's for controlling
the digital I/O direction. Add them.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:21 +08:00
Fabio Estevam
37bbb8b2f9 arm64: dts: imx8mm/n-venice-gw7902: Remove invalid property
The 'oscillator-frequency' property is not documented and it is
not used anywhere. Remove it.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:21 +08:00
Marek Vasut
dcc80ddbc3 arm64: dts: imx8mp: Add SoM compatible to i.MX8M Plus DHCOM PDK2
Add SoM compatible string into i.MX8MP DHCOM PDK2 compatible strings.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:20 +08:00