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673 Commits

Author SHA1 Message Date
Evan Quan
1887544d4d drm/amd/pm: correct the thermal alert temperature limit settings 
Do the maths in celsius degree. This can fix the issues caused
by the changes below:

drm/amd/pm: correct Vega20 swctf limit setting
drm/amd/pm: correct Vega12 swctf limit setting
drm/amd/pm: correct Vega10 swctf limit setting

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-26 16:40:19 -04:00
Alex Dewar
9ddcbf1f4c drm/amd/pm: use kmemdup() rather than kmalloc+memcpy 
Issue identified with Coccinelle.

Signed-off-by: Alex Dewar <alex.dewar90@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-26 16:40:19 -04:00
Evan Quan
bfcc0c162a drm/amd/pm: correct Vega20 swctf limit setting 
Correct the Vega20 thermal swctf limit.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-26 16:40:17 -04:00
Evan Quan
b23f9f6042 drm/amd/pm: correct Vega12 swctf limit setting 
Correct the Vega12 thermal swctf limit.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-26 16:40:17 -04:00
Evan Quan
7323923260 drm/amd/pm: correct Vega10 swctf limit setting 
Correct the Vega10 thermal swctf limit.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1267

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-26 16:40:17 -04:00
Luben Tuikov
4a580877bd drm/amdgpu: Get DRM dev from adev by inline-f 
Add a static inline adev_to_drm() to obtain
the DRM device pointer from an amdgpu_device pointer.

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-24 13:06:06 -04:00
Luben Tuikov
1348969ab6 drm/amdgpu: drm_device to amdgpu_device by inline-f (v2) 
Get the amdgpu_device from the DRM device by use
of an inline function, drm_to_adev(). The inline
function resolves a pointer to struct drm_device
to a pointer to struct amdgpu_device.

v2: Use a typed visible static inline function
    instead of an invisible macro.

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-24 13:06:06 -04:00
Jiansong Chen
6ec46653eb drm/amd/pm: set VCN pg per instances 
When deciding whether to set pg for vcn1, instances
number is more generic than chip name.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-24 13:06:05 -04:00
Jiansong Chen
66b8a9c0a7 drm/amd/pm: enable run_btc callback for sienna_cichlid 
DC BTC support for sienna_cichlid is added, it provides
the DC tolerance and aging measurements.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-24 12:23:38 -04:00
Alex Dewar
4c319bbebe drm/amd/pm: Remove unnecessary cast 
In init_powerplay_table_information() the value returned from kmalloc()
is cast unnecessarily. Remove cast.

Issue identified with Coccinelle.

Signed-off-by: Alex Dewar <alex.dewar90@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-24 12:23:29 -04:00
Wang Hai
26902e8c58 drm/amd/powerplay: remove duplicate include 
Remove asic_reg/nbio/nbio_6_1_offset.h which is included more than once

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wang Hai <wanghai38@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-24 12:23:25 -04:00
Dennis Li
53b3f8f40e drm/amdgpu: refine codes to avoid reentering GPU recovery 
if other threads have holden the reset lock, recovery will
fail to try_lock. Therefore we introduce atomic hive->in_reset
and adev->in_gpu_reset, to avoid reentering GPU recovery.

v2:
drop "? true : false" in the definition of amdgpu_in_reset

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-24 12:22:56 -04:00
Alex Deucher
367deb673c drm/amdgpu/pm: only hide average power on SI and pre-RENOIR APUs 
We can get this on RENOIR and newer via the SMU metrics
table.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:22:40 -04:00
Alex Deucher
b49dc928f5 drm/amdgpu/swsmu: implement power metrics for RENOIR 
Grab the data from the SMU metrics table.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:22:36 -04:00
Alex Deucher
61426114f2 drm/amdgpu/swsmu: implement voltage metrics for RENOIR 
Grab the data from the SMU metrics table.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:22:31 -04:00
Alex Deucher
d0eb1b5ceb drm/amdgpu/pm: remove duplicate check 
FAMILY_KV is APUs and we already check for APUs.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:22:24 -04:00
Evan Quan
5ce99853a6 drm/amd/pm: add SMU11 common deep sleep control interface 
Considering the same logic can be applied to Arcturus, Navi1X
and Sienna Cichlid.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:21:56 -04:00
Evan Quan
f0d51d20d9 drm/amd/pm: disable/enable deep sleep features on UMD pstate enter/exit 
Add deep sleep disablement/enablement on UMD pstate entering/exiting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:21:50 -04:00
Evan Quan
e988026fcf drm/amd/pm: add SMU11 common gfx ulv control interface 
Considering the same logic can be applied to Arcturus, Navi1X
and Sienna Cichlid.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:21:43 -04:00
Evan Quan
588a4d5c6a drm/amd/pm: disable/enable gfx ulv on UMD pstate enter/exit 
Add gfx ulv disablement/enablement on UMD pstate entering/exiting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:21:35 -04:00
Jiansong Chen
b109f61e7f drm/amd/pm: update driver if version for navy_flounder 
It's in accordance with pmfw 65.7.0 for navy_flounder.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-18 18:21:27 -04:00
Alex Deucher
2a25ba9787 drm/amdgpu: drop log message in amdgpu_dpm_baco_reset() 
The caller does this now for all reset types.  This is now
a duplicate call.

Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-14 17:03:20 -04:00
Evan Quan
e098bc9612 drm/amd/pm: optimize the power related source code layout 
The target is to provide a clear entry point(for power routines).
Also this can help to maintain a clear view about the frameworks
used on different ASICs. Hopefully all these can make power part
more friendly to play with.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-08-14 16:22:41 -04:00