mirror of
https://github.com/raspberrypi/linux.git
synced 2025-12-18 15:54:25 +00:00
Pull drm updates from Dave Airlie:
"This is the main drm pull request for v4.15.
Core:
- Atomic object lifetime fixes
- Atomic iterator improvements
- Sparse/smatch fixes
- Legacy kms ioctls to be interruptible
- EDID override improvements
- fb/gem helper cleanups
- Simple outreachy patches
- Documentation improvements
- Fix dma-buf rcu races
- DRM mode object leasing for improving VR use cases.
- vgaarb improvements for non-x86 platforms.
New driver:
- tve200: Faraday Technology TVE200 block.
This "TV Encoder" encodes a ITU-T BT.656 stream and can be found in
the StorLink SL3516 (later Cortina Systems CS3516) as well as the
Grain Media GM8180.
New bridges:
- SiI9234 support
New panels:
- S6E63J0X03, OTM8009A, Seiko 43WVF1G, 7" rpi touch panel, Toshiba
LT089AC19000, Innolux AT043TN24
i915:
- Remove Coffeelake from alpha support
- Cannonlake workarounds
- Infoframe refactoring for DisplayPort
- VBT updates
- DisplayPort vswing/emph/buffer translation refactoring
- CCS fixes
- Restore GPU clock boost on missed vblanks
- Scatter list updates for userptr allocations
- Gen9+ transition watermarks
- Display IPC (Isochronous Priority Control)
- Private PAT management
- GVT: improved error handling and pci config sanitizing
- Execlist refactoring
- Transparent Huge Page support
- User defined priorities support
- HuC/GuC firmware refactoring
- DP MST fixes
- eDP power sequencing fixes
- Use RCU instead of stop_machine
- PSR state tracking support
- Eviction fixes
- BDW DP aux channel timeout fixes
- LSPCON fixes
- Cannonlake PLL fixes
amdgpu:
- Per VM BO support
- Powerplay cleanups
- CI powerplay support
- PASID mgr for kfd
- SR-IOV fixes
- initial GPU reset for vega10
- Prime mmap support
- TTM updates
- Clock query interface for Raven
- Fence to handle ioctl
- UVD encode ring support on Polaris
- Transparent huge page DMA support
- Compute LRU pipe tweaks
- BO flag to allow buffers to opt out of implicit sync
- CTX priority setting API
- VRAM lost infrastructure plumbing
qxl:
- fix flicker since atomic rework
amdkfd:
- Further improvements from internal AMD tree
- Usermode events
- Drop radeon support
nouveau:
- Pascal temperature sensor support
- Improved BAR2 handling
- MMU rework to support Pascal MMU
exynos:
- Improved HDMI/mixer support
- HDMI audio interface support
tegra:
- Prep work for tegra186
- Cleanup/fixes
msm:
- Preemption support for a5xx
- Display fixes for 8x96 (snapdragon 820)
- Async cursor plane fixes
- FW loading rework
- GPU debugging improvements
vc4:
- Prep for DSI panels
- fix T-format tiling scanout
- New madvise ioctl
Rockchip:
- LVDS support
omapdrm:
- omap4 HDMI CEC support
etnaviv:
- GPU performance counters groundwork
sun4i:
- refactor driver load + TCON backend
- HDMI improvements
- A31 support
- Misc fixes
udl:
- Probe/EDID read fixes.
tilcdc:
- Misc fixes.
pl111:
- Support more variants
adv7511:
- Improve EDID handling.
- HDMI CEC support
sii8620:
- Add remote control support"
* tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux: (1480 commits)
drm/rockchip: analogix_dp: Use mutex rather than spinlock
drm/mode_object: fix documentation for object lookups.
drm/i915: Reorder context-close to avoid calling i915_vma_close() under RCU
drm/i915: Move init_clock_gating() back to where it was
drm/i915: Prune the reservation shared fence array
drm/i915: Idle the GPU before shinking everything
drm/i915: Lock llist_del_first() vs llist_del_all()
drm/i915: Calculate ironlake intermediate watermarks correctly, v2.
drm/i915: Disable lazy PPGTT page table optimization for vGPU
drm/i915/execlists: Remove the priority "optimisation"
drm/i915: Filter out spurious execlists context-switch interrupts
drm/amdgpu: use irq-safe lock for kiq->ring_lock
drm/amdgpu: bypass lru touch for KIQ ring submission
drm/amdgpu: Potential uninitialized variable in amdgpu_vm_update_directories()
drm/amdgpu: potential uninitialized variable in amdgpu_vce_ring_parse_cs()
drm/amd/powerplay: initialize a variable before using it
drm/amd/powerplay: suppress KASAN out of bounds warning in vega10_populate_all_memory_levels
drm/amd/amdgpu: fix evicted VRAM bo adjudgement condition
drm/vblank: Tune drm_crtc_accurate_vblank_count() WARN down to a debug
drm/rockchip: add CONFIG_OF dependency for lvds
...
715 lines
18 KiB
C
715 lines
18 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*
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*/
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#include <linux/kthread.h>
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#include <linux/wait.h>
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#include <linux/sched.h>
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#include <uapi/linux/sched/types.h>
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#include <drm/drmP.h>
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#include "gpu_scheduler.h"
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#define CREATE_TRACE_POINTS
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#include "gpu_sched_trace.h"
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static bool amd_sched_entity_is_ready(struct amd_sched_entity *entity);
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static void amd_sched_wakeup(struct amd_gpu_scheduler *sched);
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static void amd_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
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/* Initialize a given run queue struct */
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static void amd_sched_rq_init(struct amd_sched_rq *rq)
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{
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spin_lock_init(&rq->lock);
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INIT_LIST_HEAD(&rq->entities);
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rq->current_entity = NULL;
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}
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static void amd_sched_rq_add_entity(struct amd_sched_rq *rq,
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struct amd_sched_entity *entity)
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{
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if (!list_empty(&entity->list))
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return;
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spin_lock(&rq->lock);
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list_add_tail(&entity->list, &rq->entities);
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spin_unlock(&rq->lock);
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}
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static void amd_sched_rq_remove_entity(struct amd_sched_rq *rq,
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struct amd_sched_entity *entity)
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{
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if (list_empty(&entity->list))
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return;
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spin_lock(&rq->lock);
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list_del_init(&entity->list);
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if (rq->current_entity == entity)
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rq->current_entity = NULL;
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spin_unlock(&rq->lock);
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}
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/**
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* Select an entity which could provide a job to run
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*
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* @rq The run queue to check.
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*
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* Try to find a ready entity, returns NULL if none found.
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*/
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static struct amd_sched_entity *
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amd_sched_rq_select_entity(struct amd_sched_rq *rq)
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{
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struct amd_sched_entity *entity;
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spin_lock(&rq->lock);
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entity = rq->current_entity;
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if (entity) {
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list_for_each_entry_continue(entity, &rq->entities, list) {
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if (amd_sched_entity_is_ready(entity)) {
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rq->current_entity = entity;
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spin_unlock(&rq->lock);
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return entity;
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}
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}
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}
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list_for_each_entry(entity, &rq->entities, list) {
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if (amd_sched_entity_is_ready(entity)) {
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rq->current_entity = entity;
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spin_unlock(&rq->lock);
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return entity;
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}
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if (entity == rq->current_entity)
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break;
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}
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spin_unlock(&rq->lock);
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return NULL;
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}
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/**
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* Init a context entity used by scheduler when submit to HW ring.
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*
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* @sched The pointer to the scheduler
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* @entity The pointer to a valid amd_sched_entity
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* @rq The run queue this entity belongs
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* @kernel If this is an entity for the kernel
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* @jobs The max number of jobs in the job queue
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*
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* return 0 if succeed. negative error code on failure
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*/
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int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
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struct amd_sched_entity *entity,
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struct amd_sched_rq *rq,
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uint32_t jobs)
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{
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int r;
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if (!(sched && entity && rq))
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return -EINVAL;
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memset(entity, 0, sizeof(struct amd_sched_entity));
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INIT_LIST_HEAD(&entity->list);
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entity->rq = rq;
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entity->sched = sched;
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spin_lock_init(&entity->rq_lock);
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spin_lock_init(&entity->queue_lock);
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r = kfifo_alloc(&entity->job_queue, jobs * sizeof(void *), GFP_KERNEL);
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if (r)
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return r;
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atomic_set(&entity->fence_seq, 0);
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entity->fence_context = dma_fence_context_alloc(2);
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return 0;
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}
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/**
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* Query if entity is initialized
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*
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* @sched Pointer to scheduler instance
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* @entity The pointer to a valid scheduler entity
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*
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* return true if entity is initialized, false otherwise
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*/
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static bool amd_sched_entity_is_initialized(struct amd_gpu_scheduler *sched,
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struct amd_sched_entity *entity)
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{
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return entity->sched == sched &&
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entity->rq != NULL;
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}
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/**
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* Check if entity is idle
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*
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* @entity The pointer to a valid scheduler entity
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*
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* Return true if entity don't has any unscheduled jobs.
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*/
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static bool amd_sched_entity_is_idle(struct amd_sched_entity *entity)
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{
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rmb();
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if (kfifo_is_empty(&entity->job_queue))
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return true;
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return false;
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}
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/**
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* Check if entity is ready
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*
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* @entity The pointer to a valid scheduler entity
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*
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* Return true if entity could provide a job.
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*/
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static bool amd_sched_entity_is_ready(struct amd_sched_entity *entity)
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{
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if (kfifo_is_empty(&entity->job_queue))
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return false;
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if (READ_ONCE(entity->dependency))
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return false;
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return true;
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}
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/**
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* Destroy a context entity
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*
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* @sched Pointer to scheduler instance
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* @entity The pointer to a valid scheduler entity
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*
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* Cleanup and free the allocated resources.
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*/
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void amd_sched_entity_fini(struct amd_gpu_scheduler *sched,
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struct amd_sched_entity *entity)
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{
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int r;
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if (!amd_sched_entity_is_initialized(sched, entity))
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return;
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/**
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* The client will not queue more IBs during this fini, consume existing
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* queued IBs or discard them on SIGKILL
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*/
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if ((current->flags & PF_SIGNALED) && current->exit_code == SIGKILL)
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r = -ERESTARTSYS;
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else
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r = wait_event_killable(sched->job_scheduled,
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amd_sched_entity_is_idle(entity));
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amd_sched_entity_set_rq(entity, NULL);
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if (r) {
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struct amd_sched_job *job;
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/* Park the kernel for a moment to make sure it isn't processing
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* our enity.
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*/
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kthread_park(sched->thread);
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kthread_unpark(sched->thread);
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while (kfifo_out(&entity->job_queue, &job, sizeof(job))) {
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struct amd_sched_fence *s_fence = job->s_fence;
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amd_sched_fence_scheduled(s_fence);
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dma_fence_set_error(&s_fence->finished, -ESRCH);
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amd_sched_fence_finished(s_fence);
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dma_fence_put(&s_fence->finished);
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sched->ops->free_job(job);
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}
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}
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kfifo_free(&entity->job_queue);
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}
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static void amd_sched_entity_wakeup(struct dma_fence *f, struct dma_fence_cb *cb)
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{
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struct amd_sched_entity *entity =
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container_of(cb, struct amd_sched_entity, cb);
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entity->dependency = NULL;
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dma_fence_put(f);
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amd_sched_wakeup(entity->sched);
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}
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static void amd_sched_entity_clear_dep(struct dma_fence *f, struct dma_fence_cb *cb)
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{
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struct amd_sched_entity *entity =
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container_of(cb, struct amd_sched_entity, cb);
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entity->dependency = NULL;
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dma_fence_put(f);
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}
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void amd_sched_entity_set_rq(struct amd_sched_entity *entity,
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struct amd_sched_rq *rq)
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{
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if (entity->rq == rq)
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return;
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spin_lock(&entity->rq_lock);
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if (entity->rq)
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amd_sched_rq_remove_entity(entity->rq, entity);
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entity->rq = rq;
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if (rq)
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amd_sched_rq_add_entity(rq, entity);
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spin_unlock(&entity->rq_lock);
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}
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bool amd_sched_dependency_optimized(struct dma_fence* fence,
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struct amd_sched_entity *entity)
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{
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struct amd_gpu_scheduler *sched = entity->sched;
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struct amd_sched_fence *s_fence;
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if (!fence || dma_fence_is_signaled(fence))
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return false;
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if (fence->context == entity->fence_context)
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return true;
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s_fence = to_amd_sched_fence(fence);
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if (s_fence && s_fence->sched == sched)
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return true;
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return false;
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}
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static bool amd_sched_entity_add_dependency_cb(struct amd_sched_entity *entity)
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{
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struct amd_gpu_scheduler *sched = entity->sched;
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struct dma_fence * fence = entity->dependency;
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struct amd_sched_fence *s_fence;
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if (fence->context == entity->fence_context) {
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/* We can ignore fences from ourself */
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dma_fence_put(entity->dependency);
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return false;
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}
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s_fence = to_amd_sched_fence(fence);
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if (s_fence && s_fence->sched == sched) {
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/*
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* Fence is from the same scheduler, only need to wait for
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* it to be scheduled
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*/
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fence = dma_fence_get(&s_fence->scheduled);
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dma_fence_put(entity->dependency);
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entity->dependency = fence;
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if (!dma_fence_add_callback(fence, &entity->cb,
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amd_sched_entity_clear_dep))
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return true;
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/* Ignore it when it is already scheduled */
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dma_fence_put(fence);
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return false;
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}
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if (!dma_fence_add_callback(entity->dependency, &entity->cb,
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amd_sched_entity_wakeup))
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return true;
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dma_fence_put(entity->dependency);
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return false;
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}
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static struct amd_sched_job *
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amd_sched_entity_peek_job(struct amd_sched_entity *entity)
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{
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struct amd_gpu_scheduler *sched = entity->sched;
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struct amd_sched_job *sched_job;
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if (!kfifo_out_peek(&entity->job_queue, &sched_job, sizeof(sched_job)))
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return NULL;
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while ((entity->dependency = sched->ops->dependency(sched_job)))
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if (amd_sched_entity_add_dependency_cb(entity))
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return NULL;
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return sched_job;
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}
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/**
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* Helper to submit a job to the job queue
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*
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* @sched_job The pointer to job required to submit
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*
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* Returns true if we could submit the job.
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*/
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static bool amd_sched_entity_in(struct amd_sched_job *sched_job)
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{
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struct amd_gpu_scheduler *sched = sched_job->sched;
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struct amd_sched_entity *entity = sched_job->s_entity;
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bool added, first = false;
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spin_lock(&entity->queue_lock);
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added = kfifo_in(&entity->job_queue, &sched_job,
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sizeof(sched_job)) == sizeof(sched_job);
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if (added && kfifo_len(&entity->job_queue) == sizeof(sched_job))
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first = true;
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spin_unlock(&entity->queue_lock);
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/* first job wakes up scheduler */
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if (first) {
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/* Add the entity to the run queue */
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spin_lock(&entity->rq_lock);
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amd_sched_rq_add_entity(entity->rq, entity);
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spin_unlock(&entity->rq_lock);
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amd_sched_wakeup(sched);
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}
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return added;
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}
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/* job_finish is called after hw fence signaled
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*/
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static void amd_sched_job_finish(struct work_struct *work)
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{
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struct amd_sched_job *s_job = container_of(work, struct amd_sched_job,
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finish_work);
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struct amd_gpu_scheduler *sched = s_job->sched;
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/* remove job from ring_mirror_list */
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spin_lock(&sched->job_list_lock);
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list_del_init(&s_job->node);
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if (sched->timeout != MAX_SCHEDULE_TIMEOUT) {
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struct amd_sched_job *next;
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spin_unlock(&sched->job_list_lock);
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cancel_delayed_work_sync(&s_job->work_tdr);
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spin_lock(&sched->job_list_lock);
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/* queue TDR for next job */
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next = list_first_entry_or_null(&sched->ring_mirror_list,
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struct amd_sched_job, node);
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if (next)
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schedule_delayed_work(&next->work_tdr, sched->timeout);
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}
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spin_unlock(&sched->job_list_lock);
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dma_fence_put(&s_job->s_fence->finished);
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sched->ops->free_job(s_job);
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}
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static void amd_sched_job_finish_cb(struct dma_fence *f,
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struct dma_fence_cb *cb)
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{
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struct amd_sched_job *job = container_of(cb, struct amd_sched_job,
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finish_cb);
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schedule_work(&job->finish_work);
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}
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static void amd_sched_job_begin(struct amd_sched_job *s_job)
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{
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struct amd_gpu_scheduler *sched = s_job->sched;
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dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
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amd_sched_job_finish_cb);
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spin_lock(&sched->job_list_lock);
|
|
list_add_tail(&s_job->node, &sched->ring_mirror_list);
|
|
if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
|
|
list_first_entry_or_null(&sched->ring_mirror_list,
|
|
struct amd_sched_job, node) == s_job)
|
|
schedule_delayed_work(&s_job->work_tdr, sched->timeout);
|
|
spin_unlock(&sched->job_list_lock);
|
|
}
|
|
|
|
static void amd_sched_job_timedout(struct work_struct *work)
|
|
{
|
|
struct amd_sched_job *job = container_of(work, struct amd_sched_job,
|
|
work_tdr.work);
|
|
|
|
job->sched->ops->timedout_job(job);
|
|
}
|
|
|
|
void amd_sched_hw_job_reset(struct amd_gpu_scheduler *sched)
|
|
{
|
|
struct amd_sched_job *s_job;
|
|
|
|
spin_lock(&sched->job_list_lock);
|
|
list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
|
|
if (s_job->s_fence->parent &&
|
|
dma_fence_remove_callback(s_job->s_fence->parent,
|
|
&s_job->s_fence->cb)) {
|
|
dma_fence_put(s_job->s_fence->parent);
|
|
s_job->s_fence->parent = NULL;
|
|
atomic_dec(&sched->hw_rq_count);
|
|
}
|
|
}
|
|
spin_unlock(&sched->job_list_lock);
|
|
}
|
|
|
|
void amd_sched_job_kickout(struct amd_sched_job *s_job)
|
|
{
|
|
struct amd_gpu_scheduler *sched = s_job->sched;
|
|
|
|
spin_lock(&sched->job_list_lock);
|
|
list_del_init(&s_job->node);
|
|
spin_unlock(&sched->job_list_lock);
|
|
}
|
|
|
|
void amd_sched_job_recovery(struct amd_gpu_scheduler *sched)
|
|
{
|
|
struct amd_sched_job *s_job, *tmp;
|
|
int r;
|
|
|
|
spin_lock(&sched->job_list_lock);
|
|
s_job = list_first_entry_or_null(&sched->ring_mirror_list,
|
|
struct amd_sched_job, node);
|
|
if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
|
|
schedule_delayed_work(&s_job->work_tdr, sched->timeout);
|
|
|
|
list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
|
|
struct amd_sched_fence *s_fence = s_job->s_fence;
|
|
struct dma_fence *fence;
|
|
|
|
spin_unlock(&sched->job_list_lock);
|
|
fence = sched->ops->run_job(s_job);
|
|
atomic_inc(&sched->hw_rq_count);
|
|
if (fence) {
|
|
s_fence->parent = dma_fence_get(fence);
|
|
r = dma_fence_add_callback(fence, &s_fence->cb,
|
|
amd_sched_process_job);
|
|
if (r == -ENOENT)
|
|
amd_sched_process_job(fence, &s_fence->cb);
|
|
else if (r)
|
|
DRM_ERROR("fence add callback failed (%d)\n",
|
|
r);
|
|
dma_fence_put(fence);
|
|
} else {
|
|
DRM_ERROR("Failed to run job!\n");
|
|
amd_sched_process_job(NULL, &s_fence->cb);
|
|
}
|
|
spin_lock(&sched->job_list_lock);
|
|
}
|
|
spin_unlock(&sched->job_list_lock);
|
|
}
|
|
|
|
/**
|
|
* Submit a job to the job queue
|
|
*
|
|
* @sched_job The pointer to job required to submit
|
|
*
|
|
* Returns 0 for success, negative error code otherwise.
|
|
*/
|
|
void amd_sched_entity_push_job(struct amd_sched_job *sched_job)
|
|
{
|
|
struct amd_sched_entity *entity = sched_job->s_entity;
|
|
|
|
trace_amd_sched_job(sched_job);
|
|
wait_event(entity->sched->job_scheduled,
|
|
amd_sched_entity_in(sched_job));
|
|
}
|
|
|
|
/* init a sched_job with basic field */
|
|
int amd_sched_job_init(struct amd_sched_job *job,
|
|
struct amd_gpu_scheduler *sched,
|
|
struct amd_sched_entity *entity,
|
|
void *owner)
|
|
{
|
|
job->sched = sched;
|
|
job->s_entity = entity;
|
|
job->s_fence = amd_sched_fence_create(entity, owner);
|
|
if (!job->s_fence)
|
|
return -ENOMEM;
|
|
job->id = atomic64_inc_return(&sched->job_id_count);
|
|
|
|
INIT_WORK(&job->finish_work, amd_sched_job_finish);
|
|
INIT_LIST_HEAD(&job->node);
|
|
INIT_DELAYED_WORK(&job->work_tdr, amd_sched_job_timedout);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Return ture if we can push more jobs to the hw.
|
|
*/
|
|
static bool amd_sched_ready(struct amd_gpu_scheduler *sched)
|
|
{
|
|
return atomic_read(&sched->hw_rq_count) <
|
|
sched->hw_submission_limit;
|
|
}
|
|
|
|
/**
|
|
* Wake up the scheduler when it is ready
|
|
*/
|
|
static void amd_sched_wakeup(struct amd_gpu_scheduler *sched)
|
|
{
|
|
if (amd_sched_ready(sched))
|
|
wake_up_interruptible(&sched->wake_up_worker);
|
|
}
|
|
|
|
/**
|
|
* Select next entity to process
|
|
*/
|
|
static struct amd_sched_entity *
|
|
amd_sched_select_entity(struct amd_gpu_scheduler *sched)
|
|
{
|
|
struct amd_sched_entity *entity;
|
|
int i;
|
|
|
|
if (!amd_sched_ready(sched))
|
|
return NULL;
|
|
|
|
/* Kernel run queue has higher priority than normal run queue*/
|
|
for (i = AMD_SCHED_PRIORITY_MAX - 1; i >= AMD_SCHED_PRIORITY_MIN; i--) {
|
|
entity = amd_sched_rq_select_entity(&sched->sched_rq[i]);
|
|
if (entity)
|
|
break;
|
|
}
|
|
|
|
return entity;
|
|
}
|
|
|
|
static void amd_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
|
|
{
|
|
struct amd_sched_fence *s_fence =
|
|
container_of(cb, struct amd_sched_fence, cb);
|
|
struct amd_gpu_scheduler *sched = s_fence->sched;
|
|
|
|
dma_fence_get(&s_fence->finished);
|
|
atomic_dec(&sched->hw_rq_count);
|
|
amd_sched_fence_finished(s_fence);
|
|
|
|
trace_amd_sched_process_job(s_fence);
|
|
dma_fence_put(&s_fence->finished);
|
|
wake_up_interruptible(&sched->wake_up_worker);
|
|
}
|
|
|
|
static bool amd_sched_blocked(struct amd_gpu_scheduler *sched)
|
|
{
|
|
if (kthread_should_park()) {
|
|
kthread_parkme();
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static int amd_sched_main(void *param)
|
|
{
|
|
struct sched_param sparam = {.sched_priority = 1};
|
|
struct amd_gpu_scheduler *sched = (struct amd_gpu_scheduler *)param;
|
|
int r, count;
|
|
|
|
sched_setscheduler(current, SCHED_FIFO, &sparam);
|
|
|
|
while (!kthread_should_stop()) {
|
|
struct amd_sched_entity *entity = NULL;
|
|
struct amd_sched_fence *s_fence;
|
|
struct amd_sched_job *sched_job;
|
|
struct dma_fence *fence;
|
|
|
|
wait_event_interruptible(sched->wake_up_worker,
|
|
(!amd_sched_blocked(sched) &&
|
|
(entity = amd_sched_select_entity(sched))) ||
|
|
kthread_should_stop());
|
|
|
|
if (!entity)
|
|
continue;
|
|
|
|
sched_job = amd_sched_entity_peek_job(entity);
|
|
if (!sched_job)
|
|
continue;
|
|
|
|
s_fence = sched_job->s_fence;
|
|
|
|
atomic_inc(&sched->hw_rq_count);
|
|
amd_sched_job_begin(sched_job);
|
|
|
|
fence = sched->ops->run_job(sched_job);
|
|
amd_sched_fence_scheduled(s_fence);
|
|
|
|
if (fence) {
|
|
s_fence->parent = dma_fence_get(fence);
|
|
r = dma_fence_add_callback(fence, &s_fence->cb,
|
|
amd_sched_process_job);
|
|
if (r == -ENOENT)
|
|
amd_sched_process_job(fence, &s_fence->cb);
|
|
else if (r)
|
|
DRM_ERROR("fence add callback failed (%d)\n",
|
|
r);
|
|
dma_fence_put(fence);
|
|
} else {
|
|
DRM_ERROR("Failed to run job!\n");
|
|
amd_sched_process_job(NULL, &s_fence->cb);
|
|
}
|
|
|
|
count = kfifo_out(&entity->job_queue, &sched_job,
|
|
sizeof(sched_job));
|
|
WARN_ON(count != sizeof(sched_job));
|
|
wake_up(&sched->job_scheduled);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Init a gpu scheduler instance
|
|
*
|
|
* @sched The pointer to the scheduler
|
|
* @ops The backend operations for this scheduler.
|
|
* @hw_submissions Number of hw submissions to do.
|
|
* @name Name used for debugging
|
|
*
|
|
* Return 0 on success, otherwise error code.
|
|
*/
|
|
int amd_sched_init(struct amd_gpu_scheduler *sched,
|
|
const struct amd_sched_backend_ops *ops,
|
|
unsigned hw_submission, long timeout, const char *name)
|
|
{
|
|
int i;
|
|
sched->ops = ops;
|
|
sched->hw_submission_limit = hw_submission;
|
|
sched->name = name;
|
|
sched->timeout = timeout;
|
|
for (i = AMD_SCHED_PRIORITY_MIN; i < AMD_SCHED_PRIORITY_MAX; i++)
|
|
amd_sched_rq_init(&sched->sched_rq[i]);
|
|
|
|
init_waitqueue_head(&sched->wake_up_worker);
|
|
init_waitqueue_head(&sched->job_scheduled);
|
|
INIT_LIST_HEAD(&sched->ring_mirror_list);
|
|
spin_lock_init(&sched->job_list_lock);
|
|
atomic_set(&sched->hw_rq_count, 0);
|
|
atomic64_set(&sched->job_id_count, 0);
|
|
|
|
/* Each scheduler will run on a seperate kernel thread */
|
|
sched->thread = kthread_run(amd_sched_main, sched, sched->name);
|
|
if (IS_ERR(sched->thread)) {
|
|
DRM_ERROR("Failed to create scheduler for %s.\n", name);
|
|
return PTR_ERR(sched->thread);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Destroy a gpu scheduler
|
|
*
|
|
* @sched The pointer to the scheduler
|
|
*/
|
|
void amd_sched_fini(struct amd_gpu_scheduler *sched)
|
|
{
|
|
if (sched->thread)
|
|
kthread_stop(sched->thread);
|
|
}
|