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55c0226ff0
commit 96738c69a7 upstream.
Andy pointed out that if an NMI or MCE is received while we're in the
middle of an EFI mixed mode call a triple fault will occur. This can
happen, for example, when issuing an EFI mixed mode call while running
perf.
The reason for the triple fault is that we execute the mixed mode call
in 32-bit mode with paging disabled but with 64-bit kernel IDT handlers
installed throughout the call.
At Andy's suggestion, stop playing the games we currently do at runtime,
such as disabling paging and installing a 32-bit GDT for __KERNEL_CS. We
can simply switch to the __KERNEL32_CS descriptor before invoking
firmware services, and run in compatibility mode. This way, if an
NMI/MCE does occur the kernel IDT handler will execute correctly, since
it'll jump to __KERNEL_CS automatically.
However, this change is only possible post-ExitBootServices(). Before
then the firmware "owns" the machine and expects for its 32-bit IDT
handlers to be left intact to service interrupts, etc.
So, we now need to distinguish between early boot and runtime
invocations of EFI services. During early boot, we need to restore the
GDT that the firmware expects to be present. We can only jump to the
__KERNEL32_CS code segment for mixed mode calls after ExitBootServices()
has been invoked.
A liberal sprinkling of comments in the thunking code should make the
differences in early and late environments more apparent.
Reported-by: Andy Lutomirski <luto@amacapital.net>
Tested-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
99 lines
1.9 KiB
ArmAsm
99 lines
1.9 KiB
ArmAsm
/*
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* Function calling ABI conversion from Linux to EFI for x86_64
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*
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* Copyright (C) 2007 Intel Corp
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* Bibo Mao <bibo.mao@intel.com>
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* Huang Ying <ying.huang@intel.com>
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*/
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/msr.h>
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#include <asm/processor-flags.h>
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#include <asm/page_types.h>
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#define SAVE_XMM \
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mov %rsp, %rax; \
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subq $0x70, %rsp; \
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and $~0xf, %rsp; \
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mov %rax, (%rsp); \
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mov %cr0, %rax; \
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clts; \
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mov %rax, 0x8(%rsp); \
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movaps %xmm0, 0x60(%rsp); \
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movaps %xmm1, 0x50(%rsp); \
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movaps %xmm2, 0x40(%rsp); \
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movaps %xmm3, 0x30(%rsp); \
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movaps %xmm4, 0x20(%rsp); \
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movaps %xmm5, 0x10(%rsp)
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#define RESTORE_XMM \
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movaps 0x60(%rsp), %xmm0; \
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movaps 0x50(%rsp), %xmm1; \
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movaps 0x40(%rsp), %xmm2; \
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movaps 0x30(%rsp), %xmm3; \
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movaps 0x20(%rsp), %xmm4; \
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movaps 0x10(%rsp), %xmm5; \
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mov 0x8(%rsp), %rsi; \
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mov %rsi, %cr0; \
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mov (%rsp), %rsp
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/* stolen from gcc */
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.macro FLUSH_TLB_ALL
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movq %r15, efi_scratch(%rip)
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movq %r14, efi_scratch+8(%rip)
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movq %cr4, %r15
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movq %r15, %r14
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andb $0x7f, %r14b
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movq %r14, %cr4
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movq %r15, %cr4
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movq efi_scratch+8(%rip), %r14
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movq efi_scratch(%rip), %r15
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.endm
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.macro SWITCH_PGT
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cmpb $0, efi_scratch+24(%rip)
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je 1f
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movq %r15, efi_scratch(%rip) # r15
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# save previous CR3
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movq %cr3, %r15
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movq %r15, efi_scratch+8(%rip) # prev_cr3
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movq efi_scratch+16(%rip), %r15 # EFI pgt
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movq %r15, %cr3
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1:
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.endm
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.macro RESTORE_PGT
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cmpb $0, efi_scratch+24(%rip)
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je 2f
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movq efi_scratch+8(%rip), %r15
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movq %r15, %cr3
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movq efi_scratch(%rip), %r15
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FLUSH_TLB_ALL
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2:
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.endm
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ENTRY(efi_call)
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SAVE_XMM
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mov (%rsp), %rax
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mov 8(%rax), %rax
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subq $48, %rsp
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mov %r9, 32(%rsp)
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mov %rax, 40(%rsp)
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mov %r8, %r9
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mov %rcx, %r8
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mov %rsi, %rcx
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SWITCH_PGT
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call *%rdi
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RESTORE_PGT
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addq $48, %rsp
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RESTORE_XMM
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ret
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ENDPROC(efi_call)
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.data
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ENTRY(efi_scratch)
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.fill 3,8,0
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.byte 0
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.quad 0
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