Martin Leung 068d1cce78 drm/amd/display: extending AUX SW Timeout ...

[ Upstream commit f4bbebf8e7 ]

[Why]
AUX takes longer to reply when using active DP-DVI dongle on some asics
resulting in up to 2000+ us edid read (timeout).

[How]
1. Adjust AUX poll to match spec
2. Extend the SW timeout. This does not affect normal
operation since we exit the loop as soon as AUX acks.

Signed-off-by: Martin Leung <martin.leung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2019-05-16 19:41:20 +02:00

..

dce_abm.c

drm/amd/display: get rid of 32.32 unsigned fixed point

2018-05-18 16:08:21 -05:00

dce_abm.h

drm/amd/display: Fix check for whether dmcu fw is running

2017-12-20 14:46:32 -05:00

dce_audio.c

drm/amd/display: Add Dynamic debug prints

2018-04-11 13:08:05 -05:00

dce_audio.h

drm/amd/display: Surface Validation Fixes + Audio Mask

2017-09-26 17:16:14 -04:00

dce_aux.c

drm/amd/display: extending AUX SW Timeout

2019-05-16 19:41:20 +02:00

dce_aux.h

drm/amd/display: extending AUX SW Timeout

2019-05-16 19:41:20 +02:00

dce_clock_source.c

Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"

2018-08-21 14:32:28 -05:00

dce_clock_source.h

Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"

2018-08-21 14:32:28 -05:00

dce_clocks.c

drm/amd/display: Raise dispclk value for dce120 by 15%

2018-11-21 09:19:10 +01:00

dce_clocks.h

Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"

2018-08-21 14:32:28 -05:00

dce_dmcu.c

Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"

2018-08-21 14:32:28 -05:00

dce_dmcu.h

drm/amd/display: Enable backlight support for pre-DCE11 ASICs

2018-03-14 15:08:46 -05:00

dce_hwseq.c

drm/amd/display: remove dummy is_blanked() to optimise boot time

2018-05-15 13:43:07 -05:00

dce_hwseq.h

drm/amd/display: add missing mask for dcn

2018-07-13 14:49:52 -05:00

dce_ipp.c

drm/amd/display: get rid of 32.32 unsigned fixed point

2018-05-18 16:08:21 -05:00

dce_ipp.h

drm/amd/display: dce80, 100, 110 and 112 to dce ipp refactor

2017-09-26 18:06:39 -04:00

dce_link_encoder.c

drm/amd/display: Pass connector id when executing VBIOS CT

2018-08-13 17:29:37 -05:00

dce_link_encoder.h

drm/amd/display: Use dig enable to determine fast boot optimization.

2018-05-15 13:43:27 -05:00

dce_mem_input.c

drm/amd/display: make function tables const

2018-07-10 14:17:11 -05:00

dce_mem_input.h

drm/amd/display: Separate mem input constuctors for dce 112 and 120

2018-04-11 13:07:42 -05:00

dce_opp.c

drm/amd/display: Fix FMT truncation programming

2018-03-21 00:22:35 -05:00

dce_opp.h

amdgpu/dc: make opp construct void.

2017-09-29 13:01:42 -04:00

dce_scl_filters.c

drm/amd/display: get rid of 32.32 unsigned fixed point

2018-05-18 16:08:21 -05:00

dce_stream_encoder.c

Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"

2018-08-21 14:32:28 -05:00

dce_stream_encoder.h

amdgpu/dc: make stream encoder constructor return void.

2017-09-29 13:01:29 -04:00

dce_transform.c

drm/amd/display: add HDR visual confirm

2018-07-16 16:11:49 -05:00

dce_transform.h

drm/amd/display: Add regamma lut write mask to SOC base

2018-03-05 15:34:10 -05:00

Makefile

drm/amd/display: Decouple aux from i2c

2018-07-24 15:15:50 -05:00