Dillon Varone c5a332f98d drm/amd/display: resolve correct MALL size for dcn401 ...

[WHY]
Code for dcn401 to calculate available MALL size for display was shared
with dcn32 and did not provide the correct result for all ASICs.

[HOW]
Add dcn401 specific function to properly calculate the available MALL
for display.

Reviewed-by: Chris Park <chris.park@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2024-10-15 11:23:50 -04:00

..

dcn32_resource_helpers.c

drm/amd/display: Fix possible overflow in integer multiplication

2024-07-27 17:31:41 -04:00

dcn32_resource.c

drm/amd/display: resolve correct MALL size for dcn401

2024-10-15 11:23:50 -04:00

dcn32_resource.h

drm/amd/display: Wait for all pending cleared before full update

2024-10-01 17:30:47 -04:00