Paul Cercueil b1c1ef7b4d clk: ingenic: Fix doc of ingenic_cgu_div_info ...

commit 7ca4c922aa upstream.

The 'div' field does not represent a number of bits used to divide
(understand: right-shift) the divider, but a number itself used to
divide the divider.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2019-03-23 20:10:03 +01:00

..

cgu.c

clk: ingenic: Fix round_rate misbehaving with non-integer dividers

2019-03-23 20:10:03 +01:00

cgu.h

clk: ingenic: Fix doc of ingenic_cgu_div_info

2019-03-23 20:10:03 +01:00

jz4740-cgu.c

clk: ingenic: Add missing flag for UDC clock

2018-07-06 11:47:28 -07:00

jz4770-cgu.c

clk: ingenic: jz4770: Add 150us delay after enabling VPU clock

2018-06-01 23:21:39 -07:00

jz4780-cgu.c

clk: ingenic: Use const pointer to clk_ops in struct

2018-01-18 22:04:36 +00:00

Makefile

clk: Add Ingenic jz4770 CGU driver

2018-01-18 22:05:55 +00:00