mirror of
https://github.com/raspberrypi/linux.git
synced 2025-12-28 13:02:59 +00:00
Pull drm updates from Dave Airlie:
"There is one set of patches to misc for a i915 gsc/mei proxy driver.
Otherwise it's mostly amdgpu/i915/msm, lots of hw enablement and lots
of refactoring.
core:
- replace strlcpy with strscpy
- EDID changes to support further conversion to struct drm_edid
- Move i915 DSC parameter code to common DRM helpers
- Add Colorspace functionality
aperture:
- ignore framebuffers with non-primary devices
fbdev:
- use fbdev i/o helpers
- add Kconfig options for fb_ops helpers
- use new fb io helpers directly in drivers
sysfs:
- export DRM connector ID
scheduler:
- Avoid an infinite loop
ttm:
- store function table in .rodata
- Add query for TTM mem limit
- Add NUMA awareness to pools
- Export ttm_pool_fini()
bridge:
- fsl-ldb: support i.MX6SX
- lt9211, lt9611: remove blanking packets
- tc358768: implement input bus formats, devm cleanups
- ti-snd65dsi86: implement wait_hpd_asserted
- analogix: fix endless probe loop
- samsung-dsim: support swapped clock, fix enabling, support var
clock
- display-connector: Add support for external power supply
- imx: Fix module linking
- tc358762: Support reset GPIO
panel:
- nt36523: Support Lenovo J606F
- st7703: Support Anbernic RG353V-V2
- InnoLux G070ACE-L01 support
- boe-tv101wum-nl6: Improve initialization
- sharp-ls043t1le001: Mode fixes
- simple: BOE EV121WXM-N10-1850, S6D7AA0
- Ampire AM-800480L1TMQW-T00H
- Rocktech RK043FN48H
- Starry himax83102-j02
- Starry ili9882t
amdgpu:
- add new ctx query flag to handle reset better
- add new query/set shadow buffer for rdna3
- DCN 3.2/3.1.x/3.0.x updates
- Enable DC_FP on loongarch
- PCIe fix for RDNA2
- improve DC FAMS/SubVP support for better power management
- partition support for lots of engines
- Take NUMA into account when allocating memory
- Add new DRM_AMDGPU_WERROR config parameter to help with CI
- Initial SMU13 overdrive support
- Add support for new colorspace KMS API
- W=1 fixes
amdkfd:
- Query TTM mem limit rather than hardcoding it
- GC 9.4.3 partition support
- Handle NUMA for partitions
- Add debugger interface for enabling gdb
- Add KFD event age tracking
radeon:
- Fix possible UAF
i915:
- new getparam for PXP support
- GSC/MEI proxy driver
- Meteorlake display enablement
- avoid clearing preallocated framebuffers with TTM
- implement framebuffer mmap support
- Disable sampler indirect state in bindless heap
- Enable fdinfo for GuC backends
- GuC loading and firmware table handling fixes
- Various refactors for multi-tile enablement
- Define MOCS and PAT tables for MTL
- GSC/MEI support for Meteorlake
- PMU multi-tile support
- Large driver kernel doc cleanup
- Allow VRR toggling and arbitrary refresh rates
- Support async flips on linear buffers on display ver 12+
- Expose CRTC CTM property on ILK/SNB/VLV
- New debugfs for display clock frequencies
- Hotplug refactoring
- Display refactoring
- I915_GEM_CREATE_EXT_SET_PAT for Mesa on Meteorlake
- Use large rings for compute contexts
- HuC loading for MTL
- Allow user to set cache at BO creation
- MTL powermanagement enhancements
- Switch to dedicated workqueues to stop using flush_scheduled_work()
- Move display runtime init under display/
- Remove 10bit gamma on desktop gen3 parts, they don't support it
habanalabs:
- uapi: return 0 for user queries if there was a h/w or f/w error
- Add pci health check when we lose connection with the firmware.
This can be used to distinguish between pci link down and firmware
getting stuck.
- Add more info to the error print when TPC interrupt occur.
- Firmware fixes
msm:
- Adreno A660 bindings
- SM8350 MDSS bindings fix
- Added support for DPU on sm6350 and sm6375 platforms
- Implemented tearcheck support to support vsync on SM150 and newer
platforms
- Enabled missing features (DSPP, DSC, split display) on sc8180x,
sc8280xp, sm8450
- Added support for DSI and 28nm DSI PHY on MSM8226 platform
- Added support for DSI on sm6350 and sm6375 platforms
- Added support for display controller on MSM8226 platform
- A690 GPU support
- Move cmdstream dumping out of fence signaling path
- a610 support
- Support for a6xx devices without GMU
nouveau:
- NULL ptr before deref fixes
armada:
- implement fbdev emulation as client
sun4i:
- fix mipi-dsi dotclock
- release clocks
vc4:
- rgb range toggle property
- BT601 / BT2020 HDMI support
vkms:
- convert to drmm helpers
- add reflection and rotation support
- fix rgb565 conversion
gma500:
- fix iomem access
shmobile:
- support renesas soc platform
- enable fbdev
mxsfb:
- Add support for i.MX93 LCDIF
stm:
- dsi: Use devm_ helper
- ltdc: Fix potential invalid pointer deref
renesas:
- Group drivers in renesas subdirectory to prepare for new platform
- Drop deprecated R-Car H3 ES1.x support
meson:
- Add support for MIPI DSI displays
virtio:
- add sync object support
mediatek:
- Add display binding document for MT6795"
* tag 'drm-next-2023-06-29' of git://anongit.freedesktop.org/drm/drm: (1791 commits)
drm/i915: Fix a NULL vs IS_ERR() bug
drm/i915: make i915_drm_client_fdinfo() reference conditional again
drm/i915/huc: Fix missing error code in intel_huc_init()
drm/i915/gsc: take a wakeref for the proxy-init-completion check
drm/msm/a6xx: Add A610 speedbin support
drm/msm/a6xx: Add A619_holi speedbin support
drm/msm/a6xx: Use adreno_is_aXYZ macros in speedbin matching
drm/msm/a6xx: Use "else if" in GPU speedbin rev matching
drm/msm/a6xx: Fix some A619 tunables
drm/msm/a6xx: Add A610 support
drm/msm/a6xx: Add support for A619_holi
drm/msm/adreno: Disable has_cached_coherent in GMU wrapper configurations
drm/msm/a6xx: Introduce GMU wrapper support
drm/msm/a6xx: Move CX GMU power counter enablement to hw_init
drm/msm/a6xx: Extend and explain UBWC config
drm/msm/a6xx: Remove both GBIF and RBBM GBIF halt on hw init
drm/msm/a6xx: Add a helper for software-resetting the GPU
drm/msm/a6xx: Improve a6xx_bus_clear_pending_transactions()
drm/msm/a6xx: Move a6xx_bus_clear_pending_transactions to a6xx_gpu
drm/msm/a6xx: Move force keepalive vote removal to a6xx_gmu_force_off()
...
513 lines
11 KiB
C
513 lines
11 KiB
C
/*
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* linux/drivers/video/hitfb.c -- Hitachi LCD frame buffer device
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*
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* (C) 1999 Mihai Spatar
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* (C) 2000 YAEGASHI Takeshi
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* (C) 2003, 2004 Paul Mundt
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* (C) 2003, 2004, 2006 Andriy Skulysh
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/fb.h>
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#include <asm/machvec.h>
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#include <linux/uaccess.h>
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#include <asm/io.h>
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#include <asm/hd64461.h>
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#include <cpu/dac.h>
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#define WIDTH 640
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static struct fb_var_screeninfo hitfb_var = {
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.activate = FB_ACTIVATE_NOW,
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.height = -1,
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.width = -1,
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.vmode = FB_VMODE_NONINTERLACED,
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};
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static struct fb_fix_screeninfo hitfb_fix = {
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.id = "Hitachi HD64461",
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.type = FB_TYPE_PACKED_PIXELS,
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.accel = FB_ACCEL_NONE,
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};
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static volatile void __iomem *hitfb_offset_to_addr(unsigned int offset)
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{
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return (__force volatile void __iomem *)(uintptr_t)offset;
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}
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static u16 hitfb_readw(unsigned int offset)
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{
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return fb_readw(hitfb_offset_to_addr(offset));
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}
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static void hitfb_writew(u16 value, unsigned int offset)
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{
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fb_writew(value, hitfb_offset_to_addr(offset));
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}
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static inline void hitfb_accel_wait(void)
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{
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while (hitfb_readw(HD64461_GRCFGR) & HD64461_GRCFGR_ACCSTATUS)
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;
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}
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static inline void hitfb_accel_start(int truecolor)
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{
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if (truecolor) {
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hitfb_writew(6, HD64461_GRCFGR);
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} else {
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hitfb_writew(7, HD64461_GRCFGR);
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}
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}
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static inline void hitfb_accel_set_dest(int truecolor, u16 dx, u16 dy,
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u16 width, u16 height)
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{
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u32 saddr = WIDTH * dy + dx;
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if (truecolor)
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saddr <<= 1;
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hitfb_writew(width-1, HD64461_BBTDWR);
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hitfb_writew(height-1, HD64461_BBTDHR);
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hitfb_writew(saddr & 0xffff, HD64461_BBTDSARL);
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hitfb_writew(saddr >> 16, HD64461_BBTDSARH);
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}
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static inline void hitfb_accel_bitblt(int truecolor, u16 sx, u16 sy, u16 dx,
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u16 dy, u16 width, u16 height, u16 rop,
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u32 mask_addr)
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{
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u32 saddr, daddr;
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u32 maddr = 0;
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height--;
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width--;
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hitfb_writew(rop, HD64461_BBTROPR);
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if ((sy < dy) || ((sy == dy) && (sx <= dx))) {
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saddr = WIDTH * (sy + height) + sx + width;
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daddr = WIDTH * (dy + height) + dx + width;
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if (mask_addr) {
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if (truecolor)
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maddr = ((width >> 3) + 1) * (height + 1) - 1;
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else
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maddr =
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(((width >> 4) + 1) * (height + 1) - 1) * 2;
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hitfb_writew((1 << 5) | 1, HD64461_BBTMDR);
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} else
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hitfb_writew(1, HD64461_BBTMDR);
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} else {
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saddr = WIDTH * sy + sx;
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daddr = WIDTH * dy + dx;
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if (mask_addr) {
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hitfb_writew((1 << 5), HD64461_BBTMDR);
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} else {
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hitfb_writew(0, HD64461_BBTMDR);
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}
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}
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if (truecolor) {
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saddr <<= 1;
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daddr <<= 1;
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}
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hitfb_writew(width, HD64461_BBTDWR);
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hitfb_writew(height, HD64461_BBTDHR);
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hitfb_writew(saddr & 0xffff, HD64461_BBTSSARL);
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hitfb_writew(saddr >> 16, HD64461_BBTSSARH);
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hitfb_writew(daddr & 0xffff, HD64461_BBTDSARL);
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hitfb_writew(daddr >> 16, HD64461_BBTDSARH);
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if (mask_addr) {
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maddr += mask_addr;
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hitfb_writew(maddr & 0xffff, HD64461_BBTMARL);
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hitfb_writew(maddr >> 16, HD64461_BBTMARH);
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}
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hitfb_accel_start(truecolor);
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}
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static void hitfb_fillrect(struct fb_info *p, const struct fb_fillrect *rect)
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{
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if (rect->rop != ROP_COPY)
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cfb_fillrect(p, rect);
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else {
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hitfb_accel_wait();
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hitfb_writew(0x00f0, HD64461_BBTROPR);
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hitfb_writew(16, HD64461_BBTMDR);
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if (p->var.bits_per_pixel == 16) {
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hitfb_writew(((u32 *) (p->pseudo_palette))[rect->color],
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HD64461_GRSCR);
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hitfb_accel_set_dest(1, rect->dx, rect->dy, rect->width,
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rect->height);
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hitfb_accel_start(1);
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} else {
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hitfb_writew(rect->color, HD64461_GRSCR);
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hitfb_accel_set_dest(0, rect->dx, rect->dy, rect->width,
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rect->height);
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hitfb_accel_start(0);
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}
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}
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}
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static void hitfb_copyarea(struct fb_info *p, const struct fb_copyarea *area)
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{
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hitfb_accel_wait();
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hitfb_accel_bitblt(p->var.bits_per_pixel == 16, area->sx, area->sy,
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area->dx, area->dy, area->width, area->height,
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0x00cc, 0);
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}
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static int hitfb_pan_display(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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int xoffset = var->xoffset;
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int yoffset = var->yoffset;
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if (xoffset != 0)
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return -EINVAL;
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hitfb_writew((yoffset*info->fix.line_length)>>10, HD64461_LCDCBAR);
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return 0;
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}
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static int hitfb_blank(int blank_mode, struct fb_info *info)
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{
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unsigned short v;
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if (blank_mode) {
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v = hitfb_readw(HD64461_LDR1);
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v &= ~HD64461_LDR1_DON;
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hitfb_writew(v, HD64461_LDR1);
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v = hitfb_readw(HD64461_LCDCCR);
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v |= HD64461_LCDCCR_MOFF;
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hitfb_writew(v, HD64461_LCDCCR);
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v = hitfb_readw(HD64461_STBCR);
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v |= HD64461_STBCR_SLCDST;
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hitfb_writew(v, HD64461_STBCR);
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} else {
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v = hitfb_readw(HD64461_STBCR);
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v &= ~HD64461_STBCR_SLCDST;
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hitfb_writew(v, HD64461_STBCR);
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v = hitfb_readw(HD64461_LCDCCR);
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v &= ~(HD64461_LCDCCR_MOFF | HD64461_LCDCCR_STREQ);
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hitfb_writew(v, HD64461_LCDCCR);
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do {
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v = hitfb_readw(HD64461_LCDCCR);
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} while(v&HD64461_LCDCCR_STBACK);
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v = hitfb_readw(HD64461_LDR1);
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v |= HD64461_LDR1_DON;
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hitfb_writew(v, HD64461_LDR1);
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}
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return 0;
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}
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static int hitfb_setcolreg(unsigned regno, unsigned red, unsigned green,
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unsigned blue, unsigned transp, struct fb_info *info)
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{
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if (regno >= 256)
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return 1;
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switch (info->var.bits_per_pixel) {
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case 8:
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hitfb_writew(regno << 8, HD64461_CPTWAR);
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hitfb_writew(red >> 10, HD64461_CPTWDR);
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hitfb_writew(green >> 10, HD64461_CPTWDR);
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hitfb_writew(blue >> 10, HD64461_CPTWDR);
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break;
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case 16:
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if (regno >= 16)
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return 1;
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((u32 *) (info->pseudo_palette))[regno] =
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((red & 0xf800)) |
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((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11);
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break;
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}
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return 0;
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}
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static int hitfb_sync(struct fb_info *info)
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{
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hitfb_accel_wait();
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return 0;
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}
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static int hitfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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int maxy;
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var->xres = info->var.xres;
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var->xres_virtual = info->var.xres;
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var->yres = info->var.yres;
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if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16))
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var->bits_per_pixel = info->var.bits_per_pixel;
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if (var->yres_virtual < var->yres)
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var->yres_virtual = var->yres;
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maxy = info->fix.smem_len / var->xres;
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if (var->bits_per_pixel == 16)
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maxy /= 2;
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if (var->yres_virtual > maxy)
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var->yres_virtual = maxy;
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var->xoffset = 0;
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var->yoffset = 0;
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switch (var->bits_per_pixel) {
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case 8:
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var->red.offset = 0;
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var->red.length = 8;
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var->green.offset = 0;
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var->green.length = 8;
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var->blue.offset = 0;
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var->blue.length = 8;
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var->transp.offset = 0;
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var->transp.length = 0;
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break;
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case 16: /* RGB 565 */
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var->red.offset = 11;
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var->red.length = 5;
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var->green.offset = 5;
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var->green.length = 6;
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var->blue.offset = 0;
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var->blue.length = 5;
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var->transp.offset = 0;
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var->transp.length = 0;
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break;
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}
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return 0;
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}
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static int hitfb_set_par(struct fb_info *info)
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{
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unsigned short ldr3;
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switch (info->var.bits_per_pixel) {
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case 8:
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info->fix.line_length = info->var.xres;
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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info->fix.ypanstep = 16;
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break;
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case 16:
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info->fix.line_length = info->var.xres*2;
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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info->fix.ypanstep = 8;
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break;
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}
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hitfb_writew(info->fix.line_length, HD64461_LCDCLOR);
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ldr3 = hitfb_readw(HD64461_LDR3);
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ldr3 &= ~15;
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ldr3 |= (info->var.bits_per_pixel == 8) ? 4 : 8;
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hitfb_writew(ldr3, HD64461_LDR3);
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return 0;
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}
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static const struct fb_ops hitfb_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = hitfb_check_var,
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.fb_set_par = hitfb_set_par,
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.fb_setcolreg = hitfb_setcolreg,
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.fb_blank = hitfb_blank,
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.fb_sync = hitfb_sync,
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.fb_pan_display = hitfb_pan_display,
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.fb_fillrect = hitfb_fillrect,
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.fb_copyarea = hitfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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};
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static int hitfb_probe(struct platform_device *dev)
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{
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unsigned short lcdclor, ldr3, ldvndr;
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struct fb_info *info;
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int ret;
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if (fb_get_options("hitfb", NULL))
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return -ENODEV;
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hitfb_fix.mmio_start = HD64461_IO_OFFSET(0x1000);
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hitfb_fix.mmio_len = 0x1000;
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hitfb_fix.smem_start = HD64461_IO_OFFSET(0x02000000);
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hitfb_fix.smem_len = 512 * 1024;
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lcdclor = hitfb_readw(HD64461_LCDCLOR);
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ldvndr = hitfb_readw(HD64461_LDVNDR);
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ldr3 = hitfb_readw(HD64461_LDR3);
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switch (ldr3 & 15) {
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default:
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case 4:
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hitfb_var.bits_per_pixel = 8;
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hitfb_var.xres = lcdclor;
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break;
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case 8:
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hitfb_var.bits_per_pixel = 16;
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hitfb_var.xres = lcdclor / 2;
|
|
break;
|
|
}
|
|
hitfb_fix.line_length = lcdclor;
|
|
hitfb_fix.visual = (hitfb_var.bits_per_pixel == 8) ?
|
|
FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
|
|
hitfb_var.yres = ldvndr + 1;
|
|
hitfb_var.xres_virtual = hitfb_var.xres;
|
|
hitfb_var.yres_virtual = hitfb_fix.smem_len / lcdclor;
|
|
switch (hitfb_var.bits_per_pixel) {
|
|
case 8:
|
|
hitfb_var.red.offset = 0;
|
|
hitfb_var.red.length = 8;
|
|
hitfb_var.green.offset = 0;
|
|
hitfb_var.green.length = 8;
|
|
hitfb_var.blue.offset = 0;
|
|
hitfb_var.blue.length = 8;
|
|
hitfb_var.transp.offset = 0;
|
|
hitfb_var.transp.length = 0;
|
|
break;
|
|
case 16: /* RGB 565 */
|
|
hitfb_var.red.offset = 11;
|
|
hitfb_var.red.length = 5;
|
|
hitfb_var.green.offset = 5;
|
|
hitfb_var.green.length = 6;
|
|
hitfb_var.blue.offset = 0;
|
|
hitfb_var.blue.length = 5;
|
|
hitfb_var.transp.offset = 0;
|
|
hitfb_var.transp.length = 0;
|
|
break;
|
|
}
|
|
|
|
info = framebuffer_alloc(sizeof(u32) * 16, &dev->dev);
|
|
if (unlikely(!info))
|
|
return -ENOMEM;
|
|
|
|
info->fbops = &hitfb_ops;
|
|
info->var = hitfb_var;
|
|
info->fix = hitfb_fix;
|
|
info->pseudo_palette = info->par;
|
|
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN |
|
|
FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA;
|
|
|
|
info->screen_base = (char __iomem *)(uintptr_t)hitfb_fix.smem_start;
|
|
|
|
ret = fb_alloc_cmap(&info->cmap, 256, 0);
|
|
if (unlikely(ret < 0))
|
|
goto err_fb;
|
|
|
|
ret = register_framebuffer(info);
|
|
if (unlikely(ret < 0))
|
|
goto err;
|
|
|
|
platform_set_drvdata(dev, info);
|
|
|
|
fb_info(info, "%s frame buffer device\n", info->fix.id);
|
|
|
|
return 0;
|
|
|
|
err:
|
|
fb_dealloc_cmap(&info->cmap);
|
|
err_fb:
|
|
framebuffer_release(info);
|
|
return ret;
|
|
}
|
|
|
|
static void hitfb_remove(struct platform_device *dev)
|
|
{
|
|
struct fb_info *info = platform_get_drvdata(dev);
|
|
|
|
unregister_framebuffer(info);
|
|
fb_dealloc_cmap(&info->cmap);
|
|
framebuffer_release(info);
|
|
}
|
|
|
|
static int hitfb_suspend(struct device *dev)
|
|
{
|
|
u16 v;
|
|
|
|
hitfb_blank(1, NULL);
|
|
v = hitfb_readw(HD64461_STBCR);
|
|
v |= HD64461_STBCR_SLCKE_IST;
|
|
hitfb_writew(v, HD64461_STBCR);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hitfb_resume(struct device *dev)
|
|
{
|
|
u16 v;
|
|
|
|
v = hitfb_readw(HD64461_STBCR);
|
|
v &= ~HD64461_STBCR_SLCKE_OST;
|
|
msleep(100);
|
|
v = hitfb_readw(HD64461_STBCR);
|
|
v &= ~HD64461_STBCR_SLCKE_IST;
|
|
hitfb_writew(v, HD64461_STBCR);
|
|
hitfb_blank(0, NULL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops hitfb_dev_pm_ops = {
|
|
.suspend = hitfb_suspend,
|
|
.resume = hitfb_resume,
|
|
};
|
|
|
|
static struct platform_driver hitfb_driver = {
|
|
.probe = hitfb_probe,
|
|
.remove_new = hitfb_remove,
|
|
.driver = {
|
|
.name = "hitfb",
|
|
.pm = &hitfb_dev_pm_ops,
|
|
},
|
|
};
|
|
|
|
static struct platform_device hitfb_device = {
|
|
.name = "hitfb",
|
|
.id = -1,
|
|
};
|
|
|
|
static int __init hitfb_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = platform_driver_register(&hitfb_driver);
|
|
if (!ret) {
|
|
ret = platform_device_register(&hitfb_device);
|
|
if (ret)
|
|
platform_driver_unregister(&hitfb_driver);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
|
|
static void __exit hitfb_exit(void)
|
|
{
|
|
platform_device_unregister(&hitfb_device);
|
|
platform_driver_unregister(&hitfb_driver);
|
|
}
|
|
|
|
module_init(hitfb_init);
|
|
module_exit(hitfb_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|