Eric Biggers
e867d75658
crypto: aes_ti - disable interrupts while accessing S-box
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[ Upstream commit 0a6a40c2a8 ]
In the "aes-fixed-time" AES implementation, disable interrupts while
accessing the S-box, in order to make cache-timing attacks more
difficult. Previously it was possible for the CPU to be interrupted
while the S-box was loaded into L1 cache, potentially evicting the
cachelines and causing later table lookups to be time-variant.
In tests I did on x86 and ARM, this doesn't affect performance
significantly. Responsiveness is potentially a concern, but interrupts
are only disabled for a single AES block.
Note that even after this change, the implementation still isn't
necessarily guaranteed to be constant-time; see
https://cr.yp.to/antiforgery/cachetiming-20050414.pdf for a discussion
of the many difficulties involved in writing truly constant-time AES
software. But it's valuable to make such attacks more difficult.
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org >
Signed-off-by: Eric Biggers <ebiggers@google.com >
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2019-02-12 19:45:57 +01:00
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