Andy Shevchenko bc3d506a11 dmaengine: dw: Fix FIFO size for Intel Merrifield ...

commit ffe843b182 upstream.

Intel Merrifield has a reduced size of FIFO used in iDMA 32-bit controller,
i.e. 512 bytes instead of 1024.

Fix this by partitioning it as 64 bytes per channel.

Note, in the future we might switch to 'fifo-size' property instead of
hard coded value.

Fixes: 199244d694 ("dmaengine: dw: add support of iDMA 32-bit hardware")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2018-12-13 09:18:52 +01:00

..

core.c

dmaengine: dw: Fix FIFO size for Intel Merrifield

2018-12-13 09:18:52 +01:00

internal.h

dmaengine: dw: export probe()/remove() and Co to users

2014-10-15 20:31:05 +05:30

Kconfig

dmaengine: dw: Remove AVR32 bits from the driver

2017-05-15 17:07:30 +02:00

Makefile

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

2017-11-02 11:10:55 +01:00

pci.c

dmaengine: dw: we do support Merrifield SoC in PCI mode

2017-01-25 11:51:40 +05:30

platform.c

dmaengine: DW DMAC: Handle return value of clk_prepare_enable

2017-05-24 09:55:17 +05:30

regs.h

dmaengine: dw: Remove AVR32 bits from the driver

2017-05-15 17:07:30 +02:00