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5eaa497411
Refactor IPC send and receive functions to allow correct
handling of operations that should not trigger a recovery process.
Expose ivpu_send_receive_internal(), which is now utilized by the D0i3
entry, DCT initialization, and HWS initialization functions.
These functions have been modified to return error codes gracefully,
rather than initiating recovery.
The updated functions are invoked within ivpu_probe() and ivpu_resume(),
ensuring that any errors encountered during these stages result in a proper
teardown or shutdown sequence. The previous approach of triggering recovery
within these functions could lead to a race condition, potentially causing
undefined behavior and kernel crashes due to null pointer dereferences.
Fixes: 45e45362e0 ("accel/ivpu: Introduce ivpu_ipc_send_receive_active()")
Signed-off-by: Karol Wachowski <karol.wachowski@intel.com>
Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240930195322.461209-23-jacek.lawrynowicz@linux.intel.com
Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
114 lines
3.3 KiB
C
114 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020-2024 Intel Corporation
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*/
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#ifndef __IVPU_IPC_H__
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#define __IVPU_IPC_H__
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include "vpu_jsm_api.h"
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struct ivpu_bo;
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/* VPU FW boot notification */
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#define IVPU_IPC_CHAN_BOOT_MSG 0x3ff
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#define IVPU_IPC_BOOT_MSG_DATA_ADDR 0x424f4f54
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/* The alignment to be used for IPC Buffers and IPC Data. */
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#define IVPU_IPC_ALIGNMENT 64
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#define IVPU_IPC_HDR_FREE 0
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#define IVPU_IPC_HDR_ALLOCATED 1
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/**
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* struct ivpu_ipc_hdr - The IPC message header structure, exchanged
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* with the VPU device firmware.
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* @data_addr: The VPU address of the payload (JSM message)
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* @data_size: The size of the payload.
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* @channel: The channel used.
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* @src_node: The Node ID of the sender.
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* @dst_node: The Node ID of the intended receiver.
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* @status: IPC buffer usage status
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*/
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struct ivpu_ipc_hdr {
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u32 data_addr;
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u32 data_size;
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u16 channel;
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u8 src_node;
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u8 dst_node;
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u8 status;
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} __packed __aligned(IVPU_IPC_ALIGNMENT);
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typedef void (*ivpu_ipc_rx_callback_t)(struct ivpu_device *vdev,
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struct ivpu_ipc_hdr *ipc_hdr,
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struct vpu_jsm_msg *jsm_msg);
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struct ivpu_ipc_rx_msg {
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struct list_head link;
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struct ivpu_ipc_hdr *ipc_hdr;
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struct vpu_jsm_msg *jsm_msg;
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ivpu_ipc_rx_callback_t callback;
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};
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struct ivpu_ipc_consumer {
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struct list_head link;
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u32 channel;
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u32 tx_vpu_addr;
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u32 request_id;
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bool aborted;
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ivpu_ipc_rx_callback_t rx_callback;
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spinlock_t rx_lock; /* Protects rx_msg_list and aborted */
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struct list_head rx_msg_list;
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wait_queue_head_t rx_msg_wq;
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};
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struct ivpu_ipc_info {
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struct gen_pool *mm_tx;
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struct ivpu_bo *mem_tx;
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struct ivpu_bo *mem_rx;
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atomic_t rx_msg_count;
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spinlock_t cons_lock; /* Protects cons_list and cb_msg_list */
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struct list_head cons_list;
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struct list_head cb_msg_list;
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atomic_t request_id;
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struct mutex lock; /* Lock on status */
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bool on;
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};
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int ivpu_ipc_init(struct ivpu_device *vdev);
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void ivpu_ipc_fini(struct ivpu_device *vdev);
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void ivpu_ipc_enable(struct ivpu_device *vdev);
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void ivpu_ipc_disable(struct ivpu_device *vdev);
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void ivpu_ipc_reset(struct ivpu_device *vdev);
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void ivpu_ipc_irq_handler(struct ivpu_device *vdev);
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void ivpu_ipc_irq_thread_handler(struct ivpu_device *vdev);
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void ivpu_ipc_consumer_add(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
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u32 channel, ivpu_ipc_rx_callback_t callback);
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void ivpu_ipc_consumer_del(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons);
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int ivpu_ipc_send(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
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struct vpu_jsm_msg *req);
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int ivpu_ipc_receive(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
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struct ivpu_ipc_hdr *ipc_buf, struct vpu_jsm_msg *jsm_msg,
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unsigned long timeout_ms);
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int ivpu_ipc_send_receive_internal(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
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enum vpu_ipc_msg_type expected_resp_type,
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struct vpu_jsm_msg *resp, u32 channel, unsigned long timeout_ms);
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int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
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enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp,
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u32 channel, unsigned long timeout_ms);
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int ivpu_ipc_send_and_wait(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
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u32 channel, unsigned long timeout_ms);
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#endif /* __IVPU_IPC_H__ */
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