Srinivas Pandruvada e1eea3f839 platform/x86: ISST: Add new PCI device ids ...

Added new PCI device ids for supporting mailbox and MMIO interface for
Sapphire Rapids.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

2020-07-15 12:46:59 +03:00

..

isst_if_common.c

platform/x86: ISST: Allow additional core-power mailbox commands

2020-01-20 11:39:31 +02:00

isst_if_common.h

platform/x86: ISST: Add new PCI device ids

2020-07-15 12:46:59 +03:00

isst_if_mbox_msr.c

platform/x86: Convert to new CPU match macros

2020-03-24 21:33:00 +01:00

isst_if_mbox_pci.c

platform/x86: ISST: Add new PCI device ids

2020-07-15 12:46:59 +03:00

isst_if_mmio.c

platform/x86: ISST: Add new PCI device ids

2020-07-15 12:46:59 +03:00

Kconfig

platform/x86: ISST: Add common API to register and handle ioctls

2019-07-02 18:41:16 +03:00

Makefile

platform/x86: ISST: Add Intel Speed Select mailbox interface via MSRs

2019-07-02 18:41:16 +03:00