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SDM845 SoC includes the Mobile Display Sub System (MDSS) which is a
top level wrapper consisting of Display Processing Unit (DPU) and
display peripheral modules such as Display Serial Interface (DSI)
and DisplayPort (DP).
MDSS functions essentially as a back-end composition engine. It blends
video and graphic images stored in the frame buffers and scans out the
composed image to a display sink (over DSI/DP).
The following diagram represents hardware blocks for a simple pipeline
(two planes are present on a given crtc which is connected to a DSI
connector):
MDSS
+---------------------------------+
| +-----------------------------+ |
| | DPU | |
| | +--------+ +--------+ | |
| | | SSPP | | SSPP | | |
| | +----+---+ +----+---+ | |
| | | | | |
| | +----v-----------v---+ | |
| | | Layer Mixer (LM) | | |
| | +--------------------+ | |
| | +--------------------+ | |
| | | PingPong (PP) | | |
| | +--------------------+ | |
| | +--------------------+ | |
| | | INTERFACE (VIDEO) | | |
| | +---+----------------+ | |
| +------|----------------------+ |
| | |
| +------|---------------------+ |
| | | DISPLAY PERIPHERALS | |
| | +---v-+ +-----+ | |
| | | DSI | | DP | | |
| | +-----+ +-----+ | |
| +----------------------------+ |
+---------------------------------+
The number of DPU sub-blocks (i.e. SSPPs, LMs, PP blocks and INTFs)
depends on SoC capabilities.
Overview of DPU sub-blocks:
---------------------------
* Source Surface Processor (SSPP):
Refers to any of hardware pipes like ViG, DMA etc. Only ViG pipes are
capable of performing format conversion, scaling and quality improvement
for source surfaces.
* Layer Mixer (LM):
Blend source surfaces together (in requested zorder)
* PingPong (PP):
This block controls frame done interrupt output, EOL and EOF generation,
overflow/underflow control.
* Display interface (INTF):
Timing generator and interface connecting the display peripherals.
DRM components mapping to DPU architecture:
------------------------------------------
PLANEs maps to SSPPs
CRTC maps to LMs
Encoder maps to PPs, INTFs
Data flow setup:
---------------
MDSS hardware can support various data flows (e.g.):
- Dual pipe: Output from two LMs combined to single display.
- Split display: Output from two LMs connected to two separate
interfaces.
The hardware capabilities determine the number of concurrent data paths
possible. Any control path (i.e. pipeline w/i DPU) can be routed to any
of the hardware data paths. A given control path can be triggered,
flushed and controlled independently.
Changes in v3:
- Move msm_media_info.h from uapi to dpu/ subdir
- Remove preclose callback dpu (it's handled in core)
- Fix kbuild warnings with parent_ops
- Remove unused functions from dpu_core_irq
- Rename mdss_phys to mdss
- Rename mdp_phys address space to mdp
- Drop _phys from vbif and regdma binding names
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[robclark minor rebase]
Signed-off-by: Rob Clark <robdclark@gmail.com>
156 lines
3.7 KiB
C
156 lines
3.7 KiB
C
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
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#include <linux/mutex.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include "dpu_hw_mdss.h"
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#include "dpu_hw_blk.h"
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/* Serialization lock for dpu_hw_blk_list */
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static DEFINE_MUTEX(dpu_hw_blk_lock);
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/* List of all hw block objects */
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static LIST_HEAD(dpu_hw_blk_list);
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/**
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* dpu_hw_blk_init - initialize hw block object
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* @type: hw block type - enum dpu_hw_blk_type
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* @id: instance id of the hw block
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* @ops: Pointer to block operations
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* return: 0 if success; error code otherwise
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*/
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int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
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struct dpu_hw_blk_ops *ops)
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{
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if (!hw_blk) {
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pr_err("invalid parameters\n");
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return -EINVAL;
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}
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INIT_LIST_HEAD(&hw_blk->list);
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hw_blk->type = type;
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hw_blk->id = id;
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atomic_set(&hw_blk->refcount, 0);
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if (ops)
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hw_blk->ops = *ops;
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mutex_lock(&dpu_hw_blk_lock);
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list_add(&hw_blk->list, &dpu_hw_blk_list);
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mutex_unlock(&dpu_hw_blk_lock);
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return 0;
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}
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/**
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* dpu_hw_blk_destroy - destroy hw block object.
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* @hw_blk: pointer to hw block object
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* return: none
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*/
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void dpu_hw_blk_destroy(struct dpu_hw_blk *hw_blk)
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{
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if (!hw_blk) {
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pr_err("invalid parameters\n");
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return;
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}
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if (atomic_read(&hw_blk->refcount))
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pr_err("hw_blk:%d.%d invalid refcount\n", hw_blk->type,
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hw_blk->id);
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mutex_lock(&dpu_hw_blk_lock);
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list_del(&hw_blk->list);
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mutex_unlock(&dpu_hw_blk_lock);
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}
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/**
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* dpu_hw_blk_get - get hw_blk from free pool
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* @hw_blk: if specified, increment reference count only
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* @type: if hw_blk is not specified, allocate the next available of this type
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* @id: if specified (>= 0), allocate the given instance of the above type
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* return: pointer to hw block object
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*/
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struct dpu_hw_blk *dpu_hw_blk_get(struct dpu_hw_blk *hw_blk, u32 type, int id)
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{
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struct dpu_hw_blk *curr;
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int rc, refcount;
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if (!hw_blk) {
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mutex_lock(&dpu_hw_blk_lock);
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list_for_each_entry(curr, &dpu_hw_blk_list, list) {
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if ((curr->type != type) ||
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(id >= 0 && curr->id != id) ||
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(id < 0 &&
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atomic_read(&curr->refcount)))
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continue;
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hw_blk = curr;
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break;
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}
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mutex_unlock(&dpu_hw_blk_lock);
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}
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if (!hw_blk) {
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pr_debug("no hw_blk:%d\n", type);
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return NULL;
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}
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refcount = atomic_inc_return(&hw_blk->refcount);
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if (refcount == 1 && hw_blk->ops.start) {
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rc = hw_blk->ops.start(hw_blk);
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if (rc) {
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pr_err("failed to start hw_blk:%d rc:%d\n", type, rc);
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goto error_start;
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}
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}
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pr_debug("hw_blk:%d.%d refcount:%d\n", hw_blk->type,
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hw_blk->id, refcount);
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return hw_blk;
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error_start:
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dpu_hw_blk_put(hw_blk);
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return ERR_PTR(rc);
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}
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/**
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* dpu_hw_blk_put - put hw_blk to free pool if decremented refcount is zero
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* @hw_blk: hw block to be freed
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* @free_blk: function to be called when reference count goes to zero
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*/
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void dpu_hw_blk_put(struct dpu_hw_blk *hw_blk)
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{
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if (!hw_blk) {
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pr_err("invalid parameters\n");
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return;
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}
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pr_debug("hw_blk:%d.%d refcount:%d\n", hw_blk->type, hw_blk->id,
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atomic_read(&hw_blk->refcount));
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if (!atomic_read(&hw_blk->refcount)) {
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pr_err("hw_blk:%d.%d invalid put\n", hw_blk->type, hw_blk->id);
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return;
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}
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if (atomic_dec_return(&hw_blk->refcount))
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return;
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if (hw_blk->ops.stop)
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hw_blk->ops.stop(hw_blk);
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}
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