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b75513b0f1
[ Upstream commit 44922150d8 ]
If we have a series of events from userpsace, with %fprs=FPRS_FEF,
like follows:
ETRAP
ETRAP
VIS_ENTRY(fprs=0x4)
VIS_EXIT
RTRAP (kernel FPU restore with fpu_saved=0x4)
RTRAP
We will not restore the user registers that were clobbered by the FPU
using kernel code in the inner-most trap.
Traps allocate FPU save slots in the thread struct, and FPU using
sequences save the "dirty" FPU registers only.
This works at the initial trap level because all of the registers
get recorded into the top-level FPU save area, and we'll return
to userspace with the FPU disabled so that any FPU use by the user
will take an FPU disabled trap wherein we'll load the registers
back up properly.
But this is not how trap returns from kernel to kernel operate.
The simplest fix for this bug is to always save all FPU register state
for anything other than the top-most FPU save area.
Getting rid of the optimized inner-slot FPU saving code ends up
making VISEntryHalf degenerate into plain VISEntry.
Longer term we need to do something smarter to reinstate the partial
save optimizations. Perhaps the fundament error is having trap entry
and exit allocate FPU save slots and restore register state. Instead,
the VISEntry et al. calls should be doing that work.
This bug is about two decades old.
Reported-by: James Y Knight <jyknight@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
376 lines
8.4 KiB
ArmAsm
376 lines
8.4 KiB
ArmAsm
/* NG4memcpy.S: Niagara-4 optimized memcpy.
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*
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* Copyright (C) 2012 David S. Miller (davem@davemloft.net)
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*/
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#ifdef __KERNEL__
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#include <asm/visasm.h>
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#include <asm/asi.h>
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#define GLOBAL_SPARE %g7
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#else
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#define ASI_BLK_INIT_QUAD_LDD_P 0xe2
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#define FPRS_FEF 0x04
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/* On T4 it is very expensive to access ASRs like %fprs and
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* %asi, avoiding a read or a write can save ~50 cycles.
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*/
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#define FPU_ENTER \
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rd %fprs, %o5; \
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andcc %o5, FPRS_FEF, %g0; \
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be,a,pn %icc, 999f; \
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wr %g0, FPRS_FEF, %fprs; \
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999:
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#ifdef MEMCPY_DEBUG
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#define VISEntryHalf FPU_ENTER; \
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clr %g1; clr %g2; clr %g3; clr %g5; subcc %g0, %g0, %g0;
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#define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
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#else
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#define VISEntryHalf FPU_ENTER
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#define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
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#endif
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#define GLOBAL_SPARE %g5
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#endif
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#ifndef STORE_ASI
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#ifndef SIMULATE_NIAGARA_ON_NON_NIAGARA
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#define STORE_ASI ASI_BLK_INIT_QUAD_LDD_P
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#else
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#define STORE_ASI 0x80 /* ASI_P */
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#endif
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#endif
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#if !defined(EX_LD) && !defined(EX_ST)
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#define NON_USER_COPY
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#endif
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#ifndef EX_LD
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#define EX_LD(x) x
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#endif
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#ifndef EX_ST
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#define EX_ST(x) x
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#endif
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#ifndef EX_RETVAL
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#define EX_RETVAL(x) x
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#endif
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#ifndef LOAD
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#define LOAD(type,addr,dest) type [addr], dest
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#endif
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#ifndef STORE
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#ifndef MEMCPY_DEBUG
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#define STORE(type,src,addr) type src, [addr]
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#else
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#define STORE(type,src,addr) type##a src, [addr] %asi
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#endif
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#endif
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#ifndef STORE_INIT
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#define STORE_INIT(src,addr) stxa src, [addr] STORE_ASI
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#endif
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#ifndef FUNC_NAME
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#define FUNC_NAME NG4memcpy
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#endif
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#ifndef PREAMBLE
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#define PREAMBLE
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#endif
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#ifndef XCC
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#define XCC xcc
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#endif
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.register %g2,#scratch
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.register %g3,#scratch
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.text
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.align 64
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.globl FUNC_NAME
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.type FUNC_NAME,#function
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FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
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#ifdef MEMCPY_DEBUG
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wr %g0, 0x80, %asi
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#endif
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srlx %o2, 31, %g2
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cmp %g2, 0
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tne %XCC, 5
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PREAMBLE
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mov %o0, %o3
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brz,pn %o2, .Lexit
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cmp %o2, 3
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ble,pn %icc, .Ltiny
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cmp %o2, 19
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ble,pn %icc, .Lsmall
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or %o0, %o1, %g2
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cmp %o2, 128
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bl,pn %icc, .Lmedium
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nop
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.Llarge:/* len >= 0x80 */
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/* First get dest 8 byte aligned. */
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sub %g0, %o0, %g1
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and %g1, 0x7, %g1
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brz,pt %g1, 51f
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sub %o2, %g1, %o2
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1: EX_LD(LOAD(ldub, %o1 + 0x00, %g2))
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add %o1, 1, %o1
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subcc %g1, 1, %g1
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add %o0, 1, %o0
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bne,pt %icc, 1b
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EX_ST(STORE(stb, %g2, %o0 - 0x01))
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51: LOAD(prefetch, %o1 + 0x040, #n_reads_strong)
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LOAD(prefetch, %o1 + 0x080, #n_reads_strong)
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LOAD(prefetch, %o1 + 0x0c0, #n_reads_strong)
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LOAD(prefetch, %o1 + 0x100, #n_reads_strong)
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LOAD(prefetch, %o1 + 0x140, #n_reads_strong)
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LOAD(prefetch, %o1 + 0x180, #n_reads_strong)
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LOAD(prefetch, %o1 + 0x1c0, #n_reads_strong)
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LOAD(prefetch, %o1 + 0x200, #n_reads_strong)
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/* Check if we can use the straight fully aligned
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* loop, or we require the alignaddr/faligndata variant.
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*/
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andcc %o1, 0x7, %o5
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bne,pn %icc, .Llarge_src_unaligned
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sub %g0, %o0, %g1
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/* Legitimize the use of initializing stores by getting dest
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* to be 64-byte aligned.
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*/
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and %g1, 0x3f, %g1
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brz,pt %g1, .Llarge_aligned
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sub %o2, %g1, %o2
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1: EX_LD(LOAD(ldx, %o1 + 0x00, %g2))
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add %o1, 8, %o1
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subcc %g1, 8, %g1
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add %o0, 8, %o0
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bne,pt %icc, 1b
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EX_ST(STORE(stx, %g2, %o0 - 0x08))
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.Llarge_aligned:
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/* len >= 0x80 && src 8-byte aligned && dest 8-byte aligned */
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andn %o2, 0x3f, %o4
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sub %o2, %o4, %o2
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1: EX_LD(LOAD(ldx, %o1 + 0x00, %g1))
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add %o1, 0x40, %o1
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EX_LD(LOAD(ldx, %o1 - 0x38, %g2))
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subcc %o4, 0x40, %o4
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EX_LD(LOAD(ldx, %o1 - 0x30, %g3))
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EX_LD(LOAD(ldx, %o1 - 0x28, GLOBAL_SPARE))
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EX_LD(LOAD(ldx, %o1 - 0x20, %o5))
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EX_ST(STORE_INIT(%g1, %o0))
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add %o0, 0x08, %o0
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EX_ST(STORE_INIT(%g2, %o0))
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add %o0, 0x08, %o0
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EX_LD(LOAD(ldx, %o1 - 0x18, %g2))
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EX_ST(STORE_INIT(%g3, %o0))
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add %o0, 0x08, %o0
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EX_LD(LOAD(ldx, %o1 - 0x10, %g3))
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EX_ST(STORE_INIT(GLOBAL_SPARE, %o0))
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add %o0, 0x08, %o0
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EX_LD(LOAD(ldx, %o1 - 0x08, GLOBAL_SPARE))
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EX_ST(STORE_INIT(%o5, %o0))
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add %o0, 0x08, %o0
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EX_ST(STORE_INIT(%g2, %o0))
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add %o0, 0x08, %o0
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EX_ST(STORE_INIT(%g3, %o0))
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add %o0, 0x08, %o0
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EX_ST(STORE_INIT(GLOBAL_SPARE, %o0))
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add %o0, 0x08, %o0
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bne,pt %icc, 1b
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LOAD(prefetch, %o1 + 0x200, #n_reads_strong)
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membar #StoreLoad | #StoreStore
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brz,pn %o2, .Lexit
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cmp %o2, 19
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ble,pn %icc, .Lsmall_unaligned
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nop
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ba,a,pt %icc, .Lmedium_noprefetch
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.Lexit: retl
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mov EX_RETVAL(%o3), %o0
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.Llarge_src_unaligned:
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#ifdef NON_USER_COPY
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VISEntryHalfFast(.Lmedium_vis_entry_fail)
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#else
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VISEntryHalf
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#endif
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andn %o2, 0x3f, %o4
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sub %o2, %o4, %o2
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alignaddr %o1, %g0, %g1
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add %o1, %o4, %o1
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EX_LD(LOAD(ldd, %g1 + 0x00, %f0))
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1: EX_LD(LOAD(ldd, %g1 + 0x08, %f2))
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subcc %o4, 0x40, %o4
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EX_LD(LOAD(ldd, %g1 + 0x10, %f4))
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EX_LD(LOAD(ldd, %g1 + 0x18, %f6))
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EX_LD(LOAD(ldd, %g1 + 0x20, %f8))
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EX_LD(LOAD(ldd, %g1 + 0x28, %f10))
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EX_LD(LOAD(ldd, %g1 + 0x30, %f12))
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EX_LD(LOAD(ldd, %g1 + 0x38, %f14))
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faligndata %f0, %f2, %f16
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EX_LD(LOAD(ldd, %g1 + 0x40, %f0))
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faligndata %f2, %f4, %f18
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add %g1, 0x40, %g1
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faligndata %f4, %f6, %f20
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faligndata %f6, %f8, %f22
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faligndata %f8, %f10, %f24
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faligndata %f10, %f12, %f26
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faligndata %f12, %f14, %f28
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faligndata %f14, %f0, %f30
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EX_ST(STORE(std, %f16, %o0 + 0x00))
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EX_ST(STORE(std, %f18, %o0 + 0x08))
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EX_ST(STORE(std, %f20, %o0 + 0x10))
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EX_ST(STORE(std, %f22, %o0 + 0x18))
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EX_ST(STORE(std, %f24, %o0 + 0x20))
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EX_ST(STORE(std, %f26, %o0 + 0x28))
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EX_ST(STORE(std, %f28, %o0 + 0x30))
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EX_ST(STORE(std, %f30, %o0 + 0x38))
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add %o0, 0x40, %o0
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bne,pt %icc, 1b
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LOAD(prefetch, %g1 + 0x200, #n_reads_strong)
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#ifdef NON_USER_COPY
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VISExitHalfFast
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#else
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VISExitHalf
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#endif
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brz,pn %o2, .Lexit
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cmp %o2, 19
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ble,pn %icc, .Lsmall_unaligned
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nop
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ba,a,pt %icc, .Lmedium_unaligned
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#ifdef NON_USER_COPY
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.Lmedium_vis_entry_fail:
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or %o0, %o1, %g2
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#endif
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.Lmedium:
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LOAD(prefetch, %o1 + 0x40, #n_reads_strong)
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andcc %g2, 0x7, %g0
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bne,pn %icc, .Lmedium_unaligned
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nop
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.Lmedium_noprefetch:
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andncc %o2, 0x20 - 1, %o5
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be,pn %icc, 2f
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sub %o2, %o5, %o2
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1: EX_LD(LOAD(ldx, %o1 + 0x00, %g1))
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EX_LD(LOAD(ldx, %o1 + 0x08, %g2))
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EX_LD(LOAD(ldx, %o1 + 0x10, GLOBAL_SPARE))
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EX_LD(LOAD(ldx, %o1 + 0x18, %o4))
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add %o1, 0x20, %o1
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subcc %o5, 0x20, %o5
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EX_ST(STORE(stx, %g1, %o0 + 0x00))
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EX_ST(STORE(stx, %g2, %o0 + 0x08))
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EX_ST(STORE(stx, GLOBAL_SPARE, %o0 + 0x10))
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EX_ST(STORE(stx, %o4, %o0 + 0x18))
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bne,pt %icc, 1b
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add %o0, 0x20, %o0
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2: andcc %o2, 0x18, %o5
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be,pt %icc, 3f
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sub %o2, %o5, %o2
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1: EX_LD(LOAD(ldx, %o1 + 0x00, %g1))
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add %o1, 0x08, %o1
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add %o0, 0x08, %o0
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subcc %o5, 0x08, %o5
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bne,pt %icc, 1b
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EX_ST(STORE(stx, %g1, %o0 - 0x08))
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3: brz,pt %o2, .Lexit
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cmp %o2, 0x04
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bl,pn %icc, .Ltiny
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nop
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EX_LD(LOAD(lduw, %o1 + 0x00, %g1))
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add %o1, 0x04, %o1
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add %o0, 0x04, %o0
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subcc %o2, 0x04, %o2
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bne,pn %icc, .Ltiny
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EX_ST(STORE(stw, %g1, %o0 - 0x04))
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ba,a,pt %icc, .Lexit
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.Lmedium_unaligned:
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/* First get dest 8 byte aligned. */
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sub %g0, %o0, %g1
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and %g1, 0x7, %g1
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brz,pt %g1, 2f
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sub %o2, %g1, %o2
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1: EX_LD(LOAD(ldub, %o1 + 0x00, %g2))
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add %o1, 1, %o1
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subcc %g1, 1, %g1
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add %o0, 1, %o0
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bne,pt %icc, 1b
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EX_ST(STORE(stb, %g2, %o0 - 0x01))
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2:
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and %o1, 0x7, %g1
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brz,pn %g1, .Lmedium_noprefetch
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sll %g1, 3, %g1
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mov 64, %g2
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sub %g2, %g1, %g2
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andn %o1, 0x7, %o1
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EX_LD(LOAD(ldx, %o1 + 0x00, %o4))
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sllx %o4, %g1, %o4
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andn %o2, 0x08 - 1, %o5
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sub %o2, %o5, %o2
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1: EX_LD(LOAD(ldx, %o1 + 0x08, %g3))
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add %o1, 0x08, %o1
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subcc %o5, 0x08, %o5
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srlx %g3, %g2, GLOBAL_SPARE
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or GLOBAL_SPARE, %o4, GLOBAL_SPARE
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EX_ST(STORE(stx, GLOBAL_SPARE, %o0 + 0x00))
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add %o0, 0x08, %o0
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bne,pt %icc, 1b
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sllx %g3, %g1, %o4
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srl %g1, 3, %g1
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add %o1, %g1, %o1
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brz,pn %o2, .Lexit
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nop
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ba,pt %icc, .Lsmall_unaligned
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.Ltiny:
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EX_LD(LOAD(ldub, %o1 + 0x00, %g1))
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subcc %o2, 1, %o2
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be,pn %icc, .Lexit
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EX_ST(STORE(stb, %g1, %o0 + 0x00))
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EX_LD(LOAD(ldub, %o1 + 0x01, %g1))
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subcc %o2, 1, %o2
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be,pn %icc, .Lexit
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EX_ST(STORE(stb, %g1, %o0 + 0x01))
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EX_LD(LOAD(ldub, %o1 + 0x02, %g1))
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ba,pt %icc, .Lexit
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EX_ST(STORE(stb, %g1, %o0 + 0x02))
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.Lsmall:
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andcc %g2, 0x3, %g0
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bne,pn %icc, .Lsmall_unaligned
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andn %o2, 0x4 - 1, %o5
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sub %o2, %o5, %o2
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1:
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EX_LD(LOAD(lduw, %o1 + 0x00, %g1))
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add %o1, 0x04, %o1
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subcc %o5, 0x04, %o5
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add %o0, 0x04, %o0
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bne,pt %icc, 1b
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EX_ST(STORE(stw, %g1, %o0 - 0x04))
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brz,pt %o2, .Lexit
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nop
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ba,a,pt %icc, .Ltiny
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.Lsmall_unaligned:
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1: EX_LD(LOAD(ldub, %o1 + 0x00, %g1))
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add %o1, 1, %o1
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add %o0, 1, %o0
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subcc %o2, 1, %o2
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bne,pt %icc, 1b
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EX_ST(STORE(stb, %g1, %o0 - 0x01))
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ba,a,pt %icc, .Lexit
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.size FUNC_NAME, .-FUNC_NAME
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