Charlene Liu aadaeca46c drm/amd/display: remove dtbclk_ss compensation for dcn316 ...

[why]
dcn316's dtbclk is from non_ss clock source.
no compensation required here.

Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2022-04-13 22:23:54 -04:00

..

dce_clk_mgr.c

drm/amd/display: remove dtbclk_ss compensation for dcn316

2022-04-13 22:23:54 -04:00

dce_clk_mgr.h

drm/amd/display: Add DCN2 clk mgr

2019-06-21 18:59:34 -05:00