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When FEAT_SPE_PBT is implemented, the previous branch target address (named as PBT) before the sampled operation, will be recorded. This commit first introduces a 'prev_br_tgt' field in the record for saving the PBT address in the decoder. If the current operation is a branch instruction, by combining with PBT, it can create a chain with two consecutive branches. As the branch stack stores branches in descending order, meaning a newer branch is stored in a lower entry in the stack. Arm SPE stores the latest branch in the first entry of branch stack, and the previous branch coming from PBT is stored into the second entry. Otherwise, if current operation is not a branch, the last branch will be saved for PBT only. PBT lacks associated information such as branch source address, branch type, and events. The branch entry fills zeros for the corresponding fields and only set its target address. After: perf script -f --itrace=bl -F flags,addr,brstack jcc ffff800080187914 0xffff8000801878fc/0xffff800080187914/P/-/-/1/COND/- 0x0/0xffff8000801878f8/-/-/-/0//- jcc ffff8000802d12d8 0xffff8000802d12f8/0xffff8000802d12d8/P/-/-/1/COND/- 0x0/0xffff8000802d12ec/-/-/-/0//- jcc ffff8000813fe200 0xffff8000813fe20c/0xffff8000813fe200/P/-/-/1/COND/- 0x0/0xffff8000813fe200/-/-/-/0//- jcc ffff8000813fe200 0xffff8000813fe20c/0xffff8000813fe200/P/-/-/1/COND/- 0x0/0xffff8000813fe200/-/-/-/0//- jmp ffff800081410980 0xffff800081419108/0xffff800081410980/P/-/-/1//- 0x0/0xffff800081419104/-/-/-/0//- return ffff80008036e064 0xffff80008141ba84/0xffff80008036e064/P/-/-/1/RET/- 0x0/0xffff80008141ba60/-/-/-/0//- jcc ffff8000803d54f0 0xffff8000803d54e8/0xffff8000803d54f0/P/-/-/1/COND/- 0x0/0xffff8000803d54e0/-/-/-/0//- jmp ffff80008015e468 0xffff8000803d46dc/0xffff80008015e468/P/-/-/1//- 0x0/0xffff8000803d46c8/-/-/-/0//- jmp ffff8000806e2d50 0xffff80008040f710/0xffff8000806e2d50/P/-/-/1//- 0x0/0xffff80008040f6e8/-/-/-/0//- jcc ffff800080721704 0xffff8000807216b4/0xffff800080721704/P/-/-/1/COND/- 0x0/0xffff8000807216ac/-/-/-/0//- Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: James Clark <james.clark@linaro.org> Signed-off-by: Leo Yan <leo.yan@arm.com> Link: https://lore.kernel.org/r/20250304111240.3378214-13-leo.yan@arm.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
131 lines
3.2 KiB
C
131 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* arm_spe_decoder.h: Arm Statistical Profiling Extensions support
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* Copyright (c) 2019-2020, Arm Ltd.
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*/
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#ifndef INCLUDE__ARM_SPE_DECODER_H__
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#define INCLUDE__ARM_SPE_DECODER_H__
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include "arm-spe-pkt-decoder.h"
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enum arm_spe_sample_type {
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ARM_SPE_L1D_ACCESS = 1 << 0,
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ARM_SPE_L1D_MISS = 1 << 1,
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ARM_SPE_LLC_ACCESS = 1 << 2,
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ARM_SPE_LLC_MISS = 1 << 3,
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ARM_SPE_TLB_ACCESS = 1 << 4,
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ARM_SPE_TLB_MISS = 1 << 5,
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ARM_SPE_BRANCH_MISS = 1 << 6,
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ARM_SPE_REMOTE_ACCESS = 1 << 7,
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ARM_SPE_SVE_PARTIAL_PRED = 1 << 8,
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ARM_SPE_SVE_EMPTY_PRED = 1 << 9,
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ARM_SPE_BRANCH_NOT_TAKEN = 1 << 10,
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ARM_SPE_IN_TXN = 1 << 11,
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};
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enum arm_spe_op_type {
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/* First level operation type */
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ARM_SPE_OP_OTHER = 1 << 0,
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ARM_SPE_OP_LDST = 1 << 1,
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ARM_SPE_OP_BRANCH_ERET = 1 << 2,
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/* Second level operation type for OTHER */
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ARM_SPE_OP_SVE_OTHER = 1 << 16,
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ARM_SPE_OP_SVE_FP = 1 << 17,
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ARM_SPE_OP_SVE_PRED_OTHER = 1 << 18,
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/* Second level operation type for LDST */
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ARM_SPE_OP_LD = 1 << 16,
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ARM_SPE_OP_ST = 1 << 17,
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ARM_SPE_OP_ATOMIC = 1 << 18,
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ARM_SPE_OP_EXCL = 1 << 19,
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ARM_SPE_OP_AR = 1 << 20,
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ARM_SPE_OP_SIMD_FP = 1 << 21,
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ARM_SPE_OP_GP_REG = 1 << 22,
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ARM_SPE_OP_UNSPEC_REG = 1 << 23,
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ARM_SPE_OP_NV_SYSREG = 1 << 24,
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ARM_SPE_OP_SVE_LDST = 1 << 25,
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ARM_SPE_OP_SVE_PRED_LDST = 1 << 26,
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ARM_SPE_OP_SVE_SG = 1 << 27,
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/* Second level operation type for BRANCH_ERET */
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ARM_SPE_OP_BR_COND = 1 << 16,
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ARM_SPE_OP_BR_INDIRECT = 1 << 17,
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ARM_SPE_OP_BR_GCS = 1 << 18,
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ARM_SPE_OP_BR_CR_BL = 1 << 19,
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ARM_SPE_OP_BR_CR_RET = 1 << 20,
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ARM_SPE_OP_BR_CR_NON_BL_RET = 1 << 21,
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};
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enum arm_spe_common_data_source {
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ARM_SPE_COMMON_DS_L1D = 0x0,
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ARM_SPE_COMMON_DS_L2 = 0x8,
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ARM_SPE_COMMON_DS_PEER_CORE = 0x9,
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ARM_SPE_COMMON_DS_LOCAL_CLUSTER = 0xa,
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ARM_SPE_COMMON_DS_SYS_CACHE = 0xb,
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ARM_SPE_COMMON_DS_PEER_CLUSTER = 0xc,
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ARM_SPE_COMMON_DS_REMOTE = 0xd,
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ARM_SPE_COMMON_DS_DRAM = 0xe,
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};
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enum arm_spe_ampereone_data_source {
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ARM_SPE_AMPEREONE_LOCAL_CHIP_CACHE_OR_DEVICE = 0x0,
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ARM_SPE_AMPEREONE_SLC = 0x3,
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ARM_SPE_AMPEREONE_REMOTE_CHIP_CACHE = 0x5,
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ARM_SPE_AMPEREONE_DDR = 0x7,
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ARM_SPE_AMPEREONE_L1D = 0x8,
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ARM_SPE_AMPEREONE_L2D = 0x9,
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};
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struct arm_spe_record {
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enum arm_spe_sample_type type;
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int err;
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u32 op;
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u32 latency;
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u64 from_ip;
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u64 to_ip;
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u64 prev_br_tgt;
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u64 timestamp;
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u64 virt_addr;
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u64 phys_addr;
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u64 context_id;
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u16 source;
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};
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struct arm_spe_insn;
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struct arm_spe_buffer {
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const unsigned char *buf;
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size_t len;
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u64 offset;
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u64 trace_nr;
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};
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struct arm_spe_params {
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int (*get_trace)(struct arm_spe_buffer *buffer, void *data);
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void *data;
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};
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struct arm_spe_decoder {
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int (*get_trace)(struct arm_spe_buffer *buffer, void *data);
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void *data;
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struct arm_spe_record record;
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const unsigned char *buf;
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size_t len;
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struct arm_spe_pkt packet;
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};
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struct arm_spe_decoder *arm_spe_decoder_new(struct arm_spe_params *params);
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void arm_spe_decoder_free(struct arm_spe_decoder *decoder);
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int arm_spe_decode(struct arm_spe_decoder *decoder);
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#endif
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