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[WHY] DCN4+ supports a new register based mailbox for sending messages from host to DMCUB. This mailbox supports 64 byte commands, which makes it compatible with the same structure as the frame buffer based mailbox. [HOW] The intention for reg_inbox0 is to be slot in replacement for the frame buffer based mailbox (Inbox1). It supports all of the required features: - Supports all messages handled by FB Inbox1 - Supports multi command batching Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
444 lines
14 KiB
C
444 lines
14 KiB
C
// SPDX-License-Identifier: MIT
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//
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// Copyright 2024 Advanced Micro Devices, Inc.
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#include "dc.h"
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#include "dc_dmub_srv.h"
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#include "dmub/dmub_srv.h"
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#include "core_types.h"
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#include "dmub_replay.h"
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#define DC_TRACE_LEVEL_MESSAGE(...) /* do nothing */
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#define MAX_PIPES 6
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#define GPINT_RETRY_NUM 20
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static const uint8_t DP_SINK_DEVICE_STR_ID_1[] = {7, 1, 8, 7, 3};
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static const uint8_t DP_SINK_DEVICE_STR_ID_2[] = {7, 1, 8, 7, 5};
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/*
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* Get Replay state from firmware.
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*/
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static void dmub_replay_get_state(struct dmub_replay *dmub, enum replay_state *state, uint8_t panel_inst)
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{
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uint32_t retry_count = 0;
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do {
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// Send gpint command and wait for ack
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if (!dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__GET_REPLAY_STATE, panel_inst,
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(uint32_t *)state, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)) {
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// Return invalid state when GPINT times out
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*state = REPLAY_STATE_INVALID;
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}
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} while (++retry_count <= 1000 && *state == REPLAY_STATE_INVALID);
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// Assert if max retry hit
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if (retry_count >= 1000 && *state == REPLAY_STATE_INVALID) {
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ASSERT(0);
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/* To-do: Add retry fail log */
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}
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}
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/*
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* Enable/Disable Replay.
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*/
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static void dmub_replay_enable(struct dmub_replay *dmub, bool enable, bool wait, uint8_t panel_inst)
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{
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union dmub_rb_cmd cmd;
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struct dc_context *dc = dmub->ctx;
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uint32_t retry_count;
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enum replay_state state = REPLAY_STATE_0;
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memset(&cmd, 0, sizeof(cmd));
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cmd.replay_enable.header.type = DMUB_CMD__REPLAY;
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cmd.replay_enable.data.panel_inst = panel_inst;
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cmd.replay_enable.header.sub_type = DMUB_CMD__REPLAY_ENABLE;
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if (enable)
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cmd.replay_enable.data.enable = REPLAY_ENABLE;
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else
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cmd.replay_enable.data.enable = REPLAY_DISABLE;
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cmd.replay_enable.header.payload_bytes = sizeof(struct dmub_rb_cmd_replay_enable_data);
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dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
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/* Below loops 1000 x 500us = 500 ms.
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* Exit REPLAY may need to wait 1-2 frames to power up. Timeout after at
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* least a few frames. Should never hit the max retry assert below.
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*/
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if (wait) {
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for (retry_count = 0; retry_count <= 1000; retry_count++) {
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dmub_replay_get_state(dmub, &state, panel_inst);
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if (enable) {
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if (state != REPLAY_STATE_0)
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break;
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} else {
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if (state == REPLAY_STATE_0)
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break;
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}
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/* must *not* be fsleep - this can be called from high irq levels */
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udelay(500);
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}
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/* assert if max retry hit */
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if (retry_count >= 1000)
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ASSERT(0);
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}
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}
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/*
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* Set REPLAY power optimization flags.
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*/
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static void dmub_replay_set_power_opt(struct dmub_replay *dmub, unsigned int power_opt, uint8_t panel_inst)
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{
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union dmub_rb_cmd cmd;
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struct dc_context *dc = dmub->ctx;
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memset(&cmd, 0, sizeof(cmd));
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cmd.replay_set_power_opt.header.type = DMUB_CMD__REPLAY;
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cmd.replay_set_power_opt.header.sub_type = DMUB_CMD__SET_REPLAY_POWER_OPT;
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cmd.replay_set_power_opt.header.payload_bytes = sizeof(struct dmub_cmd_replay_set_power_opt_data);
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cmd.replay_set_power_opt.replay_set_power_opt_data.power_opt = power_opt;
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cmd.replay_set_power_opt.replay_set_power_opt_data.panel_inst = panel_inst;
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dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
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}
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/*
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* Setup Replay by programming phy registers and sending replay hw context values to firmware.
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*/
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static bool dmub_replay_copy_settings(struct dmub_replay *dmub,
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struct dc_link *link,
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struct replay_context *replay_context,
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uint8_t panel_inst)
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{
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union dmub_rb_cmd cmd;
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struct dc_context *dc = dmub->ctx;
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struct dmub_cmd_replay_copy_settings_data *copy_settings_data
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= &cmd.replay_copy_settings.replay_copy_settings_data;
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struct pipe_ctx *pipe_ctx = NULL;
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struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx;
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int i = 0;
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for (i = 0; i < MAX_PIPES; i++) {
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if (res_ctx &&
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res_ctx->pipe_ctx[i].stream &&
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res_ctx->pipe_ctx[i].stream->link &&
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res_ctx->pipe_ctx[i].stream->link == link &&
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res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) {
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pipe_ctx = &res_ctx->pipe_ctx[i];
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//TODO: refactor for multi edp support
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break;
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}
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}
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if (!pipe_ctx)
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return false;
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memset(&cmd, 0, sizeof(cmd));
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cmd.replay_copy_settings.header.type = DMUB_CMD__REPLAY;
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cmd.replay_copy_settings.header.sub_type = DMUB_CMD__REPLAY_COPY_SETTINGS;
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cmd.replay_copy_settings.header.payload_bytes = sizeof(struct dmub_cmd_replay_copy_settings_data);
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// HW insts
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copy_settings_data->aux_inst = replay_context->aux_inst;
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copy_settings_data->digbe_inst = replay_context->digbe_inst;
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copy_settings_data->digfe_inst = replay_context->digfe_inst;
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if (pipe_ctx->plane_res.dpp)
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copy_settings_data->dpp_inst = pipe_ctx->plane_res.dpp->inst;
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else
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copy_settings_data->dpp_inst = 0;
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if (pipe_ctx->stream_res.tg)
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copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst;
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else
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copy_settings_data->otg_inst = 0;
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copy_settings_data->dpphy_inst = link->link_enc->transmitter;
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// Misc
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copy_settings_data->line_time_in_ns = replay_context->line_time_in_ns;
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copy_settings_data->panel_inst = panel_inst;
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copy_settings_data->debug.u32All = link->replay_settings.config.debug_flags;
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copy_settings_data->pixel_deviation_per_line = link->dpcd_caps.pr_info.pixel_deviation_per_line;
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copy_settings_data->max_deviation_line = link->dpcd_caps.pr_info.max_deviation_line;
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copy_settings_data->smu_optimizations_en = link->replay_settings.replay_smu_opt_enable;
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copy_settings_data->replay_timing_sync_supported = link->replay_settings.config.replay_timing_sync_supported;
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copy_settings_data->debug.bitfields.enable_ips_visual_confirm = dc->dc->debug.enable_ips_visual_confirm;
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copy_settings_data->flags.u32All = 0;
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copy_settings_data->flags.bitfields.fec_enable_status = (link->fec_state == dc_link_fec_enabled);
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copy_settings_data->flags.bitfields.dsc_enable_status = (pipe_ctx->stream->timing.flags.DSC == 1);
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// WA for PSRSU+DSC on specific TCON, if DSC is enabled, force PSRSU as ffu mode(full frame update)
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if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE &&
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!link->dc->debug.disable_fec) &&
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(link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
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!link->panel_config.dsc.disable_dsc_edp &&
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link->dc->caps.edp_dsc_support)) &&
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link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 &&
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(!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1,
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sizeof(DP_SINK_DEVICE_STR_ID_1)) ||
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!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_2,
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sizeof(DP_SINK_DEVICE_STR_ID_2))))
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copy_settings_data->flags.bitfields.force_wakeup_by_tps3 = 1;
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else
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copy_settings_data->flags.bitfields.force_wakeup_by_tps3 = 0;
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dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
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return true;
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}
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/*
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* Set coasting vtotal.
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*/
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static void dmub_replay_set_coasting_vtotal(struct dmub_replay *dmub,
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uint32_t coasting_vtotal,
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uint8_t panel_inst)
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{
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union dmub_rb_cmd cmd;
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struct dc_context *dc = dmub->ctx;
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struct dmub_rb_cmd_replay_set_coasting_vtotal *pCmd = NULL;
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pCmd = &(cmd.replay_set_coasting_vtotal);
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memset(&cmd, 0, sizeof(cmd));
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pCmd->header.type = DMUB_CMD__REPLAY;
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pCmd->header.sub_type = DMUB_CMD__REPLAY_SET_COASTING_VTOTAL;
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pCmd->header.payload_bytes = sizeof(struct dmub_cmd_replay_set_coasting_vtotal_data);
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pCmd->replay_set_coasting_vtotal_data.coasting_vtotal = (coasting_vtotal & 0xFFFF);
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pCmd->replay_set_coasting_vtotal_data.coasting_vtotal_high = (coasting_vtotal & 0xFFFF0000) >> 16;
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dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
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}
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/*
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* Get Replay residency from firmware.
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*/
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static void dmub_replay_residency(struct dmub_replay *dmub, uint8_t panel_inst,
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uint32_t *residency, const bool is_start, enum pr_residency_mode mode)
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{
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uint16_t param = (uint16_t)(panel_inst << 8);
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uint32_t i = 0;
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switch (mode) {
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case PR_RESIDENCY_MODE_PHY:
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param |= REPLAY_RESIDENCY_FIELD_MODE_PHY;
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break;
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case PR_RESIDENCY_MODE_ALPM:
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param |= REPLAY_RESIDENCY_FIELD_MODE_ALPM;
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break;
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case PR_RESIDENCY_MODE_IPS2:
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param |= REPLAY_RESIDENCY_REVISION_1;
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param |= REPLAY_RESIDENCY_FIELD_MODE2_IPS;
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break;
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case PR_RESIDENCY_MODE_FRAME_CNT:
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param |= REPLAY_RESIDENCY_REVISION_1;
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param |= REPLAY_RESIDENCY_FIELD_MODE2_FRAME_CNT;
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break;
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case PR_RESIDENCY_MODE_ENABLEMENT_PERIOD:
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param |= REPLAY_RESIDENCY_REVISION_1;
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param |= REPLAY_RESIDENCY_FIELD_MODE2_EN_PERIOD;
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break;
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default:
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break;
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}
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if (is_start)
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param |= REPLAY_RESIDENCY_ENABLE;
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for (i = 0; i < GPINT_RETRY_NUM; i++) {
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// Send gpint command and wait for ack
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if (dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__REPLAY_RESIDENCY, param,
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residency, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
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return;
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udelay(100);
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}
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// it means gpint retry many times
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*residency = 0;
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}
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/*
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* Set REPLAY power optimization flags and coasting vtotal.
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*/
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static void dmub_replay_set_power_opt_and_coasting_vtotal(struct dmub_replay *dmub,
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unsigned int power_opt, uint8_t panel_inst, uint32_t coasting_vtotal)
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{
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union dmub_rb_cmd cmd;
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struct dc_context *dc = dmub->ctx;
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struct dmub_rb_cmd_replay_set_power_opt_and_coasting_vtotal *pCmd = NULL;
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pCmd = &(cmd.replay_set_power_opt_and_coasting_vtotal);
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memset(&cmd, 0, sizeof(cmd));
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pCmd->header.type = DMUB_CMD__REPLAY;
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pCmd->header.sub_type = DMUB_CMD__REPLAY_SET_POWER_OPT_AND_COASTING_VTOTAL;
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pCmd->header.payload_bytes =
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sizeof(struct dmub_rb_cmd_replay_set_power_opt_and_coasting_vtotal) -
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sizeof(struct dmub_cmd_header);
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pCmd->replay_set_power_opt_data.power_opt = power_opt;
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pCmd->replay_set_power_opt_data.panel_inst = panel_inst;
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pCmd->replay_set_coasting_vtotal_data.coasting_vtotal = (coasting_vtotal & 0xFFFF);
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pCmd->replay_set_coasting_vtotal_data.coasting_vtotal_high = (coasting_vtotal & 0xFFFF0000) >> 16;
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dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
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}
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/*
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* send Replay general cmd to DMUB.
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*/
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static void dmub_replay_send_cmd(struct dmub_replay *dmub,
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enum replay_FW_Message_type msg, union dmub_replay_cmd_set *cmd_element)
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{
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union dmub_rb_cmd cmd;
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struct dc_context *ctx = NULL;
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if (dmub == NULL || cmd_element == NULL)
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return;
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ctx = dmub->ctx;
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if (ctx != NULL) {
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if (msg != Replay_Msg_Not_Support) {
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memset(&cmd, 0, sizeof(cmd));
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//Header
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cmd.replay_set_timing_sync.header.type = DMUB_CMD__REPLAY;
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} else
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return;
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} else
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return;
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switch (msg) {
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case Replay_Set_Timing_Sync_Supported:
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//Header
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cmd.replay_set_timing_sync.header.sub_type =
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DMUB_CMD__REPLAY_SET_TIMING_SYNC_SUPPORTED;
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cmd.replay_set_timing_sync.header.payload_bytes =
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sizeof(struct dmub_rb_cmd_replay_set_timing_sync) -
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sizeof(struct dmub_cmd_header);
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//Cmd Body
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cmd.replay_set_timing_sync.replay_set_timing_sync_data.panel_inst =
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cmd_element->sync_data.panel_inst;
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cmd.replay_set_timing_sync.replay_set_timing_sync_data.timing_sync_supported =
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cmd_element->sync_data.timing_sync_supported;
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break;
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case Replay_Set_Residency_Frameupdate_Timer:
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//Header
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cmd.replay_set_frameupdate_timer.header.sub_type =
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DMUB_CMD__REPLAY_SET_RESIDENCY_FRAMEUPDATE_TIMER;
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cmd.replay_set_frameupdate_timer.header.payload_bytes =
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sizeof(struct dmub_rb_cmd_replay_set_frameupdate_timer) -
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sizeof(struct dmub_cmd_header);
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//Cmd Body
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cmd.replay_set_frameupdate_timer.data.panel_inst =
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cmd_element->panel_inst;
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cmd.replay_set_frameupdate_timer.data.enable =
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cmd_element->timer_data.enable;
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cmd.replay_set_frameupdate_timer.data.frameupdate_count =
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cmd_element->timer_data.frameupdate_count;
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break;
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case Replay_Set_Pseudo_VTotal:
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//Header
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cmd.replay_set_pseudo_vtotal.header.sub_type =
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DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL;
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cmd.replay_set_pseudo_vtotal.header.payload_bytes =
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sizeof(struct dmub_rb_cmd_replay_set_pseudo_vtotal) -
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sizeof(struct dmub_cmd_header);
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//Cmd Body
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cmd.replay_set_pseudo_vtotal.data.panel_inst =
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cmd_element->pseudo_vtotal_data.panel_inst;
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cmd.replay_set_pseudo_vtotal.data.vtotal =
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cmd_element->pseudo_vtotal_data.vtotal;
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break;
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case Replay_Disabled_Adaptive_Sync_SDP:
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//Header
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cmd.replay_disabled_adaptive_sync_sdp.header.sub_type =
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DMUB_CMD__REPLAY_DISABLED_ADAPTIVE_SYNC_SDP;
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cmd.replay_disabled_adaptive_sync_sdp.header.payload_bytes =
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sizeof(struct dmub_rb_cmd_replay_disabled_adaptive_sync_sdp) -
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sizeof(struct dmub_cmd_header);
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//Cmd Body
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cmd.replay_disabled_adaptive_sync_sdp.data.panel_inst =
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cmd_element->disabled_adaptive_sync_sdp_data.panel_inst;
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cmd.replay_disabled_adaptive_sync_sdp.data.force_disabled =
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cmd_element->disabled_adaptive_sync_sdp_data.force_disabled;
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break;
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case Replay_Set_General_Cmd:
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//Header
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cmd.replay_set_general_cmd.header.sub_type =
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DMUB_CMD__REPLAY_SET_GENERAL_CMD;
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cmd.replay_set_general_cmd.header.payload_bytes =
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sizeof(struct dmub_rb_cmd_replay_set_general_cmd) -
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sizeof(struct dmub_cmd_header);
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//Cmd Body
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cmd.replay_set_general_cmd.data.panel_inst =
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cmd_element->set_general_cmd_data.panel_inst;
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cmd.replay_set_general_cmd.data.subtype =
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cmd_element->set_general_cmd_data.subtype;
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cmd.replay_set_general_cmd.data.param1 =
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cmd_element->set_general_cmd_data.param1;
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cmd.replay_set_general_cmd.data.param2 =
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cmd_element->set_general_cmd_data.param2;
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break;
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case Replay_Msg_Not_Support:
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default:
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return;
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break;
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}
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dc_wake_and_execute_dmub_cmd(ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
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}
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static const struct dmub_replay_funcs replay_funcs = {
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.replay_copy_settings = dmub_replay_copy_settings,
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.replay_enable = dmub_replay_enable,
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.replay_get_state = dmub_replay_get_state,
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.replay_set_power_opt = dmub_replay_set_power_opt,
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.replay_set_coasting_vtotal = dmub_replay_set_coasting_vtotal,
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.replay_residency = dmub_replay_residency,
|
|
.replay_set_power_opt_and_coasting_vtotal = dmub_replay_set_power_opt_and_coasting_vtotal,
|
|
.replay_send_cmd = dmub_replay_send_cmd,
|
|
};
|
|
|
|
/*
|
|
* Construct Replay object.
|
|
*/
|
|
static void dmub_replay_construct(struct dmub_replay *replay, struct dc_context *ctx)
|
|
{
|
|
replay->ctx = ctx;
|
|
replay->funcs = &replay_funcs;
|
|
}
|
|
|
|
/*
|
|
* Allocate and initialize Replay object.
|
|
*/
|
|
struct dmub_replay *dmub_replay_create(struct dc_context *ctx)
|
|
{
|
|
struct dmub_replay *replay = kzalloc(sizeof(struct dmub_replay), GFP_KERNEL);
|
|
|
|
if (replay == NULL) {
|
|
BREAK_TO_DEBUGGER();
|
|
return NULL;
|
|
}
|
|
|
|
dmub_replay_construct(replay, ctx);
|
|
|
|
return replay;
|
|
}
|
|
|
|
/*
|
|
* Deallocate Replay object.
|
|
*/
|
|
void dmub_replay_destroy(struct dmub_replay **dmub)
|
|
{
|
|
kfree(*dmub);
|
|
*dmub = NULL;
|
|
}
|