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66ebbdfdeb
Pull MSI interrupt updates from Thomas Gleixner: "Switch ARM/ARM64 over to the modern per device MSI domains. This simplifies the handling of platform MSI and wire to MSI controllers and removes about 500 lines of legacy code. Aside of that it paves the way for ARM/ARM64 to utilize the dynamic allocation of PCI/MSI interrupts and to support the upcoming non standard IMS (Interrupt Message Store) mechanism on PCIe devices" * tag 'irq-msi-2024-07-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits) irqchip/gic-v3-its: Correctly fish out the DID for platform MSI irqchip/gic-v3-its: Correctly honor the RID remapping genirq/msi: Move msi_device_data to core genirq/msi: Remove platform MSI leftovers irqchip/irq-mvebu-icu: Remove platform MSI leftovers irqchip/irq-mvebu-sei: Switch to MSI parent irqchip/mvebu-odmi: Switch to parent MSI irqchip/mvebu-gicp: Switch to MSI parent irqchip/irq-mvebu-icu: Prepare for real per device MSI irqchip/imx-mu-msi: Switch to MSI parent irqchip/gic-v2m: Switch to device MSI irqchip/gic_v3_mbi: Switch over to parent domain genirq/msi: Remove platform_msi_create_device_domain() irqchip/mbigen: Remove platform_msi_create_device_domain() fallback irqchip/gic-v3-its: Switch platform MSI to MSI parent irqchip/irq-msi-lib: Prepare for DOMAIN_BUS_WIRED_TO_MSI irqchip/mbigen: Prepare for real per device MSI irqchip/irq-msi-lib: Prepare for DEVICE MSI to replace platform MSI irqchip/gic-v3-its: Provide MSI parent for PCI/MSI[-X] irqchip/irq-msi-lib: Prepare for PCI MSI/MSIX ...
39 lines
1.1 KiB
C
39 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2002 ARM Limited, All Rights Reserved.
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*/
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#ifndef _IRQ_GIC_COMMON_H
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#define _IRQ_GIC_COMMON_H
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#include <linux/of.h>
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#include <linux/irqdomain.h>
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#include <linux/msi.h>
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#include <linux/irqchip/arm-gic-common.h>
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struct gic_quirk {
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const char *desc;
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const char *compatible;
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const char *property;
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bool (*init)(void *data);
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u32 iidr;
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u32 mask;
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};
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int gic_configure_irq(unsigned int irq, unsigned int type,
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void __iomem *base);
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void gic_dist_config(void __iomem *base, int gic_irqs, u8 priority);
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void gic_cpu_config(void __iomem *base, int nr, u8 priority);
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void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
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void *data);
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void gic_enable_of_quirks(const struct device_node *np,
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const struct gic_quirk *quirks, void *data);
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extern const struct msi_parent_ops gic_v3_its_msi_parent_ops;
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#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
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#define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1)
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#define RDIST_FLAGS_FORCE_NON_SHAREABLE (1 << 2)
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#endif /* _IRQ_GIC_COMMON_H */
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