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0420872478
So far, the SPINAND_PAGE_READ_FROM_CACHE_OP macro was taking a first argument, "fast", which was inducing the possibility to support higher bus frequencies than with the normal (slower) read from cache alternative. In practice, without frequency change on the bus, this was likely without effect, besides perhaps allowing another variant of the same command, that could run at the default highest speed. If we want to support this fully, we need to add a frequency parameter to the slowest command. But before we do that, let's drop the "fast" boolean from the macro and duplicate it, this will further help supporting having different frequencies allowed for each variant. The change is also of course propagated to all users. It has the nice effect to have all macros aligned on the same pattern. Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
314 lines
11 KiB
C
314 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018 exceet electronics GmbH
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* Copyright (c) 2018 Kontron Electronics GmbH
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*
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* Author: Frieder Schrempf <frieder.schrempf@kontron.de>
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/mtd/spinand.h>
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/* Kioxia is new name of Toshiba memory. */
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#define SPINAND_MFR_TOSHIBA 0x98
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#define TOSH_STATUS_ECC_HAS_BITFLIPS_T (3 << 4)
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static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_FAST_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(0, 1, NULL, 0));
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static SPINAND_OP_VARIANTS(write_cache_x4_variants,
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SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_x4_variants,
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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/*
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* Backward compatibility for 1st generation Serial NAND devices
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* which don't support Quad Program Load operation.
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*/
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_variants,
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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static int tx58cxgxsxraix_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section > 0)
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return -ERANGE;
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region->offset = mtd->oobsize / 2;
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region->length = mtd->oobsize / 2;
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return 0;
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}
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static int tx58cxgxsxraix_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section > 0)
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return -ERANGE;
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/* 2 bytes reserved for BBM */
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region->offset = 2;
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region->length = (mtd->oobsize / 2) - 2;
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return 0;
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}
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static const struct mtd_ooblayout_ops tx58cxgxsxraix_ooblayout = {
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.ecc = tx58cxgxsxraix_ooblayout_ecc,
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.free = tx58cxgxsxraix_ooblayout_free,
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};
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static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
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u8 status)
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{
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struct nand_device *nand = spinand_to_nand(spinand);
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u8 mbf = 0;
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf);
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switch (status & STATUS_ECC_MASK) {
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case STATUS_ECC_NO_BITFLIPS:
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return 0;
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case STATUS_ECC_UNCOR_ERROR:
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return -EBADMSG;
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case STATUS_ECC_HAS_BITFLIPS:
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case TOSH_STATUS_ECC_HAS_BITFLIPS_T:
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/*
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* Let's try to retrieve the real maximum number of bitflips
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* in order to avoid forcing the wear-leveling layer to move
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* data around if it's not necessary.
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*/
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if (spi_mem_exec_op(spinand->spimem, &op))
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return nanddev_get_ecc_conf(nand)->strength;
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mbf = *(spinand->scratchbuf) >> 4;
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if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf))
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return nanddev_get_ecc_conf(nand)->strength;
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return mbf;
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default:
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break;
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}
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return -EINVAL;
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}
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static const struct spinand_info toshiba_spinand_table[] = {
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/* 3.3V 1Gb (1st generation) */
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SPINAND_INFO("TC58CVG0S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 2Gb (1st generation) */
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SPINAND_INFO("TC58CVG1S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 4Gb (1st generation) */
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SPINAND_INFO("TC58CVG2S0HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 1Gb (1st generation) */
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SPINAND_INFO("TC58CYG0S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 2Gb (1st generation) */
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SPINAND_INFO("TC58CYG1S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 4Gb (1st generation) */
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SPINAND_INFO("TC58CYG2S0HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/*
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* 2nd generation serial nand has HOLD_D which is equivalent to
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* QE_BIT.
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*/
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/* 3.3V 1Gb (2nd generation) */
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SPINAND_INFO("TC58CVG0S3HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 2Gb (2nd generation) */
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SPINAND_INFO("TC58CVG1S3HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 4Gb (2nd generation) */
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SPINAND_INFO("TC58CVG2S0HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 8Gb (2nd generation) */
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SPINAND_INFO("TH58CVG3S0HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
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NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 1Gb (2nd generation) */
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SPINAND_INFO("TC58CYG0S3HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 2Gb (2nd generation) */
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SPINAND_INFO("TC58CYG1S3HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 4Gb (2nd generation) */
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SPINAND_INFO("TC58CYG2S0HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 8Gb (2nd generation) */
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SPINAND_INFO("TH58CYG3S0HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
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NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 1Gb (1st generation) */
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SPINAND_INFO("TC58NYG0S3HBAI4",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 4Gb (1st generation) */
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SPINAND_INFO("TH58NYG2S3HBAI4",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAC),
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NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 2, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 8Gb (1st generation) */
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SPINAND_INFO("TH58NYG3S0HBAI6",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA3),
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NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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};
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static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
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};
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const struct spinand_manufacturer toshiba_spinand_manufacturer = {
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.id = SPINAND_MFR_TOSHIBA,
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.name = "Toshiba",
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.chips = toshiba_spinand_table,
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.nchips = ARRAY_SIZE(toshiba_spinand_table),
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.ops = &toshiba_spinand_manuf_ops,
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};
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