Peter Geis 9c19c531dc phy: phy-rockchip-inno-usb2: support #address_cells = 2 ...

New Rockchip devices have the usb phy nodes as standalone devices.
These nodes have register nodes with #address_cells = 2, but only use 32
bit addresses.

Adjust the driver to check if the returned address is "0", and adjust
the index in that case.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-4-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

2021-12-23 16:54:48 +05:30

..

Kconfig

phy/rockchip: add Innosilicon-based CSI dphy

2021-06-21 09:26:13 +05:30

Makefile

phy/rockchip: add Innosilicon-based CSI dphy

2021-06-21 09:26:13 +05:30

phy-rockchip-dp.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 178

2019-05-30 11:29:19 -07:00

phy-rockchip-dphy-rx0.c

phy: rockchip-dphy-rx0: Include linux/delay.h

2020-09-22 19:44:04 +05:30

phy-rockchip-emmc.c

phy: rockchip: emmc, add vendor prefix to dts properties

2021-01-13 17:28:24 +05:30

phy-rockchip-inno-csidphy.c

phy/rockchip: add Innosilicon-based CSI dphy

2021-06-21 09:26:13 +05:30

phy-rockchip-inno-dsidphy.c

time64.h: Consolidated PSEC_PER_SEC definition

2021-04-06 16:32:17 -07:00

phy-rockchip-inno-hdmi.c

phy: rockchip: remove redundant initialization of pointer cfg

2021-06-21 09:22:37 +05:30

phy-rockchip-inno-usb2.c

phy: phy-rockchip-inno-usb2: support #address_cells = 2

2021-12-23 16:54:48 +05:30

phy-rockchip-pcie.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 235

2019-06-19 17:09:07 +02:00

phy-rockchip-typec.c

phy: rockchip-typec: add missing of_node_put

2021-03-15 15:35:32 +05:30

phy-rockchip-usb.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 235

2019-06-19 17:09:07 +02:00