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fe85ee3919
The FRED RSP0 MSR points to the top of the kernel stack for user level event delivery. As this is the task stack it needs to be updated when a task is scheduled in. The update is done at context switch. That means it's also done when switching to kernel threads, which is pointless as those never go out to user space. For KVM threads this means there are two writes to FRED_RSP0 as KVM has to switch to the guest value before VMENTER. Defer the update to the exit to user space path and cache the per CPU FRED_RSP0 value, so redundant writes can be avoided. Provide fred_sync_rsp0() for KVM to keep the cache in sync with the actual MSR value after returning from guest to host mode. [ tglx: Massage change log ] Suggested-by: Sean Christopherson <seanjc@google.com> Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Xin Li (Intel) <xin@zytor.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240822073906.2176342-4-xin@zytor.com
105 lines
3.1 KiB
C
105 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _ASM_X86_ENTRY_COMMON_H
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#define _ASM_X86_ENTRY_COMMON_H
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#include <linux/randomize_kstack.h>
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#include <linux/user-return-notifier.h>
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#include <asm/nospec-branch.h>
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#include <asm/io_bitmap.h>
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#include <asm/fpu/api.h>
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#include <asm/fred.h>
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/* Check that the stack and regs on entry from user mode are sane. */
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static __always_inline void arch_enter_from_user_mode(struct pt_regs *regs)
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{
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if (IS_ENABLED(CONFIG_DEBUG_ENTRY)) {
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/*
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* Make sure that the entry code gave us a sensible EFLAGS
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* register. Native because we want to check the actual CPU
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* state, not the interrupt state as imagined by Xen.
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*/
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unsigned long flags = native_save_fl();
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unsigned long mask = X86_EFLAGS_DF | X86_EFLAGS_NT;
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/*
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* For !SMAP hardware we patch out CLAC on entry.
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*/
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if (cpu_feature_enabled(X86_FEATURE_SMAP) ||
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cpu_feature_enabled(X86_FEATURE_XENPV))
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mask |= X86_EFLAGS_AC;
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WARN_ON_ONCE(flags & mask);
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/* We think we came from user mode. Make sure pt_regs agrees. */
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WARN_ON_ONCE(!user_mode(regs));
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/*
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* All entries from user mode (except #DF) should be on the
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* normal thread stack and should have user pt_regs in the
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* correct location.
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*/
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WARN_ON_ONCE(!on_thread_stack());
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WARN_ON_ONCE(regs != task_pt_regs(current));
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}
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}
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#define arch_enter_from_user_mode arch_enter_from_user_mode
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static inline void arch_exit_work(unsigned long ti_work)
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{
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if (ti_work & _TIF_USER_RETURN_NOTIFY)
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fire_user_return_notifiers();
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if (unlikely(ti_work & _TIF_IO_BITMAP))
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tss_update_io_bitmap();
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fpregs_assert_state_consistent();
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if (unlikely(ti_work & _TIF_NEED_FPU_LOAD))
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switch_fpu_return();
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}
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static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
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unsigned long ti_work)
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{
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if (IS_ENABLED(CONFIG_X86_DEBUG_FPU) || unlikely(ti_work))
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arch_exit_work(ti_work);
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fred_update_rsp0();
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#ifdef CONFIG_COMPAT
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/*
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* Compat syscalls set TS_COMPAT. Make sure we clear it before
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* returning to user mode. We need to clear it *after* signal
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* handling, because syscall restart has a fixup for compat
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* syscalls. The fixup is exercised by the ptrace_syscall_32
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* selftest.
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*
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* We also need to clear TS_REGS_POKED_I386: the 32-bit tracer
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* special case only applies after poking regs and before the
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* very next return to user mode.
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*/
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current_thread_info()->status &= ~(TS_COMPAT | TS_I386_REGS_POKED);
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#endif
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/*
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* This value will get limited by KSTACK_OFFSET_MAX(), which is 10
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* bits. The actual entropy will be further reduced by the compiler
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* when applying stack alignment constraints (see cc_stack_align4/8 in
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* arch/x86/Makefile), which will remove the 3 (x86_64) or 2 (ia32)
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* low bits from any entropy chosen here.
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*
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* Therefore, final stack offset entropy will be 7 (x86_64) or
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* 8 (ia32) bits.
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*/
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choose_random_kstack_offset(rdtsc());
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}
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#define arch_exit_to_user_mode_prepare arch_exit_to_user_mode_prepare
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static __always_inline void arch_exit_to_user_mode(void)
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{
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amd_clear_divider();
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}
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#define arch_exit_to_user_mode arch_exit_to_user_mode
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#endif
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