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8442df2b49
Add support for CPUID Fn8000_0021_EAX[31] (SRSO_MSR_FIX). If this bit is 1, it indicates that software may use MSR BP_CFG[BpSpecReduce] to mitigate SRSO. Enable BpSpecReduce to mitigate SRSO across guest/host boundaries. Switch back to enabling the bit when virtualization is enabled and to clear the bit when virtualization is disabled because using a MSR slot would clear the bit when the guest is exited and any training the guest has done, would potentially influence the host kernel when execution enters the kernel and hasn't VMRUN the guest yet. More detail on the public thread in Link below. Co-developed-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20241202120416.6054-1-bp@kernel.org
147 lines
2.7 KiB
C
147 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/export.h>
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#include <linux/percpu.h>
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#include <linux/preempt.h>
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#include <asm/msr.h>
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#define CREATE_TRACE_POINTS
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#include <asm/msr-trace.h>
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struct msr __percpu *msrs_alloc(void)
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{
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struct msr __percpu *msrs = NULL;
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msrs = alloc_percpu(struct msr);
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if (!msrs) {
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pr_warn("%s: error allocating msrs\n", __func__);
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return NULL;
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}
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return msrs;
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}
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EXPORT_SYMBOL(msrs_alloc);
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void msrs_free(struct msr __percpu *msrs)
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{
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free_percpu(msrs);
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}
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EXPORT_SYMBOL(msrs_free);
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/**
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* msr_read - Read an MSR with error handling
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* @msr: MSR to read
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* @m: value to read into
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*
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* It returns read data only on success, otherwise it doesn't change the output
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* argument @m.
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*
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* Return: %0 for success, otherwise an error code
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*/
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static int msr_read(u32 msr, struct msr *m)
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{
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int err;
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u64 val;
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err = rdmsrl_safe(msr, &val);
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if (!err)
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m->q = val;
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return err;
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}
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/**
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* msr_write - Write an MSR with error handling
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*
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* @msr: MSR to write
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* @m: value to write
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*
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* Return: %0 for success, otherwise an error code
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*/
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static int msr_write(u32 msr, struct msr *m)
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{
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return wrmsrl_safe(msr, m->q);
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}
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static inline int __flip_bit(u32 msr, u8 bit, bool set)
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{
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struct msr m, m1;
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int err = -EINVAL;
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if (bit > 63)
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return err;
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err = msr_read(msr, &m);
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if (err)
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return err;
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m1 = m;
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if (set)
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m1.q |= BIT_64(bit);
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else
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m1.q &= ~BIT_64(bit);
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if (m1.q == m.q)
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return 0;
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err = msr_write(msr, &m1);
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if (err)
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return err;
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return 1;
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}
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/**
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* msr_set_bit - Set @bit in a MSR @msr.
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* @msr: MSR to write
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* @bit: bit number to set
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*
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* Return:
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* * < 0: An error was encountered.
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* * = 0: Bit was already set.
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* * > 0: Hardware accepted the MSR write.
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*/
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int msr_set_bit(u32 msr, u8 bit)
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{
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return __flip_bit(msr, bit, true);
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}
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EXPORT_SYMBOL_GPL(msr_set_bit);
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/**
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* msr_clear_bit - Clear @bit in a MSR @msr.
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* @msr: MSR to write
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* @bit: bit number to clear
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*
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* Return:
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* * < 0: An error was encountered.
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* * = 0: Bit was already cleared.
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* * > 0: Hardware accepted the MSR write.
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*/
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int msr_clear_bit(u32 msr, u8 bit)
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{
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return __flip_bit(msr, bit, false);
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}
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EXPORT_SYMBOL_GPL(msr_clear_bit);
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#ifdef CONFIG_TRACEPOINTS
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void do_trace_write_msr(unsigned int msr, u64 val, int failed)
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{
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trace_write_msr(msr, val, failed);
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}
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EXPORT_SYMBOL(do_trace_write_msr);
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EXPORT_TRACEPOINT_SYMBOL(write_msr);
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void do_trace_read_msr(unsigned int msr, u64 val, int failed)
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{
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trace_read_msr(msr, val, failed);
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}
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EXPORT_SYMBOL(do_trace_read_msr);
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EXPORT_TRACEPOINT_SYMBOL(read_msr);
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void do_trace_rdpmc(unsigned counter, u64 val, int failed)
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{
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trace_rdpmc(counter, val, failed);
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}
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EXPORT_SYMBOL(do_trace_rdpmc);
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EXPORT_TRACEPOINT_SYMBOL(rdpmc);
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#endif
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