Files
linux/arch/riscv/boot/dts/microchip/Makefile
Conor Dooley d9c36d016f Merge patch series "Add a devicetree for the Aldec PolarFire SoC TySoM"
As it says on the tin, add a DT for this board. It's been sitting on my
desk for a while, so may as well have it upstream...

The DT is only partially complete, as it needs the fabric content added.
Unfortunately, I don't have a reference design in RTL or SmartDesign
for it and therefore don't know what that fabric content is.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-01-25 11:09:32 +00:00

8 lines
394 B
Makefile

# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))