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327959a489
[Why & How] Add DSC handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
58 lines
1.9 KiB
C
58 lines
1.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright 2023 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __DCN35_DSC_H__
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#define __DCN35_DSC_H__
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#include "dcn20/dcn20_dsc.h"
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#define DSC_REG_LIST_SH_MASK_DCN35(mask_sh) \
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DSC_REG_LIST_SH_MASK_DCN20(mask_sh), \
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DSC_SF(DSC_TOP0_DSC_TOP_CONTROL, DSC_FGCG_REP_DIS, mask_sh)
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#define DSC_FIELD_LIST_DCN35(type) \
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struct { \
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DSC_FIELD_LIST_DCN20(type); \
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type DSC_FGCG_REP_DIS; \
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}
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struct dcn35_dsc_shift {
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DSC_FIELD_LIST_DCN35(uint8_t);
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};
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struct dcn35_dsc_mask {
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DSC_FIELD_LIST_DCN35(uint32_t);
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};
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void dsc35_construct(struct dcn20_dsc *dsc,
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struct dc_context *ctx,
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int inst,
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const struct dcn20_dsc_registers *dsc_regs,
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const struct dcn35_dsc_shift *dsc_shift,
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const struct dcn35_dsc_mask *dsc_mask);
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void dsc35_set_fgcg(struct dcn20_dsc *dsc20, bool enable);
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#endif /* __DCN35_DSC_H__ */
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