Chris Park 6213044059 drm/amd/display: Disable MALL when SMU not present ...

[Why]
Bring-up purpose code to disable DMUB calling into
SMU and timeout for MALL when SMU is not present.

[How]
Disable MALL when SMU is not present.

Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-04-09 16:49:03 -04:00

..

abm.h

drm/amd/display: Move panel_cntl specific register from abm to panel_cntl.

2020-05-05 13:10:46 -04:00

audio.h

drm/amd/display: Disable audio stream only if it's currently enabled

2019-05-31 10:39:30 -05:00

aux_engine.h

drm/amd/display: Support for DMUB AUX

2021-03-02 14:05:41 -05:00

clk_mgr_internal.h

drm/amd/display: Simplify bool comparison

2021-02-09 15:49:42 -05:00

clk_mgr.h

drm/amd/display: Disable MALL when SMU not present

2021-04-09 16:49:03 -04:00

dccg.h

drm/amd/display: DPP DTO isn't update properly.

2020-03-19 00:03:04 -04:00

dchubbub.h

drm/amd/display: Populate hostvm parameter before DML calculation

2020-11-16 12:18:44 -05:00

dmcu.h

drm/amd/display: Process crc window at DMCU

2021-03-05 15:11:54 -05:00

dpp.h

drm/amd/display/dc/inc/hw/dpp: Mark 'dpp_input_csc_matrix' as __maybe_unused

2020-12-01 16:04:45 -05:00

dsc.h

drm/amd/display: Rename bytes_pp to the correct bits_pp

2020-07-27 16:23:21 -04:00

dwb.h

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

2020-11-04 17:11:37 -05:00

gpio.h

drm/amd/display: refactor gpio to allocate hw_container in constructor

2019-08-15 10:53:55 -05:00

hubp.h

drm/amd/display: Set max TTU on DPG enable

2021-04-09 16:48:53 -04:00

hw_shared.h

drm/amd/display: Update link encoder object creation

2021-03-02 14:05:52 -05:00

ipp.h

drm/amd/display: csc_transform to dc_csc_transform

2018-05-15 13:42:54 -05:00

link_encoder.h

drm/amd/display: Add dynamic link encoder selection.

2021-04-09 16:48:38 -04:00

mcif_wb.h

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

2020-11-04 17:11:37 -05:00

mem_input.h

drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag

2019-11-13 15:29:44 -05:00

mpc.h

drm/amd/display: add getter routine to retrieve mpcc mux

2020-12-23 15:02:55 -05:00

opp.h

drm/amd/display: Raise DPG height during timing synchronization

2020-10-26 13:29:21 -04:00

panel_cntl.h

drm/amd/display: Add read backlight interface

2020-08-17 14:08:12 -04:00

stream_encoder.h

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

2020-11-04 17:11:37 -05:00

timing_generator.h

drm/amd/display: Synchronize displays with different timings

2021-02-22 18:05:48 -05:00

transform.h

drm/amd/display: fix dml pipe merge logic

2020-04-09 10:43:17 -04:00

vmid.h

drm/amd/display: move vmid determination logic to a module

2019-06-22 09:34:14 -05:00