mirror of
https://github.com/raspberrypi/linux.git
synced 2026-01-04 18:27:36 +00:00
35b51afd23
Pull RISC-V updates from Palmer Dabbelt: - Support for the Svpbmt extension, which allows memory attributes to be encoded in pages - Support for the Allwinner D1's implementation of page-based memory attributes - Support for running rv32 binaries on rv64 systems, via the compat subsystem - Support for kexec_file() - Support for the new generic ticket-based spinlocks, which allows us to also move to qrwlock. These should have already gone in through the asm-geneic tree as well - A handful of cleanups and fixes, include some larger ones around atomics and XIP * tag 'riscv-for-linus-5.19-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (51 commits) RISC-V: Prepare dropping week attribute from arch_kexec_apply_relocations[_add] riscv: compat: Using seperated vdso_maps for compat_vdso_info RISC-V: Fix the XIP build RISC-V: Split out the XIP fixups into their own file RISC-V: ignore xipImage RISC-V: Avoid empty create_*_mapping definitions riscv: Don't output a bogus mmu-type on a no MMU kernel riscv: atomic: Add custom conditional atomic operation implementation riscv: atomic: Optimize dec_if_positive functions riscv: atomic: Cleanup unnecessary definition RISC-V: Load purgatory in kexec_file RISC-V: Add purgatory RISC-V: Support for kexec_file on panic RISC-V: Add kexec_file support RISC-V: use memcpy for kexec_file mode kexec_file: Fix kexec_file.c build error for riscv platform riscv: compat: Add COMPAT Kbuild skeletal support riscv: compat: ptrace: Add compat_arch_ptrace implement riscv: compat: signal: Add rt_frame implementation riscv: add memory-type errata for T-Head ...
84 lines
2.1 KiB
Plaintext
84 lines
2.1 KiB
Plaintext
menu "SoC selection"
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config SOC_MICROCHIP_POLARFIRE
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bool "Microchip PolarFire SoCs"
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select MCHP_CLK_MPFS
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select SIFIVE_PLIC
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help
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This enables support for Microchip PolarFire SoC platforms.
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config SOC_SIFIVE
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bool "SiFive SoCs"
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select SERIAL_SIFIVE if TTY
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select SERIAL_SIFIVE_CONSOLE if TTY
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select CLK_SIFIVE
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select CLK_SIFIVE_PRCI
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select SIFIVE_PLIC
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select ERRATA_SIFIVE if !XIP_KERNEL
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help
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This enables support for SiFive SoC platform hardware.
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config SOC_STARFIVE
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bool "StarFive SoCs"
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select PINCTRL
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select RESET_CONTROLLER
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select SIFIVE_PLIC
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help
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This enables support for StarFive SoC platform hardware.
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config SOC_VIRT
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bool "QEMU Virt Machine"
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select CLINT_TIMER if RISCV_M_MODE
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select POWER_RESET
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select POWER_RESET_SYSCON
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select POWER_RESET_SYSCON_POWEROFF
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select GOLDFISH
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select RTC_DRV_GOLDFISH if RTC_CLASS
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select SIFIVE_PLIC
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select PM_GENERIC_DOMAINS if PM
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select PM_GENERIC_DOMAINS_OF if PM && OF
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select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI
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help
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This enables support for QEMU Virt Machine.
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config SOC_CANAAN
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bool "Canaan Kendryte K210 SoC"
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depends on !MMU
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select CLINT_TIMER if RISCV_M_MODE
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select SERIAL_SIFIVE if TTY
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select SERIAL_SIFIVE_CONSOLE if TTY
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select SIFIVE_PLIC
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select ARCH_HAS_RESET_CONTROLLER
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select PINCTRL
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select COMMON_CLK
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select COMMON_CLK_K210
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help
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This enables support for Canaan Kendryte K210 SoC platform hardware.
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if SOC_CANAAN
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config SOC_CANAAN_K210_DTB_BUILTIN
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bool "Builtin device tree for the Canaan Kendryte K210"
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depends on SOC_CANAAN
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default y
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select OF
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select BUILTIN_DTB
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help
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Build a device tree for the Kendryte K210 into the Linux image.
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This option should be selected if no bootloader is being used.
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If unsure, say Y.
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config SOC_CANAAN_K210_DTB_SOURCE
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string "Source file for the Canaan Kendryte K210 builtin DTB"
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depends on SOC_CANAAN
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depends on SOC_CANAAN_K210_DTB_BUILTIN
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default "k210_generic"
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help
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Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
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for the DTS file that will be used to produce the DTB linked into the
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kernel.
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endif
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endmenu
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