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Kan Liang d872f17421 perf/x86/intel: Add more available bits for OFFCORE_RESPONSE of Intel Tremont

commit 0813c40556 upstream.

The mask in the extra_regs for Intel Tremont need to be extended to
allow more defined bits.

"Outstanding Requests" (bit 63) is only available on MSR_OFFCORE_RSP0;

Fixes: 6daeb8737f ("perf/x86/intel: Add Tremont core PMU support")
Reported-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20200501125442.7030-1-kan.liang@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2020-06-17 16:40:25 +02:00

amd

perf/amd/uncore: Replace manual sampling check with CAP_NO_INTERRUPT flag

2020-03-18 07:17:53 +01:00

intel

perf/x86/intel: Add more available bits for OFFCORE_RESPONSE of Intel Tremont

2020-06-17 16:40:25 +02:00

core.c

perf/x86/intel: Fix PT PMI handling

2020-01-12 12:21:36 +01:00

Kconfig

License cleanup: add SPDX GPL-2.0 license identifier to files with no license