mirror of
https://github.com/raspberrypi/linux.git
synced 2025-12-15 14:32:06 +00:00
f4000cd997
Pull arm64 updates from Catalin Marinas:
- struct thread_info moved off-stack (also touching
include/linux/thread_info.h and include/linux/restart_block.h)
- cpus_have_cap() reworked to avoid __builtin_constant_p() for static
key use (also touching drivers/irqchip/irq-gic-v3.c)
- uprobes support (currently only for native 64-bit tasks)
- Emulation of kernel Privileged Access Never (PAN) using TTBR0_EL1
switching to a reserved page table
- CPU capacity information passing via DT or sysfs (used by the
scheduler)
- support for systems without FP/SIMD (IOW, kernel avoids touching
these registers; there is no soft-float ABI, nor kernel emulation for
AArch64 FP/SIMD)
- handling of hardware watchpoint with unaligned addresses, varied
lengths and offsets from base
- use of the page table contiguous hint for kernel mappings
- hugetlb fixes for sizes involving the contiguous hint
- remove unnecessary I-cache invalidation in flush_cache_range()
- CNTHCTL_EL2 access fix for CPUs with VHE support (ARMv8.1)
- boot-time checks for writable+executable kernel mappings
- simplify asm/opcodes.h and avoid including the 32-bit ARM counterpart
and make the arm64 kernel headers self-consistent (Xen headers patch
merged separately)
- Workaround for broken .inst support in certain binutils versions
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (60 commits)
arm64: Disable PAN on uaccess_enable()
arm64: Work around broken .inst when defective gas is detected
arm64: Add detection code for broken .inst support in binutils
arm64: Remove reference to asm/opcodes.h
arm64: Get rid of asm/opcodes.h
arm64: smp: Prevent raw_smp_processor_id() recursion
arm64: head.S: Fix CNTHCTL_EL2 access on VHE system
arm64: Remove I-cache invalidation from flush_cache_range()
arm64: Enable HIBERNATION in defconfig
arm64: Enable CONFIG_ARM64_SW_TTBR0_PAN
arm64: xen: Enable user access before a privcmd hvc call
arm64: Handle faults caused by inadvertent user access with PAN enabled
arm64: Disable TTBR0_EL1 during normal kernel execution
arm64: Introduce uaccess_{disable,enable} functionality based on TTBR0_EL1
arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro
arm64: Factor out PAN enabling/disabling into separate uaccess_* macros
arm64: Update the synchronous external abort fault description
selftests: arm64: add test for unaligned/inexact watchpoint handling
arm64: Allow hw watchpoint of length 3,5,6 and 7
arm64: hw_breakpoint: Handle inexact watchpoint addresses
...
42 lines
1.4 KiB
C
42 lines
1.4 KiB
C
/*
|
|
* arch/arm64/include/asm/cpucaps.h
|
|
*
|
|
* Copyright (C) 2016 ARM Ltd.
|
|
*
|
|
* This program is free software: you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
#ifndef __ASM_CPUCAPS_H
|
|
#define __ASM_CPUCAPS_H
|
|
|
|
#define ARM64_WORKAROUND_CLEAN_CACHE 0
|
|
#define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1
|
|
#define ARM64_WORKAROUND_845719 2
|
|
#define ARM64_HAS_SYSREG_GIC_CPUIF 3
|
|
#define ARM64_HAS_PAN 4
|
|
#define ARM64_HAS_LSE_ATOMICS 5
|
|
#define ARM64_WORKAROUND_CAVIUM_23154 6
|
|
#define ARM64_WORKAROUND_834220 7
|
|
#define ARM64_HAS_NO_HW_PREFETCH 8
|
|
#define ARM64_HAS_UAO 9
|
|
#define ARM64_ALT_PAN_NOT_UAO 10
|
|
#define ARM64_HAS_VIRT_HOST_EXTN 11
|
|
#define ARM64_WORKAROUND_CAVIUM_27456 12
|
|
#define ARM64_HAS_32BIT_EL0 13
|
|
#define ARM64_HYP_OFFSET_LOW 14
|
|
#define ARM64_MISMATCHED_CACHE_LINE_SIZE 15
|
|
#define ARM64_HAS_NO_FPSIMD 16
|
|
|
|
#define ARM64_NCAPS 17
|
|
|
|
#endif /* __ASM_CPUCAPS_H */
|