mirror of
https://github.com/raspberrypi/linux.git
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Pull arm64 updates from Catalin Marinas:
- struct thread_info moved off-stack (also touching
include/linux/thread_info.h and include/linux/restart_block.h)
- cpus_have_cap() reworked to avoid __builtin_constant_p() for static
key use (also touching drivers/irqchip/irq-gic-v3.c)
- uprobes support (currently only for native 64-bit tasks)
- Emulation of kernel Privileged Access Never (PAN) using TTBR0_EL1
switching to a reserved page table
- CPU capacity information passing via DT or sysfs (used by the
scheduler)
- support for systems without FP/SIMD (IOW, kernel avoids touching
these registers; there is no soft-float ABI, nor kernel emulation for
AArch64 FP/SIMD)
- handling of hardware watchpoint with unaligned addresses, varied
lengths and offsets from base
- use of the page table contiguous hint for kernel mappings
- hugetlb fixes for sizes involving the contiguous hint
- remove unnecessary I-cache invalidation in flush_cache_range()
- CNTHCTL_EL2 access fix for CPUs with VHE support (ARMv8.1)
- boot-time checks for writable+executable kernel mappings
- simplify asm/opcodes.h and avoid including the 32-bit ARM counterpart
and make the arm64 kernel headers self-consistent (Xen headers patch
merged separately)
- Workaround for broken .inst support in certain binutils versions
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (60 commits)
arm64: Disable PAN on uaccess_enable()
arm64: Work around broken .inst when defective gas is detected
arm64: Add detection code for broken .inst support in binutils
arm64: Remove reference to asm/opcodes.h
arm64: Get rid of asm/opcodes.h
arm64: smp: Prevent raw_smp_processor_id() recursion
arm64: head.S: Fix CNTHCTL_EL2 access on VHE system
arm64: Remove I-cache invalidation from flush_cache_range()
arm64: Enable HIBERNATION in defconfig
arm64: Enable CONFIG_ARM64_SW_TTBR0_PAN
arm64: xen: Enable user access before a privcmd hvc call
arm64: Handle faults caused by inadvertent user access with PAN enabled
arm64: Disable TTBR0_EL1 during normal kernel execution
arm64: Introduce uaccess_{disable,enable} functionality based on TTBR0_EL1
arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro
arm64: Factor out PAN enabling/disabling into separate uaccess_* macros
arm64: Update the synchronous external abort fault description
selftests: arm64: add test for unaligned/inexact watchpoint handling
arm64: Allow hw watchpoint of length 3,5,6 and 7
arm64: hw_breakpoint: Handle inexact watchpoint addresses
...
112 lines
3.2 KiB
C
112 lines
3.2 KiB
C
#ifndef _ASM_EFI_H
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#define _ASM_EFI_H
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#include <asm/cpufeature.h>
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#include <asm/io.h>
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#include <asm/mmu_context.h>
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#include <asm/neon.h>
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#include <asm/ptrace.h>
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#include <asm/tlbflush.h>
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#ifdef CONFIG_EFI
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extern void efi_init(void);
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#else
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#define efi_init()
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#endif
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int efi_create_mapping(struct mm_struct *mm, efi_memory_desc_t *md);
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int efi_set_mapping_permissions(struct mm_struct *mm, efi_memory_desc_t *md);
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#define arch_efi_call_virt_setup() \
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({ \
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kernel_neon_begin(); \
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efi_virtmap_load(); \
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})
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#define arch_efi_call_virt(p, f, args...) \
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({ \
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efi_##f##_t *__f; \
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__f = p->f; \
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__f(args); \
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})
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#define arch_efi_call_virt_teardown() \
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({ \
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efi_virtmap_unload(); \
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kernel_neon_end(); \
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})
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#define ARCH_EFI_IRQ_FLAGS_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
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/* arch specific definitions used by the stub code */
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/*
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* AArch64 requires the DTB to be 8-byte aligned in the first 512MiB from
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* start of kernel and may not cross a 2MiB boundary. We set alignment to
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* 2MiB so we know it won't cross a 2MiB boundary.
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*/
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#define EFI_FDT_ALIGN SZ_2M /* used by allocate_new_fdt_and_exit_boot() */
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#define MAX_FDT_OFFSET SZ_512M
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#define efi_call_early(f, ...) sys_table_arg->boottime->f(__VA_ARGS__)
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#define __efi_call_early(f, ...) f(__VA_ARGS__)
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#define efi_is_64bit() (true)
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#define efi_call_proto(protocol, f, instance, ...) \
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((protocol##_t *)instance)->f(instance, ##__VA_ARGS__)
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#define alloc_screen_info(x...) &screen_info
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#define free_screen_info(x...)
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static inline void efifb_setup_from_dmi(struct screen_info *si, const char *opt)
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{
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}
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#define EFI_ALLOC_ALIGN SZ_64K
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/*
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* On ARM systems, virtually remapped UEFI runtime services are set up in two
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* distinct stages:
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* - The stub retrieves the final version of the memory map from UEFI, populates
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* the virt_addr fields and calls the SetVirtualAddressMap() [SVAM] runtime
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* service to communicate the new mapping to the firmware (Note that the new
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* mapping is not live at this time)
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* - During an early initcall(), the EFI system table is permanently remapped
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* and the virtual remapping of the UEFI Runtime Services regions is loaded
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* into a private set of page tables. If this all succeeds, the Runtime
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* Services are enabled and the EFI_RUNTIME_SERVICES bit set.
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*/
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static inline void efi_set_pgd(struct mm_struct *mm)
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{
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__switch_mm(mm);
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if (system_uses_ttbr0_pan()) {
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if (mm != current->active_mm) {
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/*
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* Update the current thread's saved ttbr0 since it is
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* restored as part of a return from exception. Set
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* the hardware TTBR0_EL1 using cpu_switch_mm()
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* directly to enable potential errata workarounds.
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*/
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update_saved_ttbr0(current, mm);
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cpu_switch_mm(mm->pgd, mm);
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} else {
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/*
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* Defer the switch to the current thread's TTBR0_EL1
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* until uaccess_enable(). Restore the current
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* thread's saved ttbr0 corresponding to its active_mm
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* (if different from init_mm).
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*/
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cpu_set_reserved_ttbr0();
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if (current->active_mm != &init_mm)
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update_saved_ttbr0(current, current->active_mm);
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}
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}
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}
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void efi_virtmap_load(void);
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void efi_virtmap_unload(void);
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#endif /* _ASM_EFI_H */
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