Christophe JAILLET 1d845bbd89 drm/amd/display: Fix a test dml32_rq_dlg_get_rq_reg() ...

[ Upstream commit bafc31166a ]

It is likely p1_min_meta_chunk_bytes was expected here, instead of
min_meta_chunk_bytes.

Test the correct variable.

Fixes: dda4fb85e4 ("drm/amd/display: DML changes for DCN32/321")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2023-07-11 19:39:40 +02:00

..

calcs

drm/amd/display: Fix mutex lock in dcn10

2022-10-06 11:54:35 -04:00

dcn10

drm/amd/display: move remaining FPU code to dml folder

2022-10-27 15:12:08 -04:00

dcn20

drm/amd/display: Add minimum Z8 residency debug option

2023-05-17 14:02:05 +02:00

dcn21

drm/amd/display: Fix a test CalculatePrefetchSchedule()

2023-07-11 19:39:40 +02:00

dcn30

drm/amd/display: Correct DML calculation to follow HW SPEC

2023-05-24 17:30:03 +01:00

dcn31

drm/amd/display: Correct DML calculation to follow HW SPEC

2023-05-24 17:30:03 +01:00

dcn32

drm/amd/display: Fix a test dml32_rq_dlg_get_rq_reg()

2023-07-11 19:39:40 +02:00

dcn301

drm/amd/display: add debug option for dramclk_change_latency in apu

2022-09-19 15:09:05 -04:00

dcn302

drm/amd/display: move FPU associated DCN302 code to DML folder (#2266)

2022-01-18 17:42:26 -05:00

dcn303

drm/amd/display: Clean up some inconsistent indenting

2022-07-28 16:05:16 -04:00

dcn314

drm/amd/display: Correct DML calculation to follow HW SPEC

2023-05-24 17:30:03 +01:00

dcn321

drm/amd/display: Update bounding box values for DCN321

2023-05-17 14:01:37 +02:00

dsc

drm/amd/display: Make some symbols static

2022-10-24 14:34:47 -04:00

dc_features.h

drm/amd/display: Expand kernel doc for DC

2022-10-27 14:45:29 -04:00

display_mode_enums.h

drm/amd/display: Expand kernel doc for DC

2022-10-27 14:45:29 -04:00

display_mode_lib.c

drm/amd/display: fix dcn315 dml detile overestimation

2022-10-06 11:57:51 -04:00

display_mode_lib.h

drm/amd/display: Speed up DML fast_validate path

2023-01-24 12:25:21 -05:00

display_mode_structs.h

drm/amd/display: Set max vratio for prefetch to 7.9 for YUV420 MPO

2023-02-14 15:47:26 -05:00

display_mode_vba.c

drm/amd/display: Set max vratio for prefetch to 7.9 for YUV420 MPO

2023-02-14 15:47:26 -05:00

display_mode_vba.h

drm/amd/display: Set max vratio for prefetch to 7.9 for YUV420 MPO

2023-02-14 15:47:26 -05:00

display_rq_dlg_helpers.c

drm/amdgpu/display: Remove t_srx_delay_us.

2022-01-27 15:47:34 -05:00

display_rq_dlg_helpers.h

drm/amd/display: Pass all structs in display_rq_dlg_helpers by pointer

2021-09-23 15:17:29 -04:00

dml1_display_rq_dlg_calc.c

drm/amdgpu/display: Remove t_srx_delay_us.

2022-01-27 15:47:34 -05:00

dml1_display_rq_dlg_calc.h

drm/amd/display: Fix rest of pass-by-value structs in DML

2021-09-23 15:17:30 -04:00

dml_inline_defs.h

drm/amd/display: Optimizations for DML math

2022-09-13 14:32:59 -04:00

dml_logger.h

drm/amd/display: Use MACROS instead of dm_logger

2018-03-14 15:08:45 -05:00

Makefile

drm/amd/display: Do not add '-mhard-float' to dml_ccflags for clang

2023-01-26 12:43:11 +09:00