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47ebe00b68
Pull dmaengine updates from Vinod Koul:
- Add support in dmaengine core to do device node checks for DT devices
and update bunch of drivers to use that and remove open coding from
drivers
- New driver/driver support for new hardware, namely:
- MediaTek UART APDMA
- Freescale i.mx7ulp edma2
- Synopsys eDMA IP core version 0
- Allwinner H6 DMA
- Updates to axi-dma and support for interleaved cyclic transfers
- Greg's debugfs return value check removals on drivers
- Updates to stm32-dma, hsu, dw, pl330, tegra drivers
* tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback
Documentation: dmaengine: clean up description of dmatest usage
dmaengine: tegra210-adma: remove PM_CLK dependency
dmaengine: fsl-edma: add i.mx7ulp edma2 version support
dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma
dmaengine: fsl-edma-common: version check for v2 instead
dmaengine: fsl-edma-common: move dmamux register to another single function
dmaengine: fsl-edma: add drvdata for fsl-edma
dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver"
dmaengine: rcar-dmac: Reject zero-length slave DMA requests
dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
dmaengine: dw-edma: fix semicolon.cocci warnings
dmaengine: sh: usb-dmac: Use [] to denote a flexible array member
dmaengine: dmatest: timeout value of -1 should specify infinite wait
dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit
dmaengine: fsl-edma: support little endian for edma driver
dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
dmagengine: pl330: add code to get reset property
dt-bindings: pl330: document the optional resets property
...
39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config MTK_HSDMA
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tristate "MediaTek High-Speed DMA controller support"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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---help---
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Enable support for High-Speed DMA controller on MediaTek
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SoCs.
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This controller provides the channels which is dedicated to
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memory-to-memory transfer to offload from CPU through ring-
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based descriptor management.
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config MTK_CQDMA
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tristate "MediaTek Command-Queue DMA controller support"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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help
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Enable support for Command-Queue DMA controller on MediaTek
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SoCs.
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This controller provides the channels which is dedicated to
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memory-to-memory transfer to offload from CPU.
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config MTK_UART_APDMA
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tristate "MediaTek SoCs APDMA support for UART"
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depends on OF && SERIAL_8250_MT6577
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support for the UART DMA engine found on MediaTek MTK SoCs.
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When SERIAL_8250_MT6577 is enabled, and if you want to use DMA,
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you can enable the config. The DMA engine can only be used
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with MediaTek SoCs.
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