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Andy Shevchenko 363d610a96 i2c: designware: Adjust bus_freq_hz when refuse high speed mode set

[ Upstream commit 5e729bc54b ]

When hardware doesn't support High Speed Mode, we forget bus_freq_hz
timing adjustment. This makes the timings and real registers being
unsynchronized. Adjust bus_freq_hz when refuse high speed mode set.

Fixes: b6e67145f1 ("i2c: designware: Enable high speed mode")
Reported-by: "Song Bao Hua (Barry Song)" <song.bao.hua@hisilicon.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Barry Song <song.bao.hua@hisilicon.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2021-04-14 08:42:11 +02:00

algos

i2c: algo: pca: Reapply i2c bus settings after reset

2020-09-09 10:22:40 +02:00

busses

i2c: designware: Adjust bus_freq_hz when refuse high speed mode set

2021-04-14 08:42:11 +02:00

muxes

i2c: mux: reg: Simplify with dev_err_probe()

2020-09-18 23:02:03 +02:00

i2c-boardinfo.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157