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The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
163 lines
3.8 KiB
Plaintext
163 lines
3.8 KiB
Plaintext
// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for Linksys NSLU2
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*/
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/dts-v1/;
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#include "intel-ixp42x.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Linksys NSLU2 (Network Storage Link for USB 2.0 Disk Drives)";
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compatible = "linksys,nslu2", "intel,ixp42x";
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#address-cells = <1>;
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#size-cells = <1>;
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memory@0 {
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/* 32 MB SDRAM */
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device_type = "memory";
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reg = <0x00000000 0x2000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
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stdout-path = "uart0:115200n8";
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};
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aliases {
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serial0 = &uart0;
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};
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leds {
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compatible = "gpio-leds";
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led-status {
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label = "nslu2:red:status";
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-ready {
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label = "nslu2:green:ready";
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gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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led-disk-1 {
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label = "nslu2:green:disk-1";
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gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led-disk-2 {
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label = "nslu2:green:disk-2";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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button-power {
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wakeup-source;
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linux,code = <KEY_POWER>;
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label = "power";
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gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
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};
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button-reset {
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wakeup-source;
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linux,code = <KEY_ESC>;
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label = "reset";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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};
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};
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i2c {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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#address-cells = <1>;
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#size-cells = <0>;
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rtc@6f {
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compatible = "xicor,x1205";
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reg = <0x6f>;
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};
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};
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gpio-poweroff {
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compatible = "gpio-poweroff";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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timeout-ms = <5000>;
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};
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gpio-beeper {
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compatible = "gpio-beeper";
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gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
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};
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soc {
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bus@c4000000 {
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/* The first 16MB region at CS0 on the expansion bus */
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flash@0,0 {
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compatible = "intel,ixp4xx-flash", "cfi-flash";
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bank-width = <2>;
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/*
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* 8 MB of Flash in 0x20000 byte blocks
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* mapped in at CS0.
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*/
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reg = <0 0x00000000 0x800000>;
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partitions {
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compatible = "redboot-fis";
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/* Eraseblock at 0x7e0000 */
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fis-index-block = <0x3f>;
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};
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};
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};
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pci@c0000000 {
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status = "okay";
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/*
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* Taken from NSLU2 PCI boardfile, INT A, B, C swizzled D constant
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* We have slots (IDSEL) 1, 2 and 3.
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*/
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map =
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/* IDSEL 1 */
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<0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
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<0x0800 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 10 */
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<0x0800 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 9 */
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<0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */
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/* IDSEL 2 */
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<0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
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<0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */
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<0x1000 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 11 */
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<0x1000 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 2 is irq 8 */
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/* IDSEL 3 */
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<0x1800 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 3 is irq 9 */
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<0x1800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 3 is irq 11 */
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<0x1800 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 3 is irq 10 */
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<0x1800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 3 is irq 8 */
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};
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ethernet@c8009000 {
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status = "okay";
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queue-rx = <&qmgr 3>;
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queue-txready = <&qmgr 20>;
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phy-mode = "rgmii";
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phy-handle = <&phy1>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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};
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};
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