Wayne Lin 320eca62fe drm/amd/display: Add otg vertical interrupt0 support in DCN1.0 ...

[Why & How]
On DCN1.0, need otg vertical line interrupt to get appropriate timing
to achieve specific feature request.

Add otg vertical interrupt0 support for registers which operation is
vertical sensitive.

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-02-09 15:29:02 -05:00

..

irq_service_dcn10.c

drm/amd/display: Add otg vertical interrupt0 support in DCN1.0

2021-02-09 15:29:02 -05:00

irq_service_dcn10.h

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