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eb67d239f3
Pull RISC-V updates from Palmer Dabbelt: - Support for the T-Head PMU via the perf subsystem - ftrace support for rv32 - Support for non-volatile memory devices - Various fixes and cleanups * tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (52 commits) Documentation: RISC-V: patch-acceptance: s/implementor/implementer Documentation: RISC-V: Mention the UEFI Standards Documentation: RISC-V: Allow patches for non-standard behavior Documentation: RISC-V: Fix a typo in patch-acceptance riscv: Fixup compile error with !MMU riscv: Fix P4D_SHIFT definition for 3-level page table mode riscv: Apply a static assert to riscv_isa_ext_id RISC-V: Add some comments about the shadow and overflow stacks RISC-V: Align the shadow stack RISC-V: Ensure Zicbom has a valid block size RISC-V: Introduce riscv_isa_extension_check RISC-V: Improve use of isa2hwcap[] riscv: Don't duplicate _ALTERNATIVE_CFG* macros riscv: alternatives: Drop the underscores from the assembly macro names riscv: alternatives: Don't name unused macro parameters riscv: Don't duplicate __ALTERNATIVE_CFG in __ALTERNATIVE_CFG_2 riscv: mm: call best_map_size many times during linear-mapping riscv: Move cast inside kernel_mapping_[pv]a_to_[vp]a riscv: Fix crash during early errata patching riscv: boot: add zstd support ...
84 lines
2.1 KiB
Plaintext
84 lines
2.1 KiB
Plaintext
menu "SoC selection"
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config SOC_MICROCHIP_POLARFIRE
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bool "Microchip PolarFire SoCs"
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select MCHP_CLK_MPFS
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help
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This enables support for Microchip PolarFire SoC platforms.
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config ARCH_RENESAS
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bool "Renesas RISC-V SoCs"
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help
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This enables support for the RISC-V based Renesas SoCs.
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config SOC_SIFIVE
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bool "SiFive SoCs"
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select SERIAL_SIFIVE if TTY
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select SERIAL_SIFIVE_CONSOLE if TTY
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select CLK_SIFIVE
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select CLK_SIFIVE_PRCI
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select ERRATA_SIFIVE if !XIP_KERNEL
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help
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This enables support for SiFive SoC platform hardware.
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config SOC_STARFIVE
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bool "StarFive SoCs"
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select PINCTRL
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select RESET_CONTROLLER
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help
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This enables support for StarFive SoC platform hardware.
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config SOC_VIRT
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bool "QEMU Virt Machine"
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select CLINT_TIMER if RISCV_M_MODE
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select POWER_RESET
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select POWER_RESET_SYSCON
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select POWER_RESET_SYSCON_POWEROFF
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select GOLDFISH
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select RTC_DRV_GOLDFISH if RTC_CLASS
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select PM_GENERIC_DOMAINS if PM
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select PM_GENERIC_DOMAINS_OF if PM && OF
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select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI
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help
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This enables support for QEMU Virt Machine.
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config SOC_CANAAN
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bool "Canaan Kendryte K210 SoC"
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depends on !MMU
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select CLINT_TIMER if RISCV_M_MODE
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select SERIAL_SIFIVE if TTY
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select SERIAL_SIFIVE_CONSOLE if TTY
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select ARCH_HAS_RESET_CONTROLLER
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select PINCTRL
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select COMMON_CLK
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select COMMON_CLK_K210
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help
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This enables support for Canaan Kendryte K210 SoC platform hardware.
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if SOC_CANAAN
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config SOC_CANAAN_K210_DTB_BUILTIN
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bool "Builtin device tree for the Canaan Kendryte K210"
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depends on SOC_CANAAN
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default y
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select OF
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select BUILTIN_DTB
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help
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Build a device tree for the Kendryte K210 into the Linux image.
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This option should be selected if no bootloader is being used.
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If unsure, say Y.
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config SOC_CANAAN_K210_DTB_SOURCE
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string "Source file for the Canaan Kendryte K210 builtin DTB"
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depends on SOC_CANAAN
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depends on SOC_CANAAN_K210_DTB_BUILTIN
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default "k210_generic"
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help
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Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
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for the DTS file that will be used to produce the DTB linked into the
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kernel.
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endif # SOC_CANAAN
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endmenu # "SoC selection"
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