Huacai Chen d279134168 LoongArch: Use TLB for ioremap() ...

We can support more cache attributes (e.g., CC, SUC and WUC) and page
protection when we use TLB for ioremap(). The implementation is based
on GENERIC_IOREMAP.

The existing simple ioremap() implementation has better performance so
we keep it and introduce ARCH_IOREMAP to control the selection.

We move pagetable_init() earlier to make early ioremap() works, and we
modify the PCI ecam mapping because the TLB-based version of ioremap()
will actually take the size into account.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

2022-10-12 16:36:14 +08:00

..

cache.c

LoongArch: Refactor cache probe and flush methods

2022-10-12 16:36:14 +08:00

extable.c

LoongArch: Add memory management

2022-06-03 20:09:28 +08:00

fault.c

LoongArch: mm: Avoid unnecessary page fault retires on shared memory types

2022-08-25 19:34:59 +08:00

hugetlbpage.c

LoongArch: Add memory management

2022-06-03 20:09:28 +08:00

init.c

LoongArch: Use TLB for ioremap()

2022-10-12 16:36:14 +08:00

ioremap.c

LoongArch: Add memory management

2022-06-03 20:09:28 +08:00

maccess.c

LoongArch: Add memory management

2022-06-03 20:09:28 +08:00

Makefile

…

mmap.c

LoongArch: Support access filter to /dev/mem interface

2022-10-12 16:36:14 +08:00

page.S

LoongArch: Re-tab the assembly files

2022-07-29 18:22:32 +08:00

pgtable.c

loongarch: drop definition of PGD_ORDER

2022-07-17 17:14:43 -07:00

tlb.c

LoongArch: Flush TLB earlier at initialization

2022-10-12 16:36:08 +08:00

tlbex.S

LoongArch: mm: Refactor TLB exception handlers

2022-10-12 16:36:14 +08:00