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drm/amdgpu: skip psp suspend for IMU enabled ASICs mode2 reset

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commit e11c775030 upstream.

The psp suspend & resume should be skipped to avoid destroy
the TMR and reload FWs again for IMU enabled APU ASICs.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Tim Huang
2023-01-20 22:27:32 +08:00
committed by Greg Kroah-Hartman
parent ad3f060a6c
commit 23ee632c33
1 changed files with 12 additions and 0 deletions
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12
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
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@@ -3051,6 +3051,18 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
(adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SDMA))
continue;
/* Once swPSP provides the IMU, RLC FW binaries to TOS during cold-boot.
* These are in TMR, hence are expected to be reused by PSP-TOS to reload
* from this location and RLC Autoload automatically also gets loaded
* from here based on PMFW -> PSP message during re-init sequence.
* Therefore, the psp suspend & resume should be skipped to avoid destroy
* the TMR and reload FWs again for IMU enabled APU ASICs.
*/
if (amdgpu_in_reset(adev) &&
(adev->flags & AMD_IS_APU) && adev->gfx.imu.funcs &&
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP)
continue;
/* XXX handle errors */
r = adev->ip_blocks[i].version->funcs->suspend(adev);
/* XXX handle errors */