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Add non-mainline source for rtl8192cu wireless driver version v4.0.2_9000 as this is widely used. Disabled older rtlwifi driver

Browse Source 
8192cu needs old wireless extensions

The obsolete WIRELESS_EXT configuration is used
by the old Realtek code and is needed for AP support.

8192cu: CONFIG_AP_MODE hardcoded in autoconf.h
This commit is contained in:
popcornmix
2012-09-03 17:10:23 +01:00
parent 43d9f8e6ec
commit 2ac9cdddca
174 changed files with 171243 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/net/wireless/Kconfig
View File

@@ -278,7 +278,8 @@ source "drivers/net/wireless/orinoco/Kconfig"
source "drivers/net/wireless/p54/Kconfig"
source "drivers/net/wireless/rt2x00/Kconfig"
source "drivers/net/wireless/mediatek/Kconfig"
source "drivers/net/wireless/realtek/rtlwifi/Kconfig"
#source "drivers/net/wireless/realtek/rtlwifi/Kconfig"
source "drivers/net/wireless/realtek/rtl8192cu/Kconfig"
source "drivers/net/wireless/realtek/rtl8xxxu/Kconfig"
source "drivers/net/wireless/ti/Kconfig"
source "drivers/net/wireless/zd1211rw/Kconfig"

3
drivers/net/wireless/realtek/Makefile
View File

@@ -4,6 +4,7 @@
obj-$(CONFIG_RTL8180) += rtl818x/
obj-$(CONFIG_RTL8187) += rtl818x/
obj-$(CONFIG_RTLWIFI) += rtlwifi/
#obj-$(CONFIG_RTLWIFI) += rtlwifi/
obj-$(CONFIG_RTL8192CU) += rtl8192cu/
obj-$(CONFIG_RTL8XXXU) += rtl8xxxu/

9
drivers/net/wireless/realtek/rtl8192cu/Kconfig Normal file
View File

@@ -0,0 +1,9 @@
config RTL8192CU
tristate "Realtek 8192C USB WiFi"
depends on MAC80211 && USB
select CFG80211_WEXT
select WIRELESS_EXT
select WEXT_PRIV
---help---
This option adds the Realtek RTL8192CU USB device such as Edimax EW-7811Un.

615
drivers/net/wireless/realtek/rtl8192cu/Makefile Normal file
View File

@@ -0,0 +1,615 @@
EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS)
EXTRA_CFLAGS += -O1
#EXTRA_CFLAGS += -O3
#EXTRA_CFLAGS += -Wall
#EXTRA_CFLAGS += -Wextra
#EXTRA_CFLAGS += -Werror
#EXTRA_CFLAGS += -pedantic
#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes
EXTRA_CFLAGS += -Wno-unused-variable
EXTRA_CFLAGS += -Wno-unused-value
EXTRA_CFLAGS += -Wno-unused-label
EXTRA_CFLAGS += -Wno-unused-parameter
EXTRA_CFLAGS += -Wno-unused-function
EXTRA_CFLAGS += -Wno-unused
EXTRA_CFLAGS += -Wno-uninitialized
EXTRA_CFLAGS += -I$(src)/include
CONFIG_AUTOCFG_CP = n
CONFIG_RTL8192C = y
CONFIG_RTL8192D = n
CONFIG_RTL8723A = n
CONFIG_USB_HCI = y
CONFIG_PCI_HCI = n
CONFIG_SDIO_HCI = n
CONFIG_MP_INCLUDED = n
CONFIG_POWER_SAVING = y
CONFIG_USB_AUTOSUSPEND = n
CONFIG_HW_PWRP_DETECTION = n
CONFIG_WIFI_TEST = n
CONFIG_BT_COEXISTENCE = n
CONFIG_RTL8192CU_REDEFINE_1X1 = n
CONFIG_INTEL_WIDI = n
CONFIG_WAKE_ON_WLAN = n
CONFIG_PLATFORM_I386_PC = y
CONFIG_PLATFORM_TI_AM3517 = n
CONFIG_PLATFORM_ANDROID_X86 = n
CONFIG_PLATFORM_JB_X86 = n
CONFIG_PLATFORM_ARM_S3C2K4 = n
CONFIG_PLATFORM_ARM_PXA2XX = n
CONFIG_PLATFORM_ARM_S3C6K4 = n
CONFIG_PLATFORM_MIPS_RMI = n
CONFIG_PLATFORM_RTD2880B = n
CONFIG_PLATFORM_MIPS_AR9132 = n
CONFIG_PLATFORM_RTK_DMP = n
CONFIG_PLATFORM_MIPS_PLM = n
CONFIG_PLATFORM_MSTAR389 = n
CONFIG_PLATFORM_MT53XX = n
CONFIG_PLATFORM_ARM_MX51_241H = n
CONFIG_PLATFORM_FS_MX61 = n
CONFIG_PLATFORM_ACTIONS_ATJ227X = n
CONFIG_PLATFORM_TEGRA3_CARDHU = n
CONFIG_PLATFORM_TEGRA4_DALMORE = n
CONFIG_PLATFORM_ARM_TCC8900 = n
CONFIG_PLATFORM_ARM_TCC8920 = n
CONFIG_PLATFORM_ARM_TCC8920_JB42 = n
CONFIG_PLATFORM_ARM_RK2818 = n
CONFIG_PLATFORM_ARM_TI_PANDA = n
CONFIG_PLATFORM_MIPS_JZ4760 = n
CONFIG_PLATFORM_DMP_PHILIPS = n
CONFIG_PLATFORM_TI_DM365 = n
CONFIG_PLATFORM_MN10300 = n
CONFIG_PLATFORM_MSTAR_TITANIA12 = n
CONFIG_PLATFORM_MSTAR_A3 = n
CONFIG_PLATFORM_ARM_SUNxI = n
CONFIG_PLATFORM_ARM_SUN6I = n
CONFIG_DRVEXT_MODULE = n
export TopDIR ?= $(shell pwd)
ifeq ($(CONFIG_RTL8192C), y)
RTL871X = rtl8192c
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8192cu
FW_FILES := hal/$(RTL871X)/usb/Hal8192CUHWImg.o
ifneq ($(CONFIG_WAKE_ON_WLAN), n)
FW_FILES += hal/$(RTL871X)/usb/Hal8192CUHWImg_wowlan.o
endif
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8192ce
FW_FILES := hal/$(RTL871X)/pci/Hal8192CEHWImg.o
endif
CHIP_FILES := \
hal/$(RTL871X)/$(RTL871X)_sreset.o \
hal/$(RTL871X)/$(RTL871X)_xmit.o
CHIP_FILES += $(FW_FILES)
endif
ifeq ($(CONFIG_RTL8192D), y)
RTL871X = rtl8192d
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8192du
FW_FILES := hal/$(RTL871X)/usb/Hal8192DUHWImg.o
ifneq ($(CONFIG_WAKE_ON_WLAN), n)
FW_FILES += hal/$(RTL871X)/usb/Hal8192DUHWImg_wowlan.o
endif
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8192de
FW_FILES := hal/$(RTL871X)/pci/Hal8192DEHWImg.o
endif
CHIP_FILES := \
hal/$(RTL871X)/$(RTL871X)_xmit.o
CHIP_FILES += $(FW_FILES)
endif
ifeq ($(CONFIG_RTL8723A), y)
RTL871X = rtl8723a
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8723as
FW_FILES := hal/$(RTL871X)/sdio/Hal8723SHWImg.o
endif
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8723au
FW_FILES := hal/$(RTL871X)/usb/Hal8723UHWImg.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8723ae
FW_FILES := hal/$(RTL871X)/pci/Hal8723EHWImg.o
endif
PWRSEQ_FILES := hal/HalPwrSeqCmd.o \
hal/$(RTL871X)/Hal8723PwrSeq.o
CHIP_FILES += $(FW_FILES) $(PWRSEQ_FILES)
endif
ifeq ($(CONFIG_SDIO_HCI), y)
HCI_NAME = sdio
endif
ifeq ($(CONFIG_USB_HCI), y)
HCI_NAME = usb
endif
ifeq ($(CONFIG_PCI_HCI), y)
HCI_NAME = pci
endif
_OS_INTFS_FILES := os_dep/osdep_service.o \
os_dep/linux/os_intfs.o \
os_dep/linux/$(HCI_NAME)_intf.o \
os_dep/linux/$(HCI_NAME)_ops_linux.o \
os_dep/linux/ioctl_linux.o \
os_dep/linux/xmit_linux.o \
os_dep/linux/mlme_linux.o \
os_dep/linux/recv_linux.o \
os_dep/linux/ioctl_cfg80211.o \
os_dep/linux/rtw_android.o
_HAL_INTFS_FILES := hal/hal_intf.o \
hal/hal_com.o \
hal/dm.o \
hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(RTL871X)_phycfg.o \
hal/$(RTL871X)/$(RTL871X)_rf6052.o \
hal/$(RTL871X)/$(RTL871X)_dm.o \
hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)/$(RTL871X)_cmd.o \
hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
else
_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o
endif
ifeq ($(CONFIG_MP_INCLUDED), y)
_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o
endif
_HAL_INTFS_FILES += $(CHIP_FILES)
ifeq ($(CONFIG_AUTOCFG_CP), y)
$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
endif
ifeq ($(CONFIG_USB_HCI), y)
ifeq ($(CONFIG_USB_AUTOSUSPEND), y)
EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND
endif
endif
ifeq ($(CONFIG_POWER_SAVING), y)
EXTRA_CFLAGS += -DCONFIG_POWER_SAVING
endif
ifeq ($(CONFIG_HW_PWRP_DETECTION), y)
EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION
endif
ifeq ($(CONFIG_WIFI_TEST), y)
EXTRA_CFLAGS += -DCONFIG_WIFI_TEST
endif
ifeq ($(CONFIG_BT_COEXISTENCE), y)
EXTRA_CFLAGS += -DCONFIG_BT_COEXISTENCE
endif
ifeq ($(CONFIG_RTL8192CU_REDEFINE_1X1), y)
EXTRA_CFLAGS += -DRTL8192C_RECONFIG_TO_1T1R
endif
ifeq ($(CONFIG_WAKE_ON_WLAN), y)
EXTRA_CFLAGS += -DCONFIG_WAKE_ON_WLAN
endif
ifeq ($(CONFIG_INTEL_WIDI), y)
EXTRA_CFLAGS += -DCONFIG_INTEL_WIDI
endif
ifeq ($(CONFIG_PLATFORM_I386_PC), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
SUBARCH := $(shell uname -m | sed -e s/i.86/i386/)
ARCH ?= $(SUBARCH)
CROSS_COMPILE ?=
KVER := $(shell uname -r)
KSRC := /lib/modules/$(KVER)/build
MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/
INSTALL_PREFIX :=
endif
ifeq ($(CONFIG_PLATFORM_TI_AM3517), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_SHUTTLE
CROSS_COMPILE := arm-eabi-
KSRC := $(shell pwd)/../../../Android/kernel
ARCH := arm
endif
ifeq ($(CONFIG_PLATFORM_MSTAR_TITANIA12), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_PLATFORM_MSTAR_TITANIA12
ARCH:=mips
CROSS_COMPILE:= /usr/src/Mstar_kernel/mips-4.3/bin/mips-linux-gnu-
KVER:= 2.6.28.9
KSRC:= /usr/src/Mstar_kernel/2.6.28.9/
endif
ifeq ($(CONFIG_PLATFORM_MSTAR_A3), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_PLATFORM_MSTAR_A3
ARCH:=arm
CROSS_COMPILE:= arm-none-linux-gnueabi-
KVER:= 2.6.35.11
KSRC:= /home/gary/PERFORCE/THEALE/RedLion/2.6.35.11/
MODULE_NAME = wlan
endif
ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
SUBARCH := $(shell uname -m | sed -e s/i.86/i386/)
ARCH := $(SUBARCH)
CROSS_COMPILE := /media/DATA-2/android-x86/ics-x86_20120130/prebuilt/linux-x86/toolchain/i686-unknown-linux-gnu-4.2.1/bin/i686-unknown-linux-gnu-
KSRC := /media/DATA-2/android-x86/ics-x86_20120130/out/target/product/generic_x86/obj/kernel
MODULE_NAME :=wlan
endif
ifeq ($(CONFIG_PLATFORM_JB_X86), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
SUBARCH := $(shell uname -m | sed -e s/i.86/i386/)
ARCH := $(SUBARCH)
CROSS_COMPILE := /home/android_sdk/android-x86_JB/prebuilts/gcc/linux-x86/x86/i686-linux-android-4.7/bin/i686-linux-android-
KSRC := /home/android_sdk/android-x86_JB/out/target/product/x86/obj/kernel/
MODULE_NAME :=wlan
endif
ifeq ($(CONFIG_PLATFORM_ARM_PXA2XX), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH := arm
CROSS_COMPILE := arm-none-linux-gnueabi-
KVER := 2.6.34.1
KSRC ?= /usr/src/linux-2.6.34.1
endif
ifeq ($(CONFIG_PLATFORM_ARM_S3C2K4), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH := arm
CROSS_COMPILE := arm-linux-
KVER := 2.6.24.7_$(ARCH)
KSRC := /usr/src/kernels/linux-$(KVER)
endif
ifeq ($(CONFIG_PLATFORM_ARM_S3C6K4), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH := arm
CROSS_COMPILE := arm-none-linux-gnueabi-
KVER := 2.6.34.1
KSRC ?= /usr/src/linux-2.6.34.1
endif
ifeq ($(CONFIG_PLATFORM_RTD2880B), y)
EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTD2880B
ARCH:=
CROSS_COMPILE:=
KVER:=
KSRC:=
endif
ifeq ($(CONFIG_PLATFORM_MIPS_RMI), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH:=mips
CROSS_COMPILE:=mipsisa32r2-uclibc-
KVER:=
KSRC:= /root/work/kernel_realtek
endif
ifeq ($(CONFIG_PLATFORM_MIPS_PLM), y)
EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN
ARCH:=mips
CROSS_COMPILE:=mipsisa32r2-uclibc-
KVER:=
KSRC:= /root/work/kernel_realtek
endif
ifeq ($(CONFIG_PLATFORM_MSTAR389), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR389
ARCH:=mips
CROSS_COMPILE:= mips-linux-gnu-
KVER:= 2.6.28.10
KSRC:= /home/mstar/mstar_linux/2.6.28.9/
endif
ifeq ($(CONFIG_PLATFORM_MIPS_AR9132), y)
EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN
ARCH := mips
CROSS_COMPILE := mips-openwrt-linux-
KSRC := /home/alex/test_openwrt/tmp/linux-2.6.30.9
endif
ifeq ($(CONFIG_PLATFORM_DMP_PHILIPS), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM
ARCH := mips
#CROSS_COMPILE:=/usr/local/msdk-4.3.6-mips-EL-2.6.12.6-0.9.30.3/bin/mipsel-linux-
CROSS_COMPILE:=/usr/local/toolchain_mipsel/bin/mipsel-linux-
KSRC ?=/usr/local/Jupiter/linux-2.6.12
endif
ifeq ($(CONFIG_PLATFORM_RTK_DMP), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM
ARCH:=mips
CROSS_COMPILE:=mipsel-linux-
KVER:=
KSRC ?= /usr/src/DMP_Kernel/jupiter/linux-2.6.12
endif
ifeq ($(CONFIG_PLATFORM_MT53XX), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MT53XX
ARCH:= arm
CROSS_COMPILE:= arm11_mtk_le-
KVER:= 2.6.27
KSRC?= /proj/mtk00802/BD_Compare/BDP/Dev/BDP_V301/BDP_Linux/linux-2.6.27
endif
ifeq ($(CONFIG_PLATFORM_ARM_MX51_241H), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_WISTRON_PLATFORM
ARCH := arm
CROSS_COMPILE := /opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi-
KVER := 2.6.31
KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source
endif
ifeq ($(CONFIG_PLATFORM_FS_MX61), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH := arm
CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi-
KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env
endif
ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X
ARCH := mips
CROSS_COMPILE := /home/cnsd4/project/actions/tools-2.6.27/bin/mipsel-linux-gnu-
KVER := 2.6.27
KSRC := /home/cnsd4/project/actions/linux-2.6.27.28
endif
ifeq ($(CONFIG_PLATFORM_TI_DM365), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365
ARCH := arm
CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le-
KVER := 2.6.18
KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365
endif
ifeq ($(CONFIG_PLATFORM_TEGRA3_CARDHU), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
# default setting for Android 4.1, 4.2
EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
ARCH := arm
CROSS_COMPILE := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi-
KSRC := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/out/target/product/cardhu/obj/KERNEL
MODULE_NAME := wlan
endif
ifeq ($(CONFIG_PLATFORM_TEGRA4_DALMORE), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
# default setting for Android 4.1, 4.2
EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
ARCH := arm
CROSS_COMPILE := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
KSRC := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/out/target/product/dalmore/obj/KERNEL
MODULE_NAME := wlan
endif
ifeq ($(CONFIG_PLATFORM_ARM_TCC8900), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH := arm
CROSS_COMPILE := /home/android_sdk/Telechips/SDK_2304_20110613/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi-
KSRC := /home/android_sdk/Telechips/SDK_2304_20110613/kernel
MODULE_NAME := wlan
endif
ifeq ($(CONFIG_PLATFORM_ARM_TCC8920), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH := arm
CROSS_COMPILE := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi-
KSRC := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/kernel
MODULE_NAME := wlan
endif
ifeq ($(CONFIG_PLATFORM_ARM_TCC8920_JB42), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
# default setting for Android 4.1, 4.2
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
ARCH := arm
CROSS_COMPILE := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
KSRC := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/kernel
MODULE_NAME := wlan
endif
ifeq ($(CONFIG_PLATFORM_ARM_RK2818), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS -DCONFIG_MINIMAL_MEMORY_USAGE
ARCH := arm
CROSS_COMPILE := /usr/src/release_fae_version/toolchain/arm-eabi-4.4.0/bin/arm-eabi-
KSRC := /usr/src/release_fae_version/kernel25_A7_281x
MODULE_NAME := wlan
endif
ifeq ($(CONFIG_PLATFORM_ARM_TI_PANDA), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE
ARCH := arm
#CROSS_COMPILE := /media/DATA-1/aosp/ics-aosp_20111227/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi-
#KSRC := /media/DATA-1/aosp/android-omap-panda-3.0_20120104
CROSS_COMPILE := /media/DATA-1/android-4.0/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi-
KSRC := /media/DATA-1/android-4.0/panda_kernel/omap
MODULE_NAME := wlan
endif
ifeq ($(CONFIG_PLATFORM_MIPS_JZ4760), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE
ARCH ?= mips
CROSS_COMPILE ?= /mnt/sdb5/Ingenic/Umido/mips-4.3/bin/mips-linux-gnu-
KSRC ?= /mnt/sdb5/Ingenic/Umido/kernel
endif
#Add setting for MN10300
ifeq ($(CONFIG_PLATFORM_MN10300), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MN10300
ARCH := mn10300
CROSS_COMPILE := mn10300-linux-
KVER := 2.6.32.2
KSRC := /home/winuser/work/Plat_sLD2T_V3010/usr/src/linux-2.6.32.2
INSTALL_PREFIX :=
endif
ifeq ($(CONFIG_PLATFORM_ARM_SUNxI), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ARM_SUNxI
ARCH := arm
CROSS_COMPILE := arm-none-linux-gnueabi-
KVER := 3.0.8
#KSRC:= ../lichee/linux-3.0/
endif
ifeq ($(CONFIG_PLATFORM_ARM_SUN6I), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN6I
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
# default setting for Android 4.1, 4.2
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
ARCH := arm
CROSS_COMPILE := arm-none-linux-gnueabi-
KVER := 3.3.0
#KSRC:= ../lichee/linux-3.3/
endif
ifneq ($(USER_MODULE_NAME),)
MODULE_NAME := $(USER_MODULE_NAME)
endif
ifeq ($(CONFIG_MP_INCLUDED), y)
MODULE_NAME := $(MODULE_NAME)_mp
EXTRA_CFLAGS += -DCONFIG_MP_INCLUDED
endif
ifneq ($(KERNELRELEASE),)
rtk_core := core/rtw_cmd.o \
core/rtw_security.o \
core/rtw_debug.o \
core/rtw_io.o \
core/rtw_ioctl_query.o \
core/rtw_ioctl_set.o \
core/rtw_ieee80211.o \
core/rtw_mlme.o \
core/rtw_mlme_ext.o \
core/rtw_wlan_util.o \
core/rtw_pwrctrl.o \
core/rtw_rf.o \
core/rtw_recv.o \
core/rtw_sta_mgt.o \
core/rtw_ap.o \
core/rtw_xmit.o \
core/rtw_p2p.o \
core/rtw_tdls.o \
core/rtw_br_ext.o \
core/rtw_iol.o \
core/rtw_sreset.o
$(MODULE_NAME)-y += $(rtk_core)
$(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o
$(MODULE_NAME)-y += core/efuse/rtw_efuse.o
$(MODULE_NAME)-y += $(_HAL_INTFS_FILES)
$(MODULE_NAME)-y += $(_OS_INTFS_FILES)
$(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o \
core/rtw_mp_ioctl.o
obj-$(CONFIG_RTL8192CU) := $(MODULE_NAME).o
else
export CONFIG_RTL8192CU = m
all: modules
modules:
$(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd) modules
strip:
$(CROSS_COMPILE)strip $(MODULE_NAME).ko --strip-unneeded
install:
install -p -m 644 $(MODULE_NAME).ko $(MODDESTDIR)
/sbin/depmod -a ${KVER}
uninstall:
rm -f $(MODDESTDIR)/$(MODULE_NAME).ko
/sbin/depmod -a ${KVER}
config_r:
@echo "make config"
/bin/bash script/Configure script/config.in
.PHONY: modules clean
clean:
rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~
rm .tmp_versions -fr ; rm Module.symvers -fr
rm -fr Module.markers ; rm -fr modules.order
cd core/efuse ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal/$(RTL871X)/$(HCI_NAME) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal/$(RTL871X) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
endif

5
drivers/net/wireless/realtek/rtl8192cu/clean Executable file
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@@ -0,0 +1,5 @@
#!/bin/bash
rmmod 8192cu
rmmod 8192ce
rmmod 8192du
rmmod 8192de

1145
drivers/net/wireless/realtek/rtl8192cu/core/efuse/rtw_efuse.c Normal file
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2939
drivers/net/wireless/realtek/rtl8192cu/core/rtw_ap.c Normal file
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1699
drivers/net/wireless/realtek/rtl8192cu/core/rtw_br_ext.c Normal file
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3034
drivers/net/wireless/realtek/rtl8192cu/core/rtw_cmd.c Normal file
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1336
drivers/net/wireless/realtek/rtl8192cu/core/rtw_debug.c Normal file
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422
drivers/net/wireless/realtek/rtl8192cu/core/rtw_eeprom.c Normal file
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@@ -0,0 +1,422 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_EEPROM_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
void up_clk(_adapter* padapter, u16 *x)
{
_func_enter_;
*x = *x | _EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
void down_clk(_adapter * padapter, u16 *x )
{
_func_enter_;
*x = *x & ~_EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
void shift_out_bits(_adapter * padapter, u16 data, u16 count)
{
u16 x,mask;
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
mask = 0x01 << (count - 1);
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
do
{
x &= ~_EEDI;
if(data & mask)
x |= _EEDI;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
rtw_write8(padapter, EE_9346CR, (u8)x);
rtw_udelay_os(CLOCK_RATE);
up_clk(padapter, &x);
down_clk(padapter, &x);
mask = mask >> 1;
} while(mask);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~_EEDI;
rtw_write8(padapter, EE_9346CR, (u8)x);
out:
_func_exit_;
}
u16 shift_in_bits (_adapter * padapter)
{
u16 x,d=0,i;
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~( _EEDO | _EEDI);
d = 0;
for(i=0; i<16; i++)
{
d = d << 1;
up_clk(padapter, &x);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI);
if(x & _EEDO)
d |= 1;
down_clk(padapter, &x);
}
out:
_func_exit_;
return d;
}
void standby(_adapter * padapter )
{
u8 x;
_func_enter_;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EECS | _EESK);
rtw_write8(padapter, EE_9346CR,x);
rtw_udelay_os(CLOCK_RATE);
x |= _EECS;
rtw_write8(padapter, EE_9346CR, x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
u16 wait_eeprom_cmd_done(_adapter* padapter)
{
u8 x;
u16 i,res=_FALSE;
_func_enter_;
standby(padapter );
for (i=0; i<200; i++)
{
x = rtw_read8(padapter, EE_9346CR);
if (x & _EEDO){
res=_TRUE;
goto exit;
}
rtw_udelay_os(CLOCK_RATE);
}
exit:
_func_exit_;
return res;
}
void eeprom_clean(_adapter * padapter)
{
u16 x;
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EECS | _EEDI);
rtw_write8(padapter, EE_9346CR, (u8)x);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
up_clk(padapter, &x);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
down_clk(padapter, &x);
out:
_func_exit_;
}
void eeprom_write16(_adapter * padapter, u16 reg, u16 data)
{
u8 x;
#ifdef CONFIG_RTL8712
u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new;
tmp8_ori=rtw_read8(padapter, 0x102502f1);
tmp8_new=tmp8_ori & 0xf7;
if(tmp8_ori != tmp8_new){
rtw_write8(padapter, 0x102502f1, tmp8_new);
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n"));
}
tmp8_clk_ori=rtw_read8(padapter,0x10250003);
tmp8_clk_new=tmp8_clk_ori|0x20;
if(tmp8_clk_new!=tmp8_clk_ori){
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
rtw_write8(padapter, 0x10250003, tmp8_clk_new);
}
#endif
_func_enter_;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, x);
shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5);
if(padapter->EepromAddressSize==8) //CF+ and SDIO
shift_out_bits(padapter, 0, 6);
else //USB
shift_out_bits(padapter, 0, 4);
standby( padapter);
// Commented out by rcnjko, 2004.0
// // Erase this particular word. Write the erase opcode and register
// // number in that order. The opcode is 3bits in length; reg is 6 bits long.
// shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3);
// shift_out_bits(Adapter, reg, Adapter->EepromAddressSize);
//
// if (wait_eeprom_cmd_done(Adapter ) == FALSE)
// {
// return;
// }
standby(padapter );
// write the new word to the EEPROM
// send the write opcode the EEPORM
shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3);
// select which word in the EEPROM that we are writing to.
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
// write the data to the selected EEPROM word.
shift_out_bits(padapter, data, 16);
if (wait_eeprom_cmd_done(padapter ) == _FALSE)
{
goto exit;
}
standby(padapter );
shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5);
shift_out_bits(padapter, reg, 4);
eeprom_clean(padapter );
exit:
#ifdef CONFIG_RTL8712
if(tmp8_clk_new!=tmp8_clk_ori)
rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
if(tmp8_new!=tmp8_ori)
rtw_write8(padapter, 0x102502f1, tmp8_ori);
#endif
_func_exit_;
return;
}
u16 eeprom_read16(_adapter * padapter, u16 reg) //ReadEEprom
{
u16 x;
u16 data=0;
#ifdef CONFIG_RTL8712
u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new;
tmp8_ori= rtw_read8(padapter, 0x102502f1);
tmp8_new = tmp8_ori & 0xf7;
if(tmp8_ori != tmp8_new){
rtw_write8(padapter, 0x102502f1, tmp8_new);
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n"));
}
tmp8_clk_ori=rtw_read8(padapter,0x10250003);
tmp8_clk_new=tmp8_clk_ori|0x20;
if(tmp8_clk_new!=tmp8_clk_ori){
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
rtw_write8(padapter, 0x10250003, tmp8_clk_new);
}
#endif
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
// select EEPROM, reset bits, set _EECS
x = rtw_read8(padapter, EE_9346CR);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
// write the read opcode and register number in that order
// The opcode is 3bits in length, reg is 6 bits long
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
// Now read the data (16 bits) in from the selected EEPROM word
data = shift_in_bits(padapter);
eeprom_clean(padapter);
out:
#ifdef CONFIG_RTL8712
if(tmp8_clk_new!=tmp8_clk_ori)
rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
if(tmp8_new!=tmp8_ori)
rtw_write8(padapter, 0x102502f1, tmp8_ori);
#endif
_func_exit_;
return data;
}
//From even offset
void eeprom_read_sz(_adapter * padapter, u16 reg, u8* data, u32 sz)
{
u16 x, data16;
u32 i;
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
// select EEPROM, reset bits, set _EECS
x = rtw_read8(padapter, EE_9346CR);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
// write the read opcode and register number in that order
// The opcode is 3bits in length, reg is 6 bits long
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
for(i=0; i<sz; i+=2)
{
data16 = shift_in_bits(padapter);
data[i] = data16 & 0xff;
data[i+1] = data16 >>8;
}
eeprom_clean(padapter);
out:
_func_exit_;
}
//addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg)
u8 eeprom_read(_adapter * padapter, u32 addr_off, u8 sz, u8* rbuf)
{
u8 quotient, remainder, addr_2align_odd;
u16 reg, stmp , i=0, idx = 0;
_func_enter_;
reg = (u16)(addr_off >> 1);
addr_2align_odd = (u8)(addr_off & 0x1);
if(addr_2align_odd) //read that start at high part: e.g 1,3,5,7,9,...
{
stmp = eeprom_read16(padapter, reg);
rbuf[idx++] = (u8) ((stmp>>8)&0xff); //return hogh-part of the short
reg++; sz--;
}
quotient = sz >> 1;
remainder = sz & 0x1;
for( i=0 ; i < quotient; i++)
{
stmp = eeprom_read16(padapter, reg+i);
rbuf[idx++] = (u8) (stmp&0xff);
rbuf[idx++] = (u8) ((stmp>>8)&0xff);
}
reg = reg+i;
if(remainder){ //end of read at lower part of short : 0,2,4,6,...
stmp = eeprom_read16(padapter, reg);
rbuf[idx] = (u8)(stmp & 0xff);
}
_func_exit_;
return _TRUE;
}
VOID read_eeprom_content(_adapter * padapter)
{
_func_enter_;
_func_exit_;
}

1914
drivers/net/wireless/realtek/rtl8192cu/core/rtw_ieee80211.c Normal file
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462
drivers/net/wireless/realtek/rtl8192cu/core/rtw_io.c Normal file
View File

@@ -0,0 +1,462 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*
The purpose of rtw_io.c
a. provides the API
b. provides the protocol engine
c. provides the software interface between caller and the hardware interface
Compiler Flag Option:
1. CONFIG_SDIO_HCI:
a. USE_SYNC_IRP: Only sync operations are provided.
b. USE_ASYNC_IRP:Both sync/async operations are provided.
2. CONFIG_USB_HCI:
a. USE_ASYNC_IRP: Both sync/async operations are provided.
3. CONFIG_CFIO_HCI:
b. USE_SYNC_IRP: Only sync operations are provided.
Only sync read/rtw_write_mem operations are provided.
jackson@realtek.com.tw
*/
#define _RTW_IO_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_io.h>
#include <osdep_intf.h>
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
#ifdef CONFIG_SDIO_HCI
#include <sdio_ops.h>
#endif
#ifdef CONFIG_USB_HCI
#include <usb_ops.h>
#endif
#ifdef CONFIG_PCI_HCI
#include <pci_ops.h>
#endif
u8 _rtw_read8(_adapter *adapter, u32 addr)
{
u8 r_val;
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read8 = pintfhdl->io_ops._read8;
r_val = _read8(pintfhdl, addr);
_func_exit_;
return r_val;
}
u16 _rtw_read16(_adapter *adapter, u32 addr)
{
u16 r_val;
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read16 = pintfhdl->io_ops._read16;
r_val = _read16(pintfhdl, addr);
_func_exit_;
return r_val;
}
u32 _rtw_read32(_adapter *adapter, u32 addr)
{
u32 r_val;
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read32 = pintfhdl->io_ops._read32;
r_val = _read32(pintfhdl, addr);
_func_exit_;
return r_val;
}
int _rtw_write8(_adapter *adapter, u32 addr, u8 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_func_enter_;
_write8 = pintfhdl->io_ops._write8;
ret = _write8(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write16(_adapter *adapter, u32 addr, u16 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_func_enter_;
_write16 = pintfhdl->io_ops._write16;
ret = _write16(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write32(_adapter *adapter, u32 addr, u32 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_func_enter_;
_write32 = pintfhdl->io_ops._write32;
ret = _write32(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *pdata)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = (struct intf_hdl*)(&(pio_priv->intf));
int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr,u32 length, u8 *pdata);
int ret;
_func_enter_;
_writeN = pintfhdl->io_ops._writeN;
ret = _writeN(pintfhdl, addr,length,pdata);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_func_enter_;
_write8_async = pintfhdl->io_ops._write8_async;
ret = _write8_async(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_func_enter_;
_write16_async = pintfhdl->io_ops._write16_async;
ret = _write16_async(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_func_enter_;
_write32_async = pintfhdl->io_ops._write32_async;
ret = _write32_async(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE))
{
RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));
return;
}
_read_mem = pintfhdl->io_ops._read_mem;
_read_mem(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
_write_mem = pintfhdl->io_ops._write_mem;
_write_mem(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE))
{
RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));
return;
}
_read_port = pintfhdl->io_ops._read_port;
_read_port(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void _rtw_read_port_cancel(_adapter *adapter)
{
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
if(_read_port_cancel)
_read_port_cancel(pintfhdl);
}
u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32 ret = _SUCCESS;
_func_enter_;
_write_port = pintfhdl->io_ops._write_port;
ret = _write_port(pintfhdl, addr, cnt, pmem);
_func_exit_;
return ret;
}
u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
{
int ret = _SUCCESS;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
struct submit_ctx sctx;
rtw_sctx_init(&sctx, timeout_ms);
pxmitbuf->sctx = &sctx;
ret = _rtw_write_port(adapter, addr, cnt, pmem);
if (ret == _SUCCESS)
ret = rtw_sctx_wait(&sctx);
return ret;
}
void _rtw_write_port_cancel(_adapter *adapter)
{
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
if(_write_port_cancel)
_write_port_cancel(pintfhdl);
}
int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops))
{
struct io_priv *piopriv = &padapter->iopriv;
struct intf_hdl *pintf = &piopriv->intf;
if (set_intf_ops == NULL)
return _FAIL;
piopriv->padapter = padapter;
pintf->padapter = padapter;
pintf->pintf_dev = adapter_to_dvobj(padapter);
set_intf_ops(&pintf->io_ops);
return _SUCCESS;
}
#ifdef DBG_IO
u16 read_sniff_ranges[][2] = {
//{0x550, 0x551},
};
u16 write_sniff_ranges[][2] = {
//{0x550, 0x551},
//{0x4c, 0x4c},
};
int read_sniff_num = sizeof(read_sniff_ranges)/sizeof(u16)/2;
int write_sniff_num = sizeof(write_sniff_ranges)/sizeof(u16)/2;
bool match_read_sniff_ranges(u16 addr, u16 len)
{
int i;
for (i = 0; i<read_sniff_num; i++) {
if (addr + len > read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1])
return _TRUE;
}
return _FALSE;
}
bool match_write_sniff_ranges(u16 addr, u16 len)
{
int i;
for (i = 0; i<write_sniff_num; i++) {
if (addr + len > write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1])
return _TRUE;
}
return _FALSE;
}
u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u8 val = _rtw_read8(adapter, addr);
if (match_read_sniff_ranges(addr, 1))
DBG_871X("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
return val;
}
u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u16 val = _rtw_read16(adapter, addr);
if (match_read_sniff_ranges(addr, 2))
DBG_871X("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val);
return val;
}
u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line)
{
u32 val = _rtw_read32(adapter, addr);
if (match_read_sniff_ranges(addr, 4))
DBG_871X("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val);
return val;
}
int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
{
if (match_write_sniff_ranges(addr, 1))
DBG_871X("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val);
return _rtw_write8(adapter, addr, val);
}
int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
{
if (match_write_sniff_ranges(addr, 2))
DBG_871X("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val);
return _rtw_write16(adapter, addr, val);
}
int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
{
if (match_write_sniff_ranges(addr, 4))
DBG_871X("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val);
return _rtw_write32(adapter, addr, val);
}
int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line)
{
if (match_write_sniff_ranges(addr, length))
DBG_871X("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length);
return _rtw_writeN(adapter, addr, length, data);
}
#endif

195
drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_query.c Normal file
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@@ -0,0 +1,195 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_IOCTL_QUERY_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_ioctl_query.h>
#include <wifi.h>
#ifdef PLATFORM_WINDOWS
//
// Added for WPA2-PSK, by Annie, 2005-09-20.
//
u8
query_802_11_capability(
_adapter* Adapter,
u8* pucBuf,
u32 * pulOutLen
)
{
static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] =
{
{Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled},
{Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled},
{Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled},
{Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled},
{Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled},
{Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled},
{Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled},
{Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled},
{Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled}
};
static ULONG ulNumOfPairSupported = sizeof(szAuthEnc)/sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION);
NDIS_802_11_CAPABILITY * pCap = (NDIS_802_11_CAPABILITY *)pucBuf;
u8* pucAuthEncryptionSupported = (u8*) pCap->AuthenticationEncryptionSupported;
pCap->Length = sizeof(NDIS_802_11_CAPABILITY);
if(ulNumOfPairSupported > 1 )
pCap->Length += (ulNumOfPairSupported-1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION);
pCap->Version = 2;
pCap->NoOfPMKIDs = NUM_PMKID_CACHE;
pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported;
if( sizeof (szAuthEnc) <= 240 ) // 240 = 256 - 4*4 // SecurityInfo.szCapability: only 256 bytes in size.
{
_rtw_memcpy( pucAuthEncryptionSupported, (u8*)szAuthEnc, sizeof (szAuthEnc) );
*pulOutLen = pCap->Length;
return _TRUE;
}
else
{
*pulOutLen = 0;
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("_query_802_11_capability(): szAuthEnc size is too large.\n"));
return _FALSE;
}
}
u8 query_802_11_association_information( _adapter *padapter,PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo)
{
struct wlan_network *tgt_network;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct security_priv *psecuritypriv=&(padapter->securitypriv);
WLAN_BSSID_EX *psecnetwork=(WLAN_BSSID_EX*)&(psecuritypriv->sec_bss);
u8 * pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
unsigned char i,*auth_ie,*supp_ie;
//NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION));
_rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION));
//pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
//------------------------------------------------------
// Association Request related information
//------------------------------------------------------
// Req_1. AvailableRequestFixedIEs
if(psecnetwork!=NULL){
pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES|NDIS_802_11_AI_REQFI_CURRENTAPADDRESS;
pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short)* & psecnetwork->IEs[10];
_rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress,
& psecnetwork->MacAddress, 6);
pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
if(check_fwstate( pmlmepriv, _FW_UNDER_LINKING|_FW_LINKED)==_TRUE)
{
if(psecuritypriv->ndisauthtype>=Ndis802_11AuthModeWPA2)
pDest[0] =48; //RSN Information Element
else
pDest[0] =221; //WPA(SSN) Information Element
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n Adapter->ndisauthtype==Ndis802_11AuthModeWPA)?0xdd:0x30 [%d]",pDest[0]));
supp_ie=&psecuritypriv->supplicant_ie[0];
for(i=0;i<supp_ie[0];i++)
{
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("IEs [%d] = 0x%x \n\n", i,supp_ie[i]));
}
i=13; //0~11 is fixed information element
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("i= %d tgt_network->network.IELength=%d\n\n", i,(int)psecnetwork->IELength));
while((i<supp_ie[0]) && (i<256)){
if((unsigned char)supp_ie[i]==pDest[0]){
_rtw_memcpy((u8 *)(pDest),
&supp_ie[i],
supp_ie[1+i]+2);
break;
}
i=i+supp_ie[i+1]+2;
if(supp_ie[1+i]==0)
i=i+1;
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("iteration i=%d IEs [%d] = 0x%x \n\n", i,i,supp_ie[i+1]));
}
pAssocInfo->RequestIELength += (2 + supp_ie[1+i]);// (2 + psecnetwork->IEs[1+i]+4);
}
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n psecnetwork != NULL,fwstate==_FW_UNDER_LINKING \n"));
}
//------------------------------------------------------
// Association Response related information
//------------------------------------------------------
if(check_fwstate( pmlmepriv, _FW_LINKED)==_TRUE)
{
tgt_network =&(pmlmepriv->cur_network);
if(tgt_network!=NULL){
pAssocInfo->AvailableResponseFixedIEs =
NDIS_802_11_AI_RESFI_CAPABILITIES
|NDIS_802_11_AI_RESFI_ASSOCIATIONID
;
pAssocInfo->ResponseFixedIEs.Capabilities =(unsigned short)* & tgt_network->network.IEs[10];
pAssocInfo->ResponseFixedIEs.StatusCode = 0;
pAssocInfo->ResponseFixedIEs.AssociationId =(unsigned short) tgt_network->aid;
pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)+pAssocInfo->RequestIELength;
auth_ie=&psecuritypriv->authenticator_ie[0];
for(i=0;i<auth_ie[0];i++)
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("IEs [%d] = 0x%x \n\n", i,auth_ie[i]));
i=auth_ie[0]-12;
if(i>0){
_rtw_memcpy((u8 *)&pDest[0],&auth_ie[1],i);
pAssocInfo->ResponseIELength =i;
}
pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength;
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n tgt_network != NULL,fwstate==_FW_LINKED \n"));
}
}
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n exit query_802_11_association_information \n"));
_func_exit_;
return _TRUE;
}
#endif

1031
drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_rtl.c Normal file
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File diff suppressed because it is too large Load Diff

1493
drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_set.c Normal file
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File diff suppressed because it is too large Load Diff

262
drivers/net/wireless/realtek/rtl8192cu/core/rtw_iol.c Normal file
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@@ -0,0 +1,262 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include<rtw_iol.h>
#ifdef CONFIG_IOL
struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter)
{
struct xmit_frame *xmit_frame;
struct xmit_buf *xmitbuf;
struct pkt_attrib *pattrib;
struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
#if 1
if ((xmit_frame = rtw_alloc_xmitframe(pxmitpriv)) == NULL)
{
DBG_871X("%s rtw_alloc_xmitframe return null\n", __FUNCTION__);
goto exit;
}
if ((xmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL)
{
DBG_871X("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__);
rtw_free_xmitframe(pxmitpriv, xmit_frame);
xmit_frame=NULL;
goto exit;
}
xmit_frame->frame_tag = MGNT_FRAMETAG;
xmit_frame->pxmitbuf = xmitbuf;
xmit_frame->buf_addr = xmitbuf->pbuf;
xmitbuf->priv_data = xmit_frame;
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = 0x10;
pattrib->pktlen = pattrib->last_txcmdsz = 0;
#else
if ((xmit_frame = alloc_mgtxmitframe(pxmitpriv)) == NULL)
{
DBG_871X("%s alloc_mgtxmitframe return null\n", __FUNCTION__);
}
else {
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = 0x10;
pattrib->pktlen = pattrib->last_txcmdsz = 0;
}
#endif
exit:
return xmit_frame;
}
int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len)
{
struct pkt_attrib *pattrib = &xmit_frame->attrib;
u16 buf_offset;
u32 ori_len;
//Todo: bulkout without this offset
#ifdef CONFIG_USB_HCI
buf_offset = TXDESC_OFFSET;
#else
buf_offset = 0;
#endif
ori_len = buf_offset+pattrib->pktlen;
//check if the io_buf can accommodate new cmds
if(ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) {
DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__
, ori_len + cmd_len + 8, MAX_XMITBUF_SZ);
return _FAIL;
}
_rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len);
pattrib->pktlen += cmd_len;
pattrib->last_txcmdsz += cmd_len;
//DBG_871X("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen);
return _SUCCESS;
}
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
{
IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0};
RTW_PUT_BE32((u8*)&cmd.value, (u32)page_boundary);
return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
}
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value)
{
IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0};
RTW_PUT_BE16((u8*)&cmd.address, (u16)addr);
RTW_PUT_BE32((u8*)&cmd.value, (u32)value);
return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
}
int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value)
{
IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0};
RTW_PUT_BE16((u8*)&cmd.address, (u16)addr);
RTW_PUT_BE32((u8*)&cmd.value, (u32)value);
return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
}
int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value)
{
IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0};
u8* pos = (u8 *)&cmd;
RTW_PUT_BE16((u8*)&cmd.address, (u16)addr);
RTW_PUT_BE32((u8*)&cmd.value, (u32)value);
return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
}
#ifdef DBG_IO
int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line)
{
if (match_write_sniff_ranges(addr, 1))
DBG_871X("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value);
return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value);
}
int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line)
{
if (match_write_sniff_ranges(addr, 2))
DBG_871X("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value);
return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value);
}
int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line)
{
if (match_write_sniff_ranges(addr, 4))
DBG_871X("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value);
return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value);
}
#endif
int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us)
{
IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0};
RTW_PUT_BE32((u8*)&cmd.value, (u32)us);
//DBG_871X("%s %u\n", __FUNCTION__, us);
return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
}
int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms)
{
IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0};
RTW_PUT_BE32((u8*)&cmd.value, (u32)ms);
//DBG_871X("%s %u\n", __FUNCTION__, ms);
return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
}
int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame)
{
struct pkt_attrib *pattrib = &xmit_frame->attrib;
u16 buf_offset;
u32 ori_len;
IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0};
//Todo: bulkout without this offset
#ifdef CONFIG_USB_HCI
buf_offset = TXDESC_OFFSET;
#else
buf_offset = 0;
#endif
ori_len = buf_offset+pattrib->pktlen;
//check if the io_buf can accommodate new cmds
if(ori_len + 8 > MAX_XMITBUF_SZ) {
DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate end cmd\n", __FUNCTION__
, ori_len + 8, MAX_XMITBUF_SZ);
return _FAIL;
}
_rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, (u8*)&end_cmd, 8);
pattrib->pktlen += 8;
pattrib->last_txcmdsz += 8;
//DBG_871X("%s ori:%u + 8 = %u\n", __FUNCTION__ , ori_len, buf_offset+pattrib->pktlen);
return _SUCCESS;
}
int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms)
{
return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms);
}
int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms)
{
struct xmit_frame *xmit_frame;
if((xmit_frame=rtw_IOL_accquire_xmit_frame(adapter)) == NULL)
return _FAIL;
if(rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num<<3) == _FAIL)
return _FAIL;
return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms);
}
int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms)
{
IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0};
return rtw_IOL_exec_cmd_array_sync(adapter, (u8*)&end_cmd, 1, max_wating_ms);
}
bool rtw_IOL_applied(ADAPTER *adapter)
{
if(adapter->registrypriv.force_iol)
return _TRUE;
#ifdef CONFIG_USB_HCI
if(!adapter_to_dvobj(adapter)->ishighspeed)
return _TRUE;
#endif
return _FALSE;
}
#endif //CONFIG_IOL

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drivers/net/wireless/realtek/rtl8192cu/core/rtw_mlme.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/core/rtw_mlme_ext.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/core/rtw_mp.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/core/rtw_p2p.c Normal file
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1538
drivers/net/wireless/realtek/rtl8192cu/core/rtw_pwrctrl.c Normal file
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4286
drivers/net/wireless/realtek/rtl8192cu/core/rtw_recv.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_RF_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
struct ch_freq {
u32 channel;
u32 frequency;
};
struct ch_freq ch_freq_map[] = {
{1, 2412},{2, 2417},{3, 2422},{4, 2427},{5, 2432},
{6, 2437},{7, 2442},{8, 2447},{9, 2452},{10, 2457},
{11, 2462},{12, 2467},{13, 2472},{14, 2484},
/* UNII */
{36, 5180},{40, 5200},{44, 5220},{48, 5240},{52, 5260},
{56, 5280},{60, 5300},{64, 5320},{149, 5745},{153, 5765},
{157, 5785},{161, 5805},{165, 5825},{167, 5835},{169, 5845},
{171, 5855},{173, 5865},
/* HiperLAN2 */
{100, 5500},{104, 5520},{108, 5540},{112, 5560},{116, 5580},
{120, 5600},{124, 5620},{128, 5640},{132, 5660},{136, 5680},
{140, 5700},
/* Japan MMAC */
{34, 5170},{38, 5190},{42, 5210},{46, 5230},
/* Japan */
{184, 4920},{188, 4940},{192, 4960},{196, 4980},
{208, 5040},/* Japan, means J08 */
{212, 5060},/* Japan, means J12 */
{216, 5080},/* Japan, means J16 */
};
int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq));
u32 rtw_ch2freq(u32 channel)
{
u8 i;
u32 freq = 0;
for (i = 0; i < ch_freq_map_num; i++)
{
if (channel == ch_freq_map[i].channel)
{
freq = ch_freq_map[i].frequency;
break;
}
}
if (i == ch_freq_map_num)
freq = 2412;
return freq;
}
u32 rtw_freq2ch(u32 freq)
{
u8 i;
u32 ch = 0;
for (i = 0; i < ch_freq_map_num; i++)
{
if (freq == ch_freq_map[i].frequency)
{
ch = ch_freq_map[i].channel;
break;
}
}
if (i == ch_freq_map_num)
ch = 1;
return ch;
}

3114
drivers/net/wireless/realtek/rtl8192cu/core/rtw_security.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/core/rtw_sreset.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include<rtw_sreset.h>
void sreset_init_value(_adapter *padapter)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
_rtw_mutex_init(&psrtpriv->silentreset_mutex);
psrtpriv->silent_reset_inprogress = _FALSE;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time =0;
psrtpriv->last_tx_complete_time =0;
#endif
}
void sreset_reset_value(_adapter *padapter)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
psrtpriv->silent_reset_inprogress = _FALSE;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time =0;
psrtpriv->last_tx_complete_time =0;
#endif
}
u8 sreset_get_wifi_status(_adapter *padapter)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
u8 status = WIFI_STATUS_SUCCESS;
u32 val32 = 0;
_irqL irqL;
if(psrtpriv->silent_reset_inprogress == _TRUE)
{
return status;
}
val32 =rtw_read32(padapter,REG_TXDMA_STATUS);
if(val32==0xeaeaeaea){
psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
}
else if(val32!=0){
DBG_8192C("txdmastatu(%x)\n",val32);
psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR;
}
if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status)
{
DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status);
status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL)));
}
DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status);
//status restore
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
return status;
#else
return WIFI_STATUS_SUCCESS;
#endif
}
void sreset_set_wifi_error_status(_adapter *padapter, u32 status)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
pHalData->srestpriv.Wifi_Error_Status = status;
#endif
}
void sreset_set_trigger_point(_adapter *padapter, s32 tgp)
{
#if defined(DBG_CONFIG_ERROR_DETECT)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
pHalData->srestpriv.dbg_trigger_point = tgp;
#endif
}
bool sreset_inprogress(_adapter *padapter)
{
#if defined(DBG_CONFIG_ERROR_RESET)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
return pHalData->srestpriv.silent_reset_inprogress;
#else
return _FALSE;
#endif
}
void sreset_restore_security_station(_adapter *padapter)
{
u8 EntryId = 0;
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
struct sta_priv * pstapriv = &padapter->stapriv;
struct sta_info *psta;
struct security_priv* psecuritypriv=&(padapter->securitypriv);
struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
{
u8 val8;
if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) {
val8 = 0xcc;
#ifdef CONFIG_WAPI_SUPPORT
} else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) {
//Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey.
val8 = 0x4c;
#endif
} else {
val8 = 0xcf;
}
rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
}
#if 0
if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) ||
( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ ))
{
for(EntryId=0; EntryId<4; EntryId++)
{
if(EntryId == psecuritypriv->dot11PrivacyKeyIndex)
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1);
else
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0);
}
}
else
#endif
if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
{
psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv));
if (psta == NULL) {
//DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n"));
}
else
{
//pairwise key
rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE);
//group key
rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0);
}
}
}
void sreset_restore_network_station(_adapter *padapter)
{
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
#if 0
{
//=======================================================
// reset related register of Beacon control
//set MSR to nolink
Set_MSR(padapter, _HW_STATE_NOLINK_);
// reject all data frame
rtw_write16(padapter, REG_RXFLTMAP2,0x00);
//reset TSF
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
// disable update TSF
SetBcnCtrlReg(padapter, BIT(4), 0);
//=======================================================
}
#endif
rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure);
{
u8 threshold;
#ifdef CONFIG_USB_HCI
// TH=1 => means that invalidate usb rx aggregation
// TH=0 => means that validate usb rx aggregation, use init value.
if(mlmepriv->htpriv.ht_option) {
if(padapter->registrypriv.wifi_spec==1)
threshold = 1;
else
threshold = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
} else {
threshold = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
}
#endif
}
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
//disable dynamic functions, such as high power, DIG
//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
{
u8 join_type = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
}
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
mlmeext_joinbss_event_callback(padapter, 1);
//restore Sequence No.
rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);
sreset_restore_security_station(padapter);
}
void sreset_restore_network_status(_adapter *padapter)
{
struct mlme_priv *mlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) {
DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
sreset_restore_network_station(padapter);
} else if (check_fwstate(mlmepriv, WIFI_AP_STATE)) {
DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
rtw_ap_restore_network(padapter);
} else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE)) {
DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
} else {
DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
}
}
void sreset_stop_adapter(_adapter *padapter)
{
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
if (padapter == NULL)
return;
DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
if (!rtw_netif_queue_stopped(padapter->pnetdev))
rtw_netif_stop_queue(padapter->pnetdev);
rtw_cancel_all_timer(padapter);
/* TODO: OS and HCI independent */
#if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI)
tasklet_kill(&pxmitpriv->xmit_tasklet);
#endif
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
rtw_scan_abort(padapter);
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
_rtw_join_timeout_handler(padapter);
}
void sreset_start_adapter(_adapter *padapter)
{
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
if (padapter == NULL)
return;
DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
sreset_restore_network_status(padapter);
}
/* TODO: OS and HCI independent */
#if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI)
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
#endif
_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
if (rtw_netif_queue_stopped(padapter->pnetdev))
rtw_netif_wake_queue(padapter->pnetdev);
}
void sreset_reset(_adapter *padapter)
{
#ifdef DBG_CONFIG_ERROR_RESET
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
_irqL irqL;
u32 start = rtw_get_current_time();
DBG_871X("%s\n", __FUNCTION__);
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
_enter_pwrlock(&pwrpriv->lock);
psrtpriv->silent_reset_inprogress = _TRUE;
pwrpriv->change_rfpwrstate = rf_off;
sreset_stop_adapter(padapter);
#ifdef CONFIG_CONCURRENT_MODE
sreset_stop_adapter(padapter->pbuddy_adapter);
#endif
#ifdef CONFIG_IPS
_ips_enter(padapter);
_ips_leave(padapter);
#endif
sreset_start_adapter(padapter);
#ifdef CONFIG_CONCURRENT_MODE
sreset_start_adapter(padapter->pbuddy_adapter);
#endif
psrtpriv->silent_reset_inprogress = _FALSE;
_exit_pwrlock(&pwrpriv->lock);
DBG_871X("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start));
#endif
}

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drivers/net/wireless/realtek/rtl8192cu/core/rtw_sta_mgt.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_STA_MGT_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
#include <mlme_osdep.h>
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
#include <sta_info.h>
void _rtw_init_stainfo(struct sta_info *psta);
void _rtw_init_stainfo(struct sta_info *psta)
{
_func_enter_;
_rtw_memset((u8 *)psta, 0, sizeof (struct sta_info));
_rtw_spinlock_init(&psta->lock);
_rtw_init_listhead(&psta->list);
_rtw_init_listhead(&psta->hash_list);
//_rtw_init_listhead(&psta->asoc_list);
//_rtw_init_listhead(&psta->sleep_list);
//_rtw_init_listhead(&psta->wakeup_list);
_rtw_init_queue(&psta->sleep_q);
psta->sleepq_len = 0;
_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
#ifdef CONFIG_AP_MODE
_rtw_init_listhead(&psta->asoc_list);
_rtw_init_listhead(&psta->auth_list);
psta->expire_to = 0;
psta->flags = 0;
psta->capability = 0;
psta->bpairwise_key_installed = _FALSE;
#ifdef CONFIG_NATIVEAP_MLME
psta->nonerp_set = 0;
psta->no_short_slot_time_set = 0;
psta->no_short_preamble_set = 0;
psta->no_ht_gf_set = 0;
psta->no_ht_set = 0;
psta->ht_20mhz_set = 0;
#endif
#ifdef CONFIG_TX_MCAST2UNI
psta->under_exist_checking = 0;
#endif // CONFIG_TX_MCAST2UNI
psta->keep_alive_trycnt = 0;
#endif // CONFIG_AP_MODE
_func_exit_;
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
{
struct sta_info *psta;
s32 i;
_func_enter_;
pstapriv->pallocated_stainfo_buf = rtw_zvmalloc (sizeof(struct sta_info) * NUM_STA+ 4);
if(!pstapriv->pallocated_stainfo_buf)
return _FAIL;
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
_rtw_spinlock_init(&pstapriv->sta_hash_lock);
//_rtw_init_queue(&pstapriv->asoc_q);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
for(i = 0; i < NUM_STA; i++)
{
_rtw_init_stainfo(psta);
_rtw_init_listhead(&(pstapriv->sta_hash[i]));
rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
psta++;
}
#ifdef CONFIG_AP_MODE
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
_rtw_init_listhead(&pstapriv->asoc_list);
_rtw_init_listhead(&pstapriv->auth_list);
_rtw_spinlock_init(&pstapriv->asoc_list_lock);
_rtw_spinlock_init(&pstapriv->auth_list_lock);
pstapriv->asoc_list_cnt = 0;
pstapriv->auth_list_cnt = 0;
pstapriv->auth_to = 3; // 3*2 = 6 sec
pstapriv->assoc_to = 3;
//pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic.
//pstapriv->expire_to = 30;// 30*2 = 60 sec = 1 min, expire after no any traffic.
#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
pstapriv->expire_to = 3; // 3*2 = 6 sec
#else
pstapriv->expire_to = 60;// 60*2 = 120 sec = 2 min, expire after no any traffic.
#endif
pstapriv->max_num_sta = NUM_STA;
#endif
_func_exit_;
return _SUCCESS;
}
inline int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta)
{
int offset = (((u8 *)sta) - stapriv->pstainfo_buf)/sizeof(struct sta_info);
if (!stainfo_offset_valid(offset))
DBG_871X("%s invalid offset(%d), out of range!!!", __func__, offset);
return offset;
}
inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset)
{
if (!stainfo_offset_valid(offset))
DBG_871X("%s invalid offset(%d), out of range!!!", __func__, offset);
return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info));
}
void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv);
void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv)
{
_func_enter_;
_rtw_spinlock_free(&psta_xmitpriv->lock);
_rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock));
_func_exit_;
}
static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv)
{
_func_enter_;
_rtw_spinlock_free(&psta_recvpriv->lock);
_rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock));
_func_exit_;
}
void rtw_mfree_stainfo(struct sta_info *psta);
void rtw_mfree_stainfo(struct sta_info *psta)
{
_func_enter_;
if(&psta->lock != NULL)
_rtw_spinlock_free(&psta->lock);
_rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv);
_rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv);
_func_exit_;
}
// this function is used to free the memory of lock || sema for all stainfos
void rtw_mfree_all_stainfo(struct sta_priv *pstapriv );
void rtw_mfree_all_stainfo(struct sta_priv *pstapriv )
{
_irqL irqL;
_list *plist, *phead;
struct sta_info *psta = NULL;
_func_enter_;
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
phead = get_list_head(&pstapriv->free_sta_queue);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
psta = LIST_CONTAINOR(plist, struct sta_info ,list);
plist = get_next(plist);
rtw_mfree_stainfo(psta);
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
_func_exit_;
}
void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv);
void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv)
{
#ifdef CONFIG_AP_MODE
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
#endif
rtw_mfree_all_stainfo(pstapriv); //be done before free sta_hash_lock
_rtw_spinlock_free(&pstapriv->free_sta_queue.lock);
_rtw_spinlock_free(&pstapriv->sta_hash_lock);
_rtw_spinlock_free(&pstapriv->wakeup_q.lock);
_rtw_spinlock_free(&pstapriv->sleep_q.lock);
#ifdef CONFIG_AP_MODE
_rtw_spinlock_free(&pstapriv->asoc_list_lock);
_rtw_spinlock_free(&pstapriv->auth_list_lock);
_rtw_spinlock_free(&pacl_list->acl_node_q.lock);
#endif
}
u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
{
_irqL irqL;
_list *phead, *plist;
struct sta_info *psta = NULL;
struct recv_reorder_ctrl *preorder_ctrl;
int index;
_func_enter_;
if(pstapriv){
/* delete all reordering_ctrl_timer */
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
for(index = 0; index < NUM_STA; index++)
{
phead = &(pstapriv->sta_hash[index]);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
int i;
psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list);
plist = get_next(plist);
for(i=0; i < 16 ; i++)
{
preorder_ctrl = &psta->recvreorder_ctrl[i];
_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
}
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
/*===============================*/
rtw_mfree_sta_priv_lock(pstapriv);
if(pstapriv->pallocated_stainfo_buf) {
rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info)*NUM_STA+4);
}
}
_func_exit_;
return _SUCCESS;
}
//struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr)
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
_irqL irqL, irqL2;
uint tmp_aid;
s32 index;
_list *phash_list;
struct sta_info *psta;
_queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
int i = 0;
u16 wRxSeqInitialValue = 0xffff;
_func_enter_;
pfree_sta_queue = &pstapriv->free_sta_queue;
//_enter_critical_bh(&(pfree_sta_queue->lock), &irqL);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
if (_rtw_queue_empty(pfree_sta_queue) == _TRUE)
{
//_exit_critical_bh(&(pfree_sta_queue->lock), &irqL);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
psta = NULL;
}
else
{
psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list);
rtw_list_delete(&(psta->list));
//_exit_critical_bh(&(pfree_sta_queue->lock), &irqL);
tmp_aid = psta->aid;
_rtw_init_stainfo(psta);
_rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index = %x", index));
if(index >= NUM_STA){
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA"));
psta= NULL;
goto exit;
}
phash_list = &(pstapriv->sta_hash[index]);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
rtw_list_insert_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count ++ ;
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
// Commented by Albert 2009/08/13
// For the SMC router, the sequence number of first packet of WPS handshake will be 0.
// In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable.
// So, we initialize the tid_rxseq variable as the 0xffff.
for( i = 0; i < 16; i++ )
{
_rtw_memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 );
}
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo with hwaddr = %x %x %x %x %x %x \n",
pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5]));
init_addba_retry_timer(pstapriv->padapter, psta);
#ifdef CONFIG_TDLS
psta->padapter = pstapriv->padapter;
init_TPK_timer(pstapriv->padapter, psta);
init_ch_switch_timer(pstapriv->padapter, psta);
init_base_ch_timer(pstapriv->padapter, psta);
init_off_ch_timer(pstapriv->padapter, psta);
init_handshake_timer(pstapriv->padapter, psta);
init_tdls_alive_timer(pstapriv->padapter, psta);
#endif //CONFIG_TDLS
//for A-MPDU Rx reordering buffer control
for(i=0; i < 16 ; i++)
{
preorder_ctrl = &psta->recvreorder_ctrl[i];
preorder_ctrl->padapter = pstapriv->padapter;
preorder_ctrl->enable = _FALSE;
preorder_ctrl->indicate_seq = 0xffff;
#ifdef DBG_RX_SEQ
DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__,
preorder_ctrl->indicate_seq);
#endif
preorder_ctrl->wend_b= 0xffff;
//preorder_ctrl->wsize_b = (NR_RECVBUFF-2);
preorder_ctrl->wsize_b = 64;//64;
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
//init for DM
psta->rssi_stat.UndecoratedSmoothedPWDB = 0;
psta->rssi_stat.UndecoratedSmoothedCCK = (-1);
/* init for the sequence number of received management frame */
psta->RxMgmtFrameSeqNum = 0xffff;
}
exit:
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
_func_exit_;
return psta;
}
// using pstapriv->sta_hash_lock to protect
u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta)
{
int i;
_irqL irqL0;
_queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
struct sta_xmit_priv *pstaxmitpriv;
struct xmit_priv *pxmitpriv= &padapter->xmitpriv;
struct sta_priv *pstapriv = &padapter->stapriv;
struct hw_xmit *phwxmit;
_func_enter_;
if (psta == NULL)
goto exit;
_enter_critical_bh(&psta->lock, &irqL0);
psta->state &= ~_FW_LINKED;
_exit_critical_bh(&psta->lock, &irqL0);
pfree_sta_queue = &pstapriv->free_sta_queue;
pstaxmitpriv = &psta->sta_xmitpriv;
//rtw_list_delete(&psta->sleep_list);
//rtw_list_delete(&psta->wakeup_list);
_enter_critical_bh(&pxmitpriv->lock, &irqL0);
rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q);
psta->sleepq_len = 0;
//vo
//_enter_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0);
rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vo_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
phwxmit = pxmitpriv->hwxmits;
phwxmit->accnt -= pstaxmitpriv->vo_q.qcnt;
pstaxmitpriv->vo_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0);
//vi
//_enter_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0);
rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vi_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+1;
phwxmit->accnt -= pstaxmitpriv->vi_q.qcnt;
pstaxmitpriv->vi_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0);
//be
//_enter_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0);
rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->be_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+2;
phwxmit->accnt -= pstaxmitpriv->be_q.qcnt;
pstaxmitpriv->be_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0);
//bk
//_enter_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0);
rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->bk_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+3;
phwxmit->accnt -= pstaxmitpriv->bk_q.qcnt;
pstaxmitpriv->bk_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0);
_exit_critical_bh(&pxmitpriv->lock, &irqL0);
rtw_list_delete(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]));
pstapriv->asoc_sta_count --;
// re-init sta_info; 20061114 // will be init in alloc_stainfo
//_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
//_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
_cancel_timer_ex(&psta->addba_retry_timer);
#ifdef CONFIG_TDLS
_cancel_timer_ex(&psta->TPK_timer);
_cancel_timer_ex(&psta->option_timer);
_cancel_timer_ex(&psta->base_ch_timer);
_cancel_timer_ex(&psta->off_ch_timer);
_cancel_timer_ex(&psta->alive_timer1);
_cancel_timer_ex(&psta->alive_timer2);
#endif //CONFIG_TDLS
//for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer
for(i=0; i < 16 ; i++)
{
_irqL irqL;
_list *phead, *plist;
union recv_frame *prframe;
_queue *ppending_recvframe_queue;
_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
preorder_ctrl = &psta->recvreorder_ctrl[i];
_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
_enter_critical_bh(&ppending_recvframe_queue->lock, &irqL);
phead = get_list_head(ppending_recvframe_queue);
plist = get_next(phead);
while(!rtw_is_list_empty(phead))
{
prframe = LIST_CONTAINOR(plist, union recv_frame, u);
plist = get_next(plist);
rtw_list_delete(&(prframe->u.hdr.list));
rtw_free_recvframe(prframe, pfree_recv_queue);
}
_exit_critical_bh(&ppending_recvframe_queue->lock, &irqL);
}
#ifdef CONFIG_AP_MODE
/*
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL0);
rtw_list_delete(&psta->asoc_list);
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL0);
*/
_enter_critical_bh(&pstapriv->auth_list_lock, &irqL0);
if (!rtw_is_list_empty(&psta->auth_list)) {
rtw_list_delete(&psta->auth_list);
pstapriv->auth_list_cnt--;
}
_exit_critical_bh(&pstapriv->auth_list_lock, &irqL0);
psta->expire_to = 0;
psta->sleepq_ac_len = 0;
psta->qos_info = 0;
psta->max_sp_len = 0;
psta->uapsd_bk = 0;
psta->uapsd_be = 0;
psta->uapsd_vi = 0;
psta->uapsd_vo = 0;
psta->has_legacy_ac = 0;
#ifdef CONFIG_NATIVEAP_MLME
pstapriv->sta_dz_bitmap &=~BIT(psta->aid);
pstapriv->tim_bitmap &=~BIT(psta->aid);
//rtw_indicate_sta_disassoc_event(padapter, psta);
if ((psta->aid >0)&&(pstapriv->sta_aid[psta->aid - 1] == psta))
{
pstapriv->sta_aid[psta->aid - 1] = NULL;
psta->aid = 0;
}
#endif // CONFIG_NATIVEAP_MLME
#ifdef CONFIG_TX_MCAST2UNI
psta->under_exist_checking = 0;
#endif // CONFIG_TX_MCAST2UNI
#endif // CONFIG_AP_MODE
_rtw_spinlock_free(&psta->lock);
//_enter_critical_bh(&(pfree_sta_queue->lock), &irqL0);
rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue));
//_exit_critical_bh(&(pfree_sta_queue->lock), &irqL0);
exit:
_func_exit_;
return _SUCCESS;
}
// free all stainfo which in sta_hash[all]
void rtw_free_all_stainfo(_adapter *padapter)
{
_irqL irqL;
_list *plist, *phead;
s32 index;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info* pbcmc_stainfo =rtw_get_bcmc_stainfo( padapter);
_func_enter_;
if(pstapriv->asoc_sta_count==1)
goto exit;
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
for(index=0; index< NUM_STA; index++)
{
phead = &(pstapriv->sta_hash[index]);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list);
plist = get_next(plist);
if(pbcmc_stainfo!=psta)
rtw_free_stainfo(padapter , psta);
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
exit:
_func_exit_;
}
/* any station allocated can be searched by hash list */
struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
_irqL irqL;
_list *plist, *phead;
struct sta_info *psta = NULL;
u32 index;
u8 *addr;
u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
_func_enter_;
if(hwaddr==NULL)
return NULL;
if(IS_MCAST(hwaddr))
{
addr = bc_addr;
}
else
{
addr = hwaddr;
}
index = wifi_mac_hash(addr);
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
phead = &(pstapriv->sta_hash[index]);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
if ((_rtw_memcmp(psta->hwaddr, addr, ETH_ALEN))== _TRUE)
{ // if found the matched address
break;
}
psta=NULL;
plist = get_next(plist);
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
_func_exit_;
return psta;
}
u32 rtw_init_bcmc_stainfo(_adapter* padapter)
{
struct sta_info *psta;
struct tx_servq *ptxservq;
u32 res=_SUCCESS;
NDIS_802_11_MAC_ADDRESS bcast_addr= {0xff,0xff,0xff,0xff,0xff,0xff};
struct sta_priv *pstapriv = &padapter->stapriv;
//_queue *pstapending = &padapter->xmitpriv.bm_pending;
_func_enter_;
psta = rtw_alloc_stainfo(pstapriv, bcast_addr);
if(psta==NULL){
res=_FAIL;
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("rtw_alloc_stainfo fail"));
goto exit;
}
// default broadcast & multicast use macid 1
psta->mac_id = 1;
ptxservq= &(psta->sta_xmitpriv.be_q);
/*
_enter_critical(&pstapending->lock, &irqL0);
if (rtw_is_list_empty(&ptxservq->tx_pending))
rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(pstapending));
_exit_critical(&pstapending->lock, &irqL0);
*/
exit:
_func_exit_;
return _SUCCESS;
}
struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter)
{
struct sta_info *psta;
struct sta_priv *pstapriv = &padapter->stapriv;
u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
_func_enter_;
psta = rtw_get_stainfo(pstapriv, bc_addr);
_func_exit_;
return psta;
}
u8 rtw_access_ctrl(_adapter *padapter, u8 *mac_addr)
{
u8 res = _TRUE;
#ifdef CONFIG_AP_MODE
_irqL irqL;
_list *plist, *phead;
struct rtw_wlan_acl_node *paclnode;
u8 match = _FALSE;
struct sta_priv *pstapriv = &padapter->stapriv;
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
_queue *pacl_node_q =&pacl_list->acl_node_q;
_enter_critical_bh(&(pacl_node_q->lock), &irqL);
phead = get_list_head(pacl_node_q);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list);
plist = get_next(plist);
if(_rtw_memcmp(paclnode->addr, mac_addr, ETH_ALEN))
{
if(paclnode->valid == _TRUE)
{
match = _TRUE;
break;
}
}
}
_exit_critical_bh(&(pacl_node_q->lock), &irqL);
if(pacl_list->mode == 1)//accept unless in deny list
{
res = (match == _TRUE) ? _FALSE:_TRUE;
}
else if(pacl_list->mode == 2)//deny unless in accept list
{
res = (match == _TRUE) ? _TRUE:_FALSE;
}
else
{
res = _TRUE;
}
#endif
return res;
}

2940
drivers/net/wireless/realtek/rtl8192cu/core/rtw_tdls.c Normal file
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2304
drivers/net/wireless/realtek/rtl8192cu/core/rtw_wlan_util.c Normal file
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File diff suppressed because it is too large Load Diff

4155
drivers/net/wireless/realtek/rtl8192cu/core/rtw_xmit.c Normal file
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File diff suppressed because it is too large Load Diff

175
drivers/net/wireless/realtek/rtl8192cu/hal/HalPwrSeqCmd.c Normal file
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@@ -0,0 +1,175 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
Module Name:
HalPwrSeqCmd.c
Abstract:
Implement HW Power sequence configuration CMD handling routine for Realtek devices.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-10-26 Lucas Modify to be compatible with SD4-CE driver.
2011-07-07 Roger Create.
--*/
#include <HalPwrSeqCmd.h>
#include <sdio_ops.h>
//
// Description:
// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
//
// Assumption:
// We should follow specific format which was released from HW SD.
//
// 2011.07.07, added by Roger.
//
u8 HalPwrSeqCmdParsing(
PADAPTER padapter,
u8 CutVersion,
u8 FabVersion,
u8 InterfaceType,
WLAN_PWR_CFG PwrSeqCmd[])
{
WLAN_PWR_CFG PwrCfgCmd = {0};
u8 bPollingBit = _FALSE;
u32 AryIdx = 0;
u8 value = 0;
u32 offset = 0;
u32 pollingCount = 0; // polling autoload done.
u32 maxPollingCnt = 5000;
do {
PwrCfgCmd = PwrSeqCmd[AryIdx];
RT_TRACE(_module_hal_init_c_ , _drv_info_,
("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
GET_PWR_CFG_OFFSET(PwrCfgCmd),
GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
GET_PWR_CFG_FAB_MASK(PwrCfgCmd),
GET_PWR_CFG_INTF_MASK(PwrCfgCmd),
GET_PWR_CFG_BASE(PwrCfgCmd),
GET_PWR_CFG_CMD(PwrCfgCmd),
GET_PWR_CFG_MASK(PwrCfgCmd),
GET_PWR_CFG_VALUE(PwrCfgCmd)));
//2 Only Handle the command whose FAB, CUT, and Interface are matched
if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType))
{
switch (GET_PWR_CFG_CMD(PwrCfgCmd))
{
case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
break;
case PWR_CMD_WRITE:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_SDIO_HCI
//
// <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface
// 2011.07.07.
//
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
{
// Read Back SDIO Local value
value = SdioLocalCmd52Read1Byte(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
// Write Back SDIO Local value
SdioLocalCmd52Write1Byte(padapter, offset, value);
}
else
#endif
{
// Read the value from system register
value = rtw_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
// Write the value back to sytem register
rtw_write8(padapter, offset, value);
}
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
bPollingBit = _FALSE;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
do {
#ifdef CONFIG_SDIO_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
value = SdioLocalCmd52Read1Byte(padapter, offset);
else
#endif
value = rtw_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(PwrCfgCmd);
if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
bPollingBit = _TRUE;
else
rtw_udelay_os(10);
if (pollingCount++ > maxPollingCnt) {
RT_TRACE(_module_hal_init_c_ , _drv_err_, ("Fail to polling Offset[%#x]\n", offset));
return _FALSE;
}
} while (!bPollingBit);
break;
case PWR_CMD_DELAY:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
else
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000);
break;
case PWR_CMD_END:
// When this command is parsed, end the process
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
return _TRUE;
break;
default:
RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
break;
}
}
AryIdx++;//Add Array Index
}while(1);
return _TRUE;
}

313
drivers/net/wireless/realtek/rtl8192cu/hal/dm.c Normal file
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@@ -0,0 +1,313 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef CONFIG_RTL8192C
#include <rtl8192c_hal.h>
#endif
#ifdef CONFIG_RTL8192D
#include <rtl8192d_hal.h>
#endif
bool rtw_adapter_linked(_adapter *adapter)
{
bool linked = _FALSE;
struct mlme_priv *mlmepriv = &adapter->mlmepriv;
if( (check_fwstate(mlmepriv, WIFI_AP_STATE) == _TRUE) ||
(check_fwstate(mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE))
{
if(adapter->stapriv.asoc_sta_count > 2)
linked = _TRUE;
}
else{//Station mode
if(check_fwstate(mlmepriv, _FW_LINKED)== _TRUE)
linked = _TRUE;
}
return linked;
}
bool dm_linked(_adapter *adapter)
{
bool linked;
if ((linked = rtw_adapter_linked(adapter)))
goto exit;
#ifdef CONFIG_CONCURRENT_MODE
if ((adapter = adapter->pbuddy_adapter) == NULL)
goto exit;
linked = rtw_adapter_linked(adapter);
#endif
exit:
return linked;
}
#if 0
void dm_enable_EDCCA(_adapter *adapter)
{
// Enable EDCCA. The value is suggested by SD3 Wilson.
//
// Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13.
//
/*if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter)))
{
rtw_write8(adapter,rOFDM0_ECCAThreshold,0x00);
rtw_write8(adapter,rOFDM0_ECCAThreshold+2,0xFD);
}
else*/
{
rtw_write8(adapter,rOFDM0_ECCAThreshold,0x03);
rtw_write8(adapter,rOFDM0_ECCAThreshold+2,0x00);
}
}
void dm_disable_EDCCA(_adapter *adapter)
{
// Disable EDCCA..
rtw_write8(adapter, rOFDM0_ECCAThreshold, 0x7f);
rtw_write8(adapter, rOFDM0_ECCAThreshold+2, 0x7f);
}
//
// Description: According to initial gain value to determine to enable or disable EDCCA.
//
// Suggested by SD3 Wilson. Added by tynli. 2011.11.25.
//
void dm_dynamic_EDCCA(_adapter *pAdapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
struct dm_priv *dmpriv = &pHalData->dmpriv;
u8 RegC50, RegC58;
RegC50 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);
RegC58 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);
if((RegC50 > 0x28 && RegC58 > 0x28)
/*|| ((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26))
|| (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28)*/
)
{
if(!dmpriv->bPreEdccaEnable)
{
dm_enable_EDCCA(pAdapter);
dmpriv->bPreEdccaEnable = _TRUE;
}
}
else if((RegC50 < 0x25 && RegC58 < 0x25)
/*|| (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25)*/
)
{
if(dmpriv->bPreEdccaEnable)
{
dm_disable_EDCCA(pAdapter);
dmpriv->bPreEdccaEnable = _FALSE;
}
}
}
#endif
#define DM_ADAPTIVITY_VER "ADAPTIVITY_V001"
int dm_adaptivity_get_parm_str(_adapter *pAdapter, char *buf, int len)
{
#ifdef CONFIG_DM_ADAPTIVITY
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
struct dm_priv *dmpriv = &pHalData->dmpriv;
return snprintf(buf, len, DM_ADAPTIVITY_VER"\n"
"TH_L2H_ini\tTH_EDCCA_HL_diff\tIGI_Base\tForceEDCCA\tAdapEn_RSSI\tIGI_LowerBound\n"
"0x%02x\t%d\t0x%02x\t%d\t%u\t%u\n",
(u8)dmpriv->TH_L2H_ini,
dmpriv->TH_EDCCA_HL_diff,
dmpriv->IGI_Base,
dmpriv->ForceEDCCA,
dmpriv->AdapEn_RSSI,
dmpriv->IGI_LowerBound
);
#endif /* CONFIG_DM_ADAPTIVITY */
return 0;
}
void dm_adaptivity_set_parm(_adapter *pAdapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff,
s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound)
{
#ifdef CONFIG_DM_ADAPTIVITY
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
struct dm_priv *dmpriv = &pHalData->dmpriv;
dmpriv->TH_L2H_ini = TH_L2H_ini;
dmpriv->TH_EDCCA_HL_diff = TH_EDCCA_HL_diff;
dmpriv->IGI_Base = IGI_Base;
dmpriv->ForceEDCCA = ForceEDCCA;
dmpriv->AdapEn_RSSI = AdapEn_RSSI;
dmpriv->IGI_LowerBound = IGI_LowerBound;
#endif /* CONFIG_DM_ADAPTIVITY */
}
void dm_adaptivity_init(_adapter *pAdapter)
{
#ifdef CONFIG_DM_ADAPTIVITY
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
struct dm_priv *dmpriv = &pHalData->dmpriv;
/*
if(pDM_Odm->SupportICType == ODM_RTL8723B)
{
pDM_Odm->TH_L2H_ini = 0xf8; // -8
}
if((pDM_Odm->SupportICType == ODM_RTL8192E)&&(pDM_Odm->SupportInterface == ODM_ITRF_PCIE))
{
pDM_Odm->TH_L2H_ini = 0xf0; // -16
}
else */
{
dmpriv->TH_L2H_ini = 0xf9; // -7
}
dmpriv->TH_EDCCA_HL_diff = 7;
dmpriv->IGI_Base = 0x32;
dmpriv->IGI_target = 0x1c;
dmpriv->ForceEDCCA = 0;
dmpriv->AdapEn_RSSI = 20;
dmpriv->IGI_LowerBound = 0;
//Reg524[11]=0 is easily to transmit packets during adaptivity test
PHY_SetBBReg(pAdapter, 0x524, BIT11, 1); // stop counting if EDCCA is asserted
#endif /* CONFIG_DM_ADAPTIVITY */
}
void dm_adaptivity(_adapter *pAdapter)
{
#ifdef CONFIG_DM_ADAPTIVITY
s8 TH_L2H_dmc, TH_H2L_dmc;
s8 TH_L2H, TH_H2L, Diff, IGI_target;
u32 value32;
BOOLEAN EDCCA_State;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
struct dm_priv *dmpriv = &pHalData->dmpriv;
DIG_T *pDigTable = &dmpriv->DM_DigTable;
u8 IGI = pDigTable->CurIGValue;
u8 RSSI_Min = pDigTable->Rssi_val_min;
HT_CHANNEL_WIDTH BandWidth = pHalData->CurrentChannelBW;
if (!(dmpriv->DMFlag & DYNAMIC_FUNC_ADAPTIVITY))
{
LOG_LEVEL(_drv_info_, "Go to odm_DynamicEDCCA() \n");
// Add by Neil Chen to enable edcca to MP Platform
// Adjust EDCCA.
/*if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
dm_dynamic_EDCCA(pAdapter);
*/
return;
}
LOG_LEVEL(_drv_info_, "odm_Adaptivity() =====> \n");
LOG_LEVEL(_drv_info_, "ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n",
dmpriv->ForceEDCCA, dmpriv->IGI_Base, dmpriv->TH_L2H_ini, dmpriv->TH_EDCCA_HL_diff, dmpriv->AdapEn_RSSI);
/*if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
PHY_SetBBReg(0x800, BIT10, 0); //ADC_mask enable
*/
if(!dm_linked(pAdapter) || pHalData->CurrentChannel > 149) /* Band4 doesn't need adaptivity */
{
/*if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)*/
{
PHY_SetBBReg(pAdapter,rOFDM0_ECCAThreshold, bMaskByte0, 0x7f);
PHY_SetBBReg(pAdapter,rOFDM0_ECCAThreshold, bMaskByte2, 0x7f);
}
/*else
{
ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, (0x7f<<8) | 0x7f);
}*/
return;
}
if(!dmpriv->ForceEDCCA)
{
if(RSSI_Min > dmpriv->AdapEn_RSSI)
EDCCA_State = 1;
else if(RSSI_Min < (dmpriv->AdapEn_RSSI - 5))
EDCCA_State = 0;
}
else
EDCCA_State = 1;
//if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (*pDM_Odm->pBandType == BAND_ON_5G))
//IGI_target = pDM_Odm->IGI_Base;
//else
{
if(BandWidth == HT_CHANNEL_WIDTH_20) //CHANNEL_WIDTH_20
IGI_target = dmpriv->IGI_Base;
else if(BandWidth == HT_CHANNEL_WIDTH_40)
IGI_target = dmpriv->IGI_Base + 2;
/*else if(*pDM_Odm->pBandWidth == ODM_BW80M)
IGI_target = pDM_Odm->IGI_Base + 6;*/
else
IGI_target = dmpriv->IGI_Base;
}
dmpriv->IGI_target = (u8)IGI_target;
LOG_LEVEL(_drv_info_, "BandWidth=%s, IGI_target=0x%x, EDCCA_State=%d\n",
(BandWidth==HT_CHANNEL_WIDTH_40)?"40M":"20M", IGI_target, EDCCA_State);
if(EDCCA_State == 1)
{
Diff = IGI_target -(s8)IGI;
TH_L2H_dmc = dmpriv->TH_L2H_ini + Diff;
if(TH_L2H_dmc > 10) TH_L2H_dmc = 10;
TH_H2L_dmc = TH_L2H_dmc - dmpriv->TH_EDCCA_HL_diff;
}
else
{
TH_L2H_dmc = 0x7f;
TH_H2L_dmc = 0x7f;
}
LOG_LEVEL(_drv_info_, "IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n",
IGI, TH_L2H_dmc, TH_H2L_dmc);
/*if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)*/
{
PHY_SetBBReg(pAdapter,rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
PHY_SetBBReg(pAdapter,rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
}
/*else
PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u8)TH_H2L_dmc<<8) | (u8)TH_L2H_dmc);*/
skip_dm:
return;
#endif /* CONFIG_DM_ADAPTIVITY */
}

30
drivers/net/wireless/realtek/rtl8192cu/hal/dm.h Normal file
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@@ -0,0 +1,30 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DM_H__
#define __DM_H__
int dm_adaptivity_get_parm_str(_adapter *pAdapter, char *buf, int len);
void dm_adaptivity_set_parm(_adapter *pAdapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff,
s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound);
void dm_adaptivity_init(_adapter *pAdapter);
void dm_adaptivity(_adapter *pAdapter);
#endif /* __DM_H__ */

370
drivers/net/wireless/realtek/rtl8192cu/hal/hal_com.c Normal file
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@@ -0,0 +1,370 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_byteorder.h>
#include <hal_intf.h>
#include <hal_com.h>
#ifdef CONFIG_RTL8192C
#include <rtl8192c_hal.h>
#endif
#ifdef CONFIG_RTL8192D
#include <rtl8192d_hal.h>
#endif
#define _HAL_COM_C_
//============================================================
// Global var
//============================================================
u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
0x7f8001fe, // 0, +6.0dB
0x788001e2, // 1, +5.5dB
0x71c001c7, // 2, +5.0dB
0x6b8001ae, // 3, +4.5dB
0x65400195, // 4, +4.0dB
0x5fc0017f, // 5, +3.5dB
0x5a400169, // 6, +3.0dB
0x55400155, // 7, +2.5dB
0x50800142, // 8, +2.0dB
0x4c000130, // 9, +1.5dB
0x47c0011f, // 10, +1.0dB
0x43c0010f, // 11, +0.5dB
0x40000100, // 12, +0dB
0x3c8000f2, // 13, -0.5dB
0x390000e4, // 14, -1.0dB
0x35c000d7, // 15, -1.5dB
0x32c000cb, // 16, -2.0dB
0x300000c0, // 17, -2.5dB
0x2d4000b5, // 18, -3.0dB
0x2ac000ab, // 19, -3.5dB
0x288000a2, // 20, -4.0dB
0x26000098, // 21, -4.5dB
0x24000090, // 22, -5.0dB
0x22000088, // 23, -5.5dB
0x20000080, // 24, -6.0dB
0x1e400079, // 25, -6.5dB
0x1c800072, // 26, -7.0dB
0x1b00006c, // 27. -7.5dB
0x19800066, // 28, -8.0dB
0x18000060, // 29, -8.5dB
0x16c0005b, // 30, -9.0dB
0x15800056, // 31, -9.5dB
0x14400051, // 32, -10.0dB
0x1300004c, // 33, -10.5dB
0x12000048, // 34, -11.0dB
0x11000044, // 35, -11.5dB
0x10000040, // 36, -12.0dB
0x0f00003c,// 37, -12.5dB
0x0e400039,// 38, -13.0dB
0x0d800036,// 39, -13.5dB
0x0cc00033,// 40, -14.0dB
0x0c000030,// 41, -14.5dB
0x0b40002d,// 42, -15.0dB
};
u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB
};
u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB
};
#ifdef CONFIG_CHIP_VER_INTEGRATION
void dump_chip_info(HAL_VERSION ChipVersion)
{
if(IS_81XXC(ChipVersion)){
DBG_871X("Chip Version Info: %s_",IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");
}
else if(IS_92D(ChipVersion)){
DBG_871X("Chip Version Info: CHIP_8192D_");
}
else if(IS_8723_SERIES(ChipVersion)){
DBG_871X("Chip Version Info: CHIP_8723A_");
}
else if(IS_8188E(ChipVersion)){
DBG_871X("Chip Version Info: CHIP_8188E_");
}
DBG_871X("%s_",IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip");
DBG_871X("%s_",IS_CHIP_VENDOR_TSMC(ChipVersion)?"TSMC":"UMC");
if(IS_A_CUT(ChipVersion)) DBG_871X("A_CUT_");
else if(IS_B_CUT(ChipVersion)) DBG_871X("B_CUT_");
else if(IS_C_CUT(ChipVersion)) DBG_871X("C_CUT_");
else if(IS_D_CUT(ChipVersion)) DBG_871X("D_CUT_");
else if(IS_E_CUT(ChipVersion)) DBG_871X("E_CUT_");
else DBG_871X("UNKNOWN_CUT(%d)_",ChipVersion.CUTVersion);
if(IS_1T1R(ChipVersion)) DBG_871X("1T1R_");
else if(IS_1T2R(ChipVersion)) DBG_871X("1T2R_");
else if(IS_2T2R(ChipVersion)) DBG_871X("2T2R_");
else DBG_871X("UNKNOWN_RFTYPE(%d)_",ChipVersion.RFType);
DBG_871X("RomVer(%d)\n",ChipVersion.ROMVer);
}
#endif
#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
u8 //return the final channel plan decision
hal_com_get_channel_plan(
IN PADAPTER padapter,
IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom)
IN u8 sw_channel_plan, //channel plan from SW (registry/module param)
IN u8 def_channel_plan, //channel plan used when the former two is invalid
IN BOOLEAN AutoLoadFail
)
{
u8 swConfig;
u8 chnlPlan;
swConfig = _TRUE;
if (!AutoLoadFail)
{
if (!rtw_is_channel_plan_valid(sw_channel_plan))
swConfig = _FALSE;
if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
swConfig = _FALSE;
}
if (swConfig == _TRUE)
chnlPlan = sw_channel_plan;
else
chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
if (!rtw_is_channel_plan_valid(chnlPlan))
chnlPlan = def_channel_plan;
return chnlPlan;
}
u8 MRateToHwRate(u8 rate)
{
u8 ret = DESC_RATE1M;
switch(rate)
{
// CCK and OFDM non-HT rates
case IEEE80211_CCK_RATE_1MB: ret = DESC_RATE1M; break;
case IEEE80211_CCK_RATE_2MB: ret = DESC_RATE2M; break;
case IEEE80211_CCK_RATE_5MB: ret = DESC_RATE5_5M; break;
case IEEE80211_CCK_RATE_11MB: ret = DESC_RATE11M; break;
case IEEE80211_OFDM_RATE_6MB: ret = DESC_RATE6M; break;
case IEEE80211_OFDM_RATE_9MB: ret = DESC_RATE9M; break;
case IEEE80211_OFDM_RATE_12MB: ret = DESC_RATE12M; break;
case IEEE80211_OFDM_RATE_18MB: ret = DESC_RATE18M; break;
case IEEE80211_OFDM_RATE_24MB: ret = DESC_RATE24M; break;
case IEEE80211_OFDM_RATE_36MB: ret = DESC_RATE36M; break;
case IEEE80211_OFDM_RATE_48MB: ret = DESC_RATE48M; break;
case IEEE80211_OFDM_RATE_54MB: ret = DESC_RATE54M; break;
// HT rates since here
//case MGN_MCS0: ret = DESC_RATEMCS0; break;
//case MGN_MCS1: ret = DESC_RATEMCS1; break;
//case MGN_MCS2: ret = DESC_RATEMCS2; break;
//case MGN_MCS3: ret = DESC_RATEMCS3; break;
//case MGN_MCS4: ret = DESC_RATEMCS4; break;
//case MGN_MCS5: ret = DESC_RATEMCS5; break;
//case MGN_MCS6: ret = DESC_RATEMCS6; break;
//case MGN_MCS7: ret = DESC_RATEMCS7; break;
default: break;
}
return ret;
}
void HalSetBrateCfg(
IN PADAPTER Adapter,
IN u8 *mBratesOS,
OUT u16 *pBrateCfg)
{
u8 i, is_brate, brate;
for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
{
is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
brate = mBratesOS[i] & 0x7f;
if( is_brate )
{
switch(brate)
{
case IEEE80211_CCK_RATE_1MB: *pBrateCfg |= RATE_1M; break;
case IEEE80211_CCK_RATE_2MB: *pBrateCfg |= RATE_2M; break;
case IEEE80211_CCK_RATE_5MB: *pBrateCfg |= RATE_5_5M;break;
case IEEE80211_CCK_RATE_11MB: *pBrateCfg |= RATE_11M; break;
case IEEE80211_OFDM_RATE_6MB: *pBrateCfg |= RATE_6M; break;
case IEEE80211_OFDM_RATE_9MB: *pBrateCfg |= RATE_9M; break;
case IEEE80211_OFDM_RATE_12MB: *pBrateCfg |= RATE_12M; break;
case IEEE80211_OFDM_RATE_18MB: *pBrateCfg |= RATE_18M; break;
case IEEE80211_OFDM_RATE_24MB: *pBrateCfg |= RATE_24M; break;
case IEEE80211_OFDM_RATE_36MB: *pBrateCfg |= RATE_36M; break;
case IEEE80211_OFDM_RATE_48MB: *pBrateCfg |= RATE_48M; break;
case IEEE80211_OFDM_RATE_54MB: *pBrateCfg |= RATE_54M; break;
}
}
}
}
void hal_init_macaddr(_adapter *adapter)
{
rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
#ifdef CONFIG_CONCURRENT_MODE
if (adapter->pbuddy_adapter)
rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter->pbuddy_adapter->eeprompriv.mac_addr);
#endif
}
/*
* C2H event format:
* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
*/
void c2h_evt_clear(_adapter *adapter)
{
rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
}
s32 c2h_evt_read(_adapter *adapter, u8 *buf)
{
s32 ret = _FAIL;
struct c2h_evt_hdr *c2h_evt;
int i;
u8 trigger;
if (buf == NULL)
goto exit;
trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
if (trigger == C2H_EVT_HOST_CLOSE) {
goto exit; /* Not ready */
} else if (trigger != C2H_EVT_FW_CLOSE) {
goto clear_evt; /* Not a valid value */
}
c2h_evt = (struct c2h_evt_hdr *)buf;
_rtw_memset(c2h_evt, 0, 16);
*buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
*(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
&c2h_evt , sizeof(c2h_evt));
if (0) {
DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__
, c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger);
}
/* Read the content */
for (i = 0; i < c2h_evt->plen; i++)
c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + sizeof(*c2h_evt) + i);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n",
c2h_evt->payload, c2h_evt->plen);
ret = _SUCCESS;
clear_evt:
/*
* Clear event to notify FW we have read the command.
* If this field isn't clear, the FW won't update the next command message.
*/
c2h_evt_clear(adapter);
exit:
return ret;
}

545
drivers/net/wireless/realtek/rtl8192cu/hal/hal_intf.c Normal file
View File

@@ -0,0 +1,545 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _HAL_INTF_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_byteorder.h>
#include <hal_intf.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_hal.h>
#elif defined(CONFIG_USB_HCI)
#include <usb_hal.h>
#elif defined(CONFIG_GSPI_HCI)
#include <gspi_hal.h>
#endif
void rtw_hal_chip_configure(_adapter *padapter)
{
if(padapter->HalFunc.intf_chip_configure)
padapter->HalFunc.intf_chip_configure(padapter);
}
void rtw_hal_read_chip_info(_adapter *padapter)
{
if(padapter->HalFunc.read_adapter_info)
padapter->HalFunc.read_adapter_info(padapter);
}
void rtw_hal_read_chip_version(_adapter *padapter)
{
if(padapter->HalFunc.read_chip_version)
padapter->HalFunc.read_chip_version(padapter);
}
void rtw_hal_def_value_init(_adapter *padapter)
{
if(padapter->HalFunc.init_default_value)
padapter->HalFunc.init_default_value(padapter);
}
void rtw_hal_free_data(_adapter *padapter)
{
if(padapter->HalFunc.free_hal_data)
padapter->HalFunc.free_hal_data(padapter);
}
void rtw_hal_dm_init(_adapter *padapter)
{
if(padapter->HalFunc.dm_init)
padapter->HalFunc.dm_init(padapter);
}
void rtw_hal_dm_deinit(_adapter *padapter)
{
// cancel dm timer
if(padapter->HalFunc.dm_deinit)
padapter->HalFunc.dm_deinit(padapter);
}
void rtw_hal_sw_led_init(_adapter *padapter)
{
if(padapter->HalFunc.InitSwLeds)
padapter->HalFunc.InitSwLeds(padapter);
}
void rtw_hal_sw_led_deinit(_adapter *padapter)
{
if(padapter->HalFunc.DeInitSwLeds)
padapter->HalFunc.DeInitSwLeds(padapter);
}
uint rtw_hal_init(_adapter *padapter)
{
uint status = _SUCCESS;
if(padapter->hw_init_completed == _TRUE)
{
DBG_871X("rtw_hal_init: hw_init_completed == _TRUE\n");
goto success;
}
#ifdef CONFIG_DEINIT_BEFORE_INIT
status = padapter->HalFunc.hal_deinit(padapter);
if(status != _SUCCESS){
DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!\n");
goto fail;
}
#endif
#ifdef CONFIG_DUALMAC_CONCURRENT
// before init mac0, driver must init mac1 first to avoid usb rx error.
if((padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE)
&& (padapter->adapter_type == PRIMARY_ADAPTER))
{
if(padapter->pbuddy_adapter->hw_init_completed == _TRUE)
{
DBG_871X("rtw_hal_init: pbuddy_adapter hw_init_completed == _TRUE\n");
}
else
{
#ifdef CONFIG_DEINIT_BEFORE_INIT
status = padapter->HalFunc.hal_deinit(padapter->pbuddy_adapter);
if(status != _SUCCESS){
DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!(pbuddy_adapter)\n");
goto fail;
}
#endif
status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter);
if(status == _SUCCESS){
padapter->pbuddy_adapter->hw_init_completed = _TRUE;
}
else{
padapter->pbuddy_adapter->hw_init_completed = _FALSE;
RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail(pbuddy_adapter)\n"));
goto fail;
}
}
}
#else
if(adapter_to_dvobj(padapter)->DualMacMode == _TRUE)
{
if(padapter->pbuddy_adapter != NULL) {
if(padapter->pbuddy_adapter->hw_init_completed == _FALSE)
{
#ifdef CONFIG_DEINIT_BEFORE_INIT
status = padapter->HalFunc.hal_deinit(padapter->pbuddy_adapter);
if(status != _SUCCESS){
DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!(pbuddy_adapter)\n");
goto fail;
}
#endif
status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter);
if(status == _SUCCESS){
padapter->pbuddy_adapter->hw_init_completed = _TRUE;
}
else{
padapter->pbuddy_adapter->hw_init_completed = _FALSE;
RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail for another interface\n"));
}
}
}
}
#endif
padapter->hw_init_completed=_FALSE;
status = padapter->HalFunc.hal_init(padapter);
if(status == _SUCCESS){
padapter->hw_init_completed = _TRUE;
}
else{
padapter->hw_init_completed = _FALSE;
RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail\n"));
goto fail;
}
success:
if (padapter->registrypriv.notch_filter == 1)
rtw_hal_notch_filter(padapter, 1);
rtw_hal_reset_security_engine(padapter);
rtw_sec_restore_wep_key(padapter);
init_hw_mlme_ext(padapter);
fail:
RT_TRACE(_module_hal_init_c_,_drv_err_,("-rtl871x_hal_init:status=0x%x\n",status));
return status;
}
uint rtw_hal_deinit(_adapter *padapter)
{
uint status = _SUCCESS;
_func_enter_;
status = padapter->HalFunc.hal_deinit(padapter);
if(status == _SUCCESS){
padapter->hw_init_completed = _FALSE;
}
else
{
RT_TRACE(_module_hal_init_c_,_drv_err_,("\n rtw_hal_deinit: hal_init fail\n"));
}
_func_exit_;
return status;
}
void rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val)
{
if (padapter->HalFunc.SetHwRegHandler)
padapter->HalFunc.SetHwRegHandler(padapter, variable, val);
}
void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val)
{
if (padapter->HalFunc.GetHwRegHandler)
padapter->HalFunc.GetHwRegHandler(padapter, variable, val);
}
u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
{
if(padapter->HalFunc.SetHalDefVarHandler)
return padapter->HalFunc.SetHalDefVarHandler(padapter,eVariable,pValue);
return _FAIL;
}
u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
{
if(padapter->HalFunc.GetHalDefVarHandler)
return padapter->HalFunc.GetHalDefVarHandler(padapter,eVariable,pValue);
return _FAIL;
}
void rtw_hal_enable_interrupt(_adapter *padapter)
{
if (padapter->HalFunc.enable_interrupt)
padapter->HalFunc.enable_interrupt(padapter);
else
DBG_871X("%s: HalFunc.enable_interrupt is NULL!\n", __FUNCTION__);
}
void rtw_hal_disable_interrupt(_adapter *padapter)
{
if (padapter->HalFunc.disable_interrupt)
padapter->HalFunc.disable_interrupt(padapter);
else
DBG_871X("%s: HalFunc.disable_interrupt is NULL!\n", __FUNCTION__);
}
u32 rtw_hal_inirp_init(_adapter *padapter)
{
u32 rst = _FAIL;
if(padapter->HalFunc.inirp_init)
rst = padapter->HalFunc.inirp_init(padapter);
else
DBG_871X(" %s HalFunc.inirp_init is NULL!!!\n",__FUNCTION__);
return rst;
}
u32 rtw_hal_inirp_deinit(_adapter *padapter)
{
if(padapter->HalFunc.inirp_deinit)
return padapter->HalFunc.inirp_deinit(padapter);
return _FAIL;
}
u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val)
{
if(padapter->HalFunc.interface_ps_func)
return padapter->HalFunc.interface_ps_func(padapter,efunc_id,val);
return _FAIL;
}
s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe)
{
if(padapter->HalFunc.hal_xmitframe_enqueue)
return padapter->HalFunc.hal_xmitframe_enqueue(padapter, pxmitframe);
return _FALSE;
}
s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
{
if(padapter->HalFunc.hal_xmit)
return padapter->HalFunc.hal_xmit(padapter, pxmitframe);
return _FALSE;
}
s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
{
s32 ret = _FAIL;
unsigned char *pframe;
struct rtw_ieee80211_hdr *pwlanhdr;
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
_rtw_memcpy(pmgntframe->attrib.ra, pwlanhdr->addr1, ETH_ALEN);
#ifdef CONFIG_IEEE80211W
if(padapter->securitypriv.binstallBIPkey == _TRUE)
{
if(IS_MCAST(pmgntframe->attrib.ra))
{
pmgntframe->attrib.encrypt = _BIP_;
//pmgntframe->attrib.bswenc = _TRUE;
}
else
{
pmgntframe->attrib.encrypt = _AES_;
pmgntframe->attrib.bswenc = _TRUE;
}
rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe);
}
#endif //CONFIG_IEEE80211W
if(padapter->HalFunc.mgnt_xmit)
ret = padapter->HalFunc.mgnt_xmit(padapter, pmgntframe);
return ret;
}
s32 rtw_hal_init_xmit_priv(_adapter *padapter)
{
if(padapter->HalFunc.init_xmit_priv != NULL)
return padapter->HalFunc.init_xmit_priv(padapter);
return _FAIL;
}
void rtw_hal_free_xmit_priv(_adapter *padapter)
{
if(padapter->HalFunc.free_xmit_priv != NULL)
padapter->HalFunc.free_xmit_priv(padapter);
}
s32 rtw_hal_init_recv_priv(_adapter *padapter)
{
if(padapter->HalFunc.init_recv_priv)
return padapter->HalFunc.init_recv_priv(padapter);
return _FAIL;
}
void rtw_hal_free_recv_priv(_adapter *padapter)
{
if(padapter->HalFunc.free_recv_priv)
padapter->HalFunc.free_recv_priv(padapter);
}
void rtw_hal_update_ra_mask(_adapter *padapter, u32 mac_id)
{
if(padapter->HalFunc.UpdateRAMaskHandler)
padapter->HalFunc.UpdateRAMaskHandler(padapter,mac_id);
}
void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8 arg)
{
if(padapter->HalFunc.Add_RateATid)
padapter->HalFunc.Add_RateATid(padapter, bitmap, arg);
}
u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask)
{
u32 data = 0;
if (padapter->HalFunc.read_bbreg)
data = padapter->HalFunc.read_bbreg(padapter, RegAddr, BitMask);
return data;
}
void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
{
if (padapter->HalFunc.write_bbreg)
padapter->HalFunc.write_bbreg(padapter, RegAddr, BitMask, Data);
}
u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask)
{
u32 data = 0;
if (padapter->HalFunc.read_rfreg)
data = padapter->HalFunc.read_rfreg(padapter, eRFPath, RegAddr, BitMask);
return data;
}
void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
{
if (padapter->HalFunc.write_rfreg)
padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
}
s32 rtw_hal_interrupt_handler(_adapter *padapter)
{
if(padapter->HalFunc.interrupt_handler)
return padapter->HalFunc.interrupt_handler(padapter);
return _FAIL;
}
void rtw_hal_set_bwmode(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset)
{
if(padapter->HalFunc.set_bwmode_handler)
padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset);
}
void rtw_hal_set_chan(_adapter *padapter, u8 channel)
{
if(padapter->HalFunc.set_channel_handler)
padapter->HalFunc.set_channel_handler(padapter, channel);
}
void rtw_hal_dm_watchdog(_adapter *padapter)
{
if(padapter->HalFunc.hal_dm_watchdog)
padapter->HalFunc.hal_dm_watchdog(padapter);
}
void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
{
if(padapter->HalFunc.SetBeaconRelatedRegistersHandler)
padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter);
}
#ifdef CONFIG_ANTENNA_DIVERSITY
u8 rtw_hal_antdiv_before_linked(_adapter *padapter)
{
if (padapter->HalFunc.AntDivBeforeLinkHandler)
return padapter->HalFunc.AntDivBeforeLinkHandler(padapter);
return _FALSE;
}
void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
{
if (padapter->HalFunc.AntDivCompareHandler)
padapter->HalFunc.AntDivCompareHandler(padapter, dst, src);
}
#endif
#ifdef CONFIG_HOSTAPD_MLME
s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
{
if (padapter->HalFunc.hostap_mgnt_xmit_entry)
return padapter->HalFunc.hostap_mgnt_xmit_entry(padapter, pkt);
return _FAIL;
}
#endif //CONFIG_HOSTAPD_MLME
#ifdef DBG_CONFIG_ERROR_DETECT
void rtw_hal_sreset_init(_adapter *padapter)
{
if(padapter->HalFunc.sreset_init_value)
padapter->HalFunc.sreset_init_value(padapter);
}
void rtw_hal_sreset_reset(_adapter *padapter)
{
padapter = GET_PRIMARY_ADAPTER(padapter);
if(padapter->HalFunc.silentreset)
padapter->HalFunc.silentreset(padapter);
}
void rtw_hal_sreset_reset_value(_adapter *padapter)
{
if(padapter->HalFunc.sreset_reset_value)
padapter->HalFunc.sreset_reset_value(padapter);
}
void rtw_hal_sreset_xmit_status_check(_adapter *padapter)
{
#ifdef CONFIG_CONCURRENT_MODE
if (padapter->adapter_type != PRIMARY_ADAPTER)
return;
#endif
if(padapter->HalFunc.sreset_xmit_status_check)
padapter->HalFunc.sreset_xmit_status_check(padapter);
}
void rtw_hal_sreset_linked_status_check(_adapter *padapter)
{
if(padapter->HalFunc.sreset_linked_status_check)
padapter->HalFunc.sreset_linked_status_check(padapter);
}
u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
{
u8 status = 0;
if(padapter->HalFunc.sreset_get_wifi_status)
status = padapter->HalFunc.sreset_get_wifi_status(padapter);
return status;
}
bool rtw_hal_sreset_inprogress(_adapter *padapter)
{
bool inprogress = _FALSE;
padapter = GET_PRIMARY_ADAPTER(padapter);
if(padapter->HalFunc.sreset_inprogress)
inprogress = padapter->HalFunc.sreset_inprogress(padapter);
return inprogress;
}
#endif //DBG_CONFIG_ERROR_DETECT
#ifdef CONFIG_IOL
int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms)
{
if (adapter->HalFunc.IOL_exec_cmds_sync)
return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms);
return _FAIL;
}
#endif
void rtw_hal_notch_filter(_adapter *adapter, bool enable)
{
if(adapter->HalFunc.hal_notch_filter)
adapter->HalFunc.hal_notch_filter(adapter,enable);
}
void rtw_hal_reset_security_engine(_adapter * adapter)
{
if(adapter->HalFunc.hal_reset_security_engine)
adapter->HalFunc.hal_reset_security_engine(adapter);
}
s32 rtw_hal_c2h_handler(_adapter *adapter, struct c2h_evt_hdr *c2h_evt)
{
s32 ret = _FAIL;
if (adapter->HalFunc.c2h_handler)
ret = adapter->HalFunc.c2h_handler(adapter, c2h_evt);
return ret;
}
c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter)
{
return adapter->HalFunc.c2h_id_filter_ccx;
}

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drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_hal_init.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c Normal file
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4840
drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c Normal file
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drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_rxdesc.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8192C_REDESC_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8192c_hal.h>
static u8 evm_db2percentage(s8 value)
{
//
// -33dB~0dB to 0%~99%
//
s8 ret_val;
ret_val = value;
//ret_val /= 2;
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("EVMdbToPercentage92S Value=%d / %x \n", ret_val, ret_val));
if(ret_val >= 0)
ret_val = 0;
if(ret_val <= -33)
ret_val = -33;
ret_val = 0 - ret_val;
ret_val*=3;
if(ret_val == 99)
ret_val = 100;
return(ret_val);
}
static s32 signal_scale_mapping(_adapter *padapter, s32 cur_sig )
{
s32 ret_sig;
#ifdef CONFIG_USB_HCI
if(cur_sig >= 51 && cur_sig <= 100)
{
ret_sig = 100;
}
else if(cur_sig >= 41 && cur_sig <= 50)
{
ret_sig = 80 + ((cur_sig - 40)*2);
}
else if(cur_sig >= 31 && cur_sig <= 40)
{
ret_sig = 66 + (cur_sig - 30);
}
else if(cur_sig >= 21 && cur_sig <= 30)
{
ret_sig = 54 + (cur_sig - 20);
}
else if(cur_sig >= 10 && cur_sig <= 20)
{
ret_sig = 42 + (((cur_sig - 10) * 2) / 3);
}
else if(cur_sig >= 5 && cur_sig <= 9)
{
ret_sig = 22 + (((cur_sig - 5) * 3) / 2);
}
else if(cur_sig >= 1 && cur_sig <= 4)
{
ret_sig = 6 + (((cur_sig - 1) * 3) / 2);
}
else
{
ret_sig = cur_sig;
}
#else
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if(pHalData->CustomerID == RT_CID_819x_Lenovo)
{
// Step 1. Scale mapping.
// 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.
// 20100426 Joseph: Modify Signal strength mapping.
// This modification makes the RSSI indication similar to Intel solution.
// 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.
if(cur_sig >= 54 && cur_sig <= 100)
{
ret_sig = 100;
}
else if(cur_sig>=42 && cur_sig <= 53 )
{
ret_sig = 95;
}
else if(cur_sig>=36 && cur_sig <= 41 )
{
ret_sig = 74 + ((cur_sig - 36) *20)/6;
}
else if(cur_sig>=33 && cur_sig <= 35 )
{
ret_sig = 65 + ((cur_sig - 33) *8)/2;
}
else if(cur_sig>=18 && cur_sig <= 32 )
{
ret_sig = 62 + ((cur_sig - 18) *2)/15;
}
else if(cur_sig>=15 && cur_sig <= 17 )
{
ret_sig = 33 + ((cur_sig - 15) *28)/2;
}
else if(cur_sig>=10 && cur_sig <= 14 )
{
ret_sig = 39;
}
else if(cur_sig>=8 && cur_sig <= 9 )
{
ret_sig = 33;
}
else if(cur_sig <= 8 )
{
ret_sig = 19;
}
}
else
{
// Step 1. Scale mapping.
if(cur_sig >= 61 && cur_sig <= 100)
{
ret_sig = 90 + ((cur_sig - 60) / 4);
}
else if(cur_sig >= 41 && cur_sig <= 60)
{
ret_sig = 78 + ((cur_sig - 40) / 2);
}
else if(cur_sig >= 31 && cur_sig <= 40)
{
ret_sig = 66 + (cur_sig - 30);
}
else if(cur_sig >= 21 && cur_sig <= 30)
{
ret_sig = 54 + (cur_sig - 20);
}
else if(cur_sig >= 5 && cur_sig <= 20)
{
ret_sig = 42 + (((cur_sig - 5) * 2) / 3);
}
else if(cur_sig == 4)
{
ret_sig = 36;
}
else if(cur_sig == 3)
{
ret_sig = 27;
}
else if(cur_sig == 2)
{
ret_sig = 18;
}
else if(cur_sig == 1)
{
ret_sig = 9;
}
else
{
ret_sig = cur_sig;
}
}
#endif
return ret_sig;
}
static s32 translate2dbm(u8 signal_strength_idx)
{
s32 signal_power; // in dBm.
// Translate to dBm (x=0.5y-95).
signal_power = (s32)((signal_strength_idx + 1) >> 1);
signal_power -= 95;
return signal_power;
}
static void query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat)
{
PHY_STS_OFDM_8192CD_T *pOfdm_buf;
PHY_STS_CCK_8192CD_T *pCck_buf;
u8 i, max_spatial_stream, evm;
s8 rx_pwr[4], rx_pwr_all = 0;
u8 pwdb_all;
u32 rssi,total_rssi=0;
u8 bcck_rate=0, rf_rx_num = 0, cck_highpwr = 0;
_adapter *padapter = prframe->u.hdr.adapter;
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
u8 tmp_rxsnr;
s8 rx_snrX;
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
PHY_RX_DRIVER_INFO_8192CD *pDrvInfo = ((PHY_RX_DRIVER_INFO_8192CD *)pphy_stat);
u8 bant1_sel = (pDrvInfo->ANTSEL == 1)?_TRUE:_FALSE;
#endif
// Record it for next packet processing
bcck_rate=(pattrib->mcs_rate<=3? 1:0);
if(bcck_rate) //CCK
{
u8 report;
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
if(bant1_sel == _TRUE)
pHalData->CCK_Ant1_Cnt++;
else
pHalData->CCK_Ant2_Cnt++;
#endif
// CCK Driver info Structure is not the same as OFDM packet.
pCck_buf = (PHY_STS_CCK_8192CD_T *)pphy_stat;
//Adapter->RxStats.NumQryPhyStatusCCK++;
//
// (1)Hardware does not provide RSSI for CCK
// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
//
if(padapter->pwrctrlpriv.rf_pwrstate == rf_on)
cck_highpwr = (u8)pHalData->bCckHighPower;
else
cck_highpwr = _FALSE;
if(!cck_highpwr)
{
report = pCck_buf->cck_agc_rpt&0xc0;
report = report>>6;
switch(report)
{
// 03312009 modified by cosa
// Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion
// Note: different RF with the different RNA gain.
case 0x3:
rx_pwr_all = (-46) - (pCck_buf->cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = (-26) - (pCck_buf->cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = (-12) - (pCck_buf->cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = (16) - (pCck_buf->cck_agc_rpt & 0x3e);
break;
}
}
else
{
report = pCck_buf->cck_agc_rpt & 0x60;
report = report>>5;
switch(report)
{
case 0x3:
rx_pwr_all = (-46) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x2:
rx_pwr_all = (-26)- ((pCck_buf->cck_agc_rpt & 0x1f)<<1);
break;
case 0x1:
rx_pwr_all = (-12) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x0:
rx_pwr_all = (16) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
break;
}
}
pwdb_all= query_rx_pwr_percentage(rx_pwr_all);
if(pHalData->CustomerID == RT_CID_819x_Lenovo)
{
// CCK gain is smaller than OFDM/MCS gain,
// so we add gain diff by experiences, the val is 6
pwdb_all+=6;
if(pwdb_all > 100)
pwdb_all = 100;
// modify the offset to make the same gain index with OFDM.
if(pwdb_all > 34 && pwdb_all <= 42)
pwdb_all -= 2;
else if(pwdb_all > 26 && pwdb_all <= 34)
pwdb_all -= 6;
else if(pwdb_all > 14 && pwdb_all <= 26)
pwdb_all -= 8;
else if(pwdb_all > 4 && pwdb_all <= 14)
pwdb_all -= 4;
}
pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive
pattrib->RecvSignalPower = rx_pwr_all; //dBM
padapter->recvpriv.rxpwdb = rx_pwr_all;
//
// (3) Get Signal Quality (EVM)
//
//if(bPacketMatchBSSID)
{
u8 sq;
if(pHalData->CustomerID == RT_CID_819x_Lenovo)
{
// mapping to 5 bars for vista signal strength
// signal quality in driver will be displayed to signal strength
// in vista.
if(pwdb_all >= 50)
sq = 100;
else if(pwdb_all >= 35 && pwdb_all < 50)
sq = 80;
else if(pwdb_all >= 22 && pwdb_all < 35)
sq = 60;
else if(pwdb_all >= 18 && pwdb_all < 22)
sq = 40;
else
sq = 20;
}
else
{
if(pwdb_all> 40)
{
sq = 100;
}
else
{
sq = pCck_buf->SQ_rpt;
if(pCck_buf->SQ_rpt > 64)
sq = 0;
else if (pCck_buf->SQ_rpt < 20)
sq= 100;
else
sq = ((64-sq) * 100) / 44;
}
}
pattrib->signal_qual=sq;
pattrib->rx_mimo_signal_qual[0]=sq;
pattrib->rx_mimo_signal_qual[1]=(-1);
}
}
else //OFDM/HT
{
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
if(bant1_sel == _TRUE)
pHalData->OFDM_Ant1_Cnt++;
else
pHalData->OFDM_Ant2_Cnt++;
#endif
pdmpriv->OFDM_Pkt_Cnt++;
pOfdm_buf = (PHY_STS_OFDM_8192CD_T *)pphy_stat;
//
// (1)Get RSSI per-path
//
for(i=0; i<pHalData->NumTotalRFPath; i++)
{
// 2008/01/30 MH we will judge RF RX path now.
if (pHalData->bRFPathRxEnable[i])
rf_rx_num++;
//else
//continue;
rx_pwr[i] = ((pOfdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
padapter->recvpriv.RxRssi[i] = rx_pwr[i];
/* Translate DBM to percentage. */
pattrib->rx_rssi[i] = rssi = query_rx_pwr_percentage(rx_pwr[i]);
total_rssi += rssi;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], rssi));
//Get Rx snr value in DB
tmp_rxsnr = pOfdm_buf->rxsnr_X[i];
rx_snrX = (s8)(tmp_rxsnr);
rx_snrX >>= 1;
padapter->recvpriv.RxSNRdB[i] = (int)rx_snrX;
pattrib->rx_snr[i]=pOfdm_buf->rxsnr_X[i];
/* Record Signal Strength for next packet */
//if(bPacketMatchBSSID)
{
//pRfd->Status.RxMIMOSignalStrength[i] =(u1Byte) RSSI;
//The following is for lenovo signal strength in vista
if(pHalData->CustomerID == RT_CID_819x_Lenovo)
{
u8 sq;
if(i == 0)
{
// mapping to 5 bars for vista signal strength
// signal quality in driver will be displayed to signal strength
// in vista.
if(rssi >= 50)
sq = 100;
else if(rssi >= 35 && rssi < 50)
sq = 80;
else if(rssi >= 22 && rssi < 35)
sq = 60;
else if(rssi >= 18 && rssi < 22)
sq = 40;
else
sq = 20;
//DbgPrint("ofdm/mcs RSSI=%d\n", RSSI);
//pRfd->Status.SignalQuality = SQ;
//DbgPrint("ofdm/mcs SQ = %d\n", pRfd->Status.SignalQuality);
}
}
}
}
//
// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive),average
//
rx_pwr_all = (((pOfdm_buf->pwdb_all ) >> 1 )& 0x7f) -110;//for OFDM Average RSSI
pwdb_all = query_rx_pwr_percentage(rx_pwr_all);
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("PWDB_ALL=%d\n", pwdb_all));
pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive
pattrib->RecvSignalPower = rx_pwr_all;//dBM
padapter->recvpriv.rxpwdb = rx_pwr_all;
//
// (3)EVM of HT rate
//
if(pHalData->CustomerID != RT_CID_819x_Lenovo)
{
if(pattrib->rxht && pattrib->mcs_rate >=20 && pattrib->mcs_rate<=27)
max_spatial_stream = 2; //both spatial stream make sense
else
max_spatial_stream = 1; //only spatial stream 1 makes sense
for(i=0; i<max_spatial_stream; i++)
{
// Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
// fill most significant bit to "zero" when doing shifting operation which may change a negative
// value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
evm = evm_db2percentage( (pOfdm_buf->rxevm_X[i]/*/ 2*/));//dbm
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",
pattrib->mcs_rate, pOfdm_buf->rxevm_X[i], "%",evm));
//if(bPacketMatchBSSID)
{
if(i==0) // Fill value in RFD, Get the first spatial stream only
{
pattrib->signal_qual = (u8)(evm & 0xff);
}
pattrib->rx_mimo_signal_qual[i] = (u8)(evm & 0xff);
}
}
}
//
// 4. Record rx statistics for debug
//
}
//UI BSS List signal strength(in percentage), make it good looking, from 0~100.
//It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
if(bcck_rate)
{
pattrib->signal_strength=(u8)signal_scale_mapping(padapter, pwdb_all);
}
else
{
if (rf_rx_num != 0)
{
pattrib->signal_strength= (u8)(signal_scale_mapping(padapter, total_rssi/=rf_rx_num));
}
}
//DBG_8192C("%s,rx_pwr_all(%d),RxPWDBAll(%d)\n",__FUNCTION__,rx_pwr_all,pattrib->RxPWDBAll);
}
static void process_rssi(_adapter *padapter,union recv_frame *prframe)
{
u32 last_rssi, tmp_val;
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
//DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength);
//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
{
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if(signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
}
signal_stat->total_num++;
signal_stat->total_val += pattrib->signal_strength;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
//Adapter->RxStats.RssiCalculateCnt++; //For antenna Test
if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
{
padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX;
last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index];
padapter->recvpriv.signal_strength_data.total_val -= last_rssi;
}
padapter->recvpriv.signal_strength_data.total_val +=pattrib->signal_strength;
padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->signal_strength;
if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX)
padapter->recvpriv.signal_strength_data.index = 0;
tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num;
if(padapter->recvpriv.is_signal_dbg) {
padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg;
padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg);
} else {
padapter->recvpriv.signal_strength= tmp_val;
padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val);
}
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num));
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
}
}// Process_UI_RSSI_8192C
static void process_PWDB(_adapter *padapter, union recv_frame *prframe)
{
int UndecoratedSmoothedPWDB;
int UndecoratedSmoothedCCK;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct rx_pkt_attrib *pattrib= &prframe->u.hdr.attrib;
struct sta_info *psta = prframe->u.hdr.psta;
u8 isCCKrate=(pattrib->mcs_rate<=3? 1:0);
if(psta)
{
UndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
UndecoratedSmoothedCCK = psta->rssi_stat.UndecoratedSmoothedCCK;
}
else
{
UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
UndecoratedSmoothedCCK = pdmpriv->UndecoratedSmoothedCCK;
}
//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
if(!isCCKrate)
{
// Process OFDM RSSI
if(UndecoratedSmoothedPWDB < 0) // initialize
{
UndecoratedSmoothedPWDB = pattrib->RxPWDBAll;
}
if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedPWDB)
{
UndecoratedSmoothedPWDB =
( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1;
}
else
{
UndecoratedSmoothedPWDB =
( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
}
}
else
{
// Process CCK RSSI
if(UndecoratedSmoothedCCK < 0) // initialize
{
UndecoratedSmoothedCCK = pattrib->RxPWDBAll;
}
if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedCCK)
{
UndecoratedSmoothedCCK =
( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
}
else
{
UndecoratedSmoothedCCK =
( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
}
}
if(psta)
{
//psta->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;//todo:
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
if(pdmpriv->RSSI_Select == RSSI_OFDM){
psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
}
else if(pdmpriv->RSSI_Select == RSSI_CCK){
psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
}
else{
if(UndecoratedSmoothedPWDB <0 )
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
else
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
}
psta->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
}
else
{
//pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
if(pdmpriv->RSSI_Select == RSSI_OFDM){
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
}
else if(pdmpriv->RSSI_Select == RSSI_CCK){
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
}
else {
if(UndecoratedSmoothedPWDB <0 )
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
else
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
}
pdmpriv->UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
}
//UpdateRxSignalStatistics8192C(padapter, prframe);
}
static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
{
u32 last_evm=0, tmpVal;
struct rx_pkt_attrib *pattrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
struct signal_stat * signal_stat;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
if(prframe == NULL || padapter==NULL){
return;
}
pattrib = &prframe->u.hdr.attrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
signal_stat = &padapter->recvpriv.signal_qual_data;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
//DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual);
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if(signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
}
signal_stat->total_num++;
signal_stat->total_val += pattrib->signal_qual;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
if(pattrib->signal_qual != 0)
{
//
// 1. Record the general EVM to the sliding window.
//
if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
{
padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX;
last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index];
padapter->recvpriv.signal_qual_data.total_val -= last_evm;
}
padapter->recvpriv.signal_qual_data.total_val += pattrib->signal_qual;
padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->signal_qual;
if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
padapter->recvpriv.signal_qual_data.index = 0;
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->signal_qual));
// <1> Showed on UI for user, in percentage.
tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num;
padapter->recvpriv.signal_qual=(u8)tmpVal;
}
else
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->signal_qual));
}
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
}// Process_UiLinkQuality8192S
static void process_phy_info(_adapter *padapter, union recv_frame *prframe)
{
union recv_frame *precvframe = (union recv_frame *)prframe;
#ifdef CONFIG_SW_ANTENNA_DIVERSITY
// If we switch to the antenna for testing, the signal strength
// of the packets in this time shall not be counted into total receiving power.
// This prevents error counting Rx signal strength and affecting other dynamic mechanism.
// Select the packets to do RSSI checking for antenna switching.
SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll);
if(GET_HAL_DATA(padapter)->RSSI_test == _TRUE)
return;
#endif
//
// Check RSSI
//
process_rssi(padapter, precvframe);
//
// Check PWDB.
//
process_PWDB(padapter, precvframe);
//
// Check EVM
//
process_link_qual(padapter, precvframe);
}
void rtl8192c_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info)
{
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
_adapter *padapter = precvframe->u.hdr.adapter;
u8 bPacketMatchBSSID =_FALSE;
u8 bPacketToSelf = _FALSE;
u8 bPacketBeacon = _FALSE;
if((pattrib->physt) && (pphy_info != NULL))
{
bPacketMatchBSSID = ((!IsFrameTypeCtrl(precvframe->u.hdr.rx_data)) && !(pattrib->icv_err) && !(pattrib->crc_err) &&
_rtw_memcmp(get_hdr_bssid(precvframe->u.hdr.rx_data), get_my_bssid(&padapter->mlmeextpriv.mlmext_info.network), ETH_ALEN));
bPacketToSelf = bPacketMatchBSSID && (_rtw_memcmp(get_da(precvframe->u.hdr.rx_data), myid(&padapter->eeprompriv), ETH_ALEN));
bPacketBeacon =bPacketMatchBSSID && (GetFrameSubType(precvframe->u.hdr.rx_data) == WIFI_BEACON);
query_rx_phy_status(precvframe, pphy_info);
precvframe->u.hdr.psta = NULL;
if(bPacketMatchBSSID && check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
{
u8 *sa;
struct sta_info *psta=NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
sa = get_sa(precvframe->u.hdr.rx_data);
psta = rtw_get_stainfo(pstapriv, sa);
if(psta)
{
precvframe->u.hdr.psta = psta;
process_phy_info(padapter, precvframe);
}
}
else if(bPacketToSelf || bPacketBeacon)
{
if(check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
{
u8 *sa;
struct sta_info *psta=NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
sa = get_sa(precvframe->u.hdr.rx_data);
psta = rtw_get_stainfo(pstapriv, sa);
if(psta)
{
precvframe->u.hdr.psta = psta;
}
}
process_phy_info(padapter, precvframe);
}
}
}
void rtl8192c_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc)
{
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
//Offset 0
pattrib->physt = (u8)((le32_to_cpu(pdesc->rxdw0) >> 26) & 0x1);
pattrib->pkt_len = (u16)(le32_to_cpu(pdesc->rxdw0)&0x00003fff);
pattrib->drvinfo_sz = (u8)((le32_to_cpu(pdesc->rxdw0) >> 16) & 0xf) * 8;//uint 2^3 = 8 bytes
pattrib->shift_sz = (u8)((le32_to_cpu(pdesc->rxdw0) >> 24) & 0x3);
pattrib->crc_err = (u8)((le32_to_cpu(pdesc->rxdw0) >> 14) & 0x1);
pattrib->icv_err = (u8)((le32_to_cpu(pdesc->rxdw0) >> 15) & 0x1);
pattrib->qos = (u8)(( le32_to_cpu( pdesc->rxdw0 ) >> 23) & 0x1);// Qos data, wireless lan header length is 26
pattrib->bdecrypted = (le32_to_cpu(pdesc->rxdw0) & BIT(27))? 0:1;
//Offset 4
pattrib->mfrag = (u8)((le32_to_cpu(pdesc->rxdw1) >> 27) & 0x1);//more fragment bit
//Offset 8
pattrib->frag_num = (u8)((le32_to_cpu(pdesc->rxdw2) >> 12) & 0xf);//fragmentation number
//Offset 12
#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
if ( le32_to_cpu(pdesc->rxdw3) & BIT(13)){
pattrib->tcpchk_valid = 1; // valid
if ( le32_to_cpu(pdesc->rxdw3) & BIT(11) ) {
pattrib->tcp_chkrpt = 1; // correct
//DBG_8192C("tcp csum ok\n");
}
else
pattrib->tcp_chkrpt = 0; // incorrect
if ( le32_to_cpu(pdesc->rxdw3) & BIT(12) )
pattrib->ip_chkrpt = 1; // correct
else
pattrib->ip_chkrpt = 0; // incorrect
}
else {
pattrib->tcpchk_valid = 0; // invalid
}
#endif
pattrib->mcs_rate=(u8)((le32_to_cpu(pdesc->rxdw3))&0x3f);
pattrib->rxht=(u8)((le32_to_cpu(pdesc->rxdw3) >>6)&0x1);
pattrib->sgi=(u8)((le32_to_cpu(pdesc->rxdw3) >>8)&0x1);
//Offset 16
//Offset 20
}

93
drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c Normal file
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@@ -0,0 +1,93 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <rtl8192c_sreset.h>
#include <rtl8192c_hal.h>
#ifdef DBG_CONFIG_ERROR_DETECT
void rtl8192c_sreset_xmit_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
u32 txdma_status;
if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
rtw_hal_sreset_reset(padapter);
}
//total xmit irp = 4
//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
current_time = rtw_get_current_time();
if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
if (diff_time > 2000) {
if (psrtpriv->last_tx_complete_time == 0) {
psrtpriv->last_tx_complete_time = current_time;
}
else{
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
if (diff_time > 4000) {
//padapter->Wifi_Error_Status = WIFI_TX_HANG;
DBG_871X("%s tx hang\n", __FUNCTION__);
rtw_hal_sreset_reset(padapter);
}
}
}
}
if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
rtw_hal_sreset_reset(padapter);
return;
}
}
void rtl8192c_sreset_linked_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
u32 regc50,regc58,reg824,reg800;
regc50 = rtw_read32(padapter,0xc50);
regc58 = rtw_read32(padapter,0xc58);
reg824 = rtw_read32(padapter,0x824);
reg800 = rtw_read32(padapter,0x800);
if( ((regc50&0xFFFFFF00)!= 0x69543400)||
((regc58&0xFFFFFF00)!= 0x69543400)||
(((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))||
( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000)))
{
DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__,
regc50, regc58, reg824, reg800);
rtw_hal_sreset_reset(padapter);
}
if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
rtw_hal_sreset_reset(padapter);
return;
}
}
#endif

62
drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_xmit.c Normal file
View File

@@ -0,0 +1,62 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8192C_XMIT_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8192c_hal.h>
#ifdef CONFIG_XMIT_ACK
void dump_txrpt_ccx_8192c(void *buf)
{
struct txrpt_ccx_8192c *txrpt_ccx = buf;
DBG_871X("%s:\n"
"retry_cnt:%u, rsvd_0:%u, rts_retry_cnt:%u, rsvd_1:%u\n"
"ccx_qtime:%u, missed_pkt_num:%u, rsvd_4:%u\n"
"mac_id:%u, des1_fragssn:%u\n"
"rpt_pkt_num:%u, pkt_drop:%u, lifetime_over:%u, retry_over:%u\n"
"edca_tx_queue:%u, rsvd_7:%u, bmc:%u, pkt_ok:%u, init_ccx:%u\n"
, __func__
, txrpt_ccx->retry_cnt, txrpt_ccx->rsvd_0, txrpt_ccx->rts_retry_cnt, txrpt_ccx->rsvd_1
, txrpt_ccx_qtime_8192c(txrpt_ccx), txrpt_ccx->missed_pkt_num, txrpt_ccx->rsvd_4
, txrpt_ccx->mac_id, txrpt_ccx->des1_fragssn
, txrpt_ccx->rpt_pkt_num, txrpt_ccx->pkt_drop, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over
, txrpt_ccx->edca_tx_queue, txrpt_ccx->rsvd_7, txrpt_ccx->bmc, txrpt_ccx->pkt_ok, txrpt_ccx->int_ccx
);
}
void handle_txrpt_ccx_8192c(_adapter *adapter, void *buf)
{
struct txrpt_ccx_8192c *txrpt_ccx = buf;
#ifdef DBG_CCX
dump_txrpt_ccx_8192c(buf);
#endif
if (txrpt_ccx->int_ccx) {
if (txrpt_ccx->pkt_ok)
rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS);
else
rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL);
}
}
#endif //CONFIG_XMIT_ACK

8757
drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c Normal file
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File diff suppressed because it is too large Load Diff

2557
drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c Normal file
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File diff suppressed because it is too large Load Diff

2674
drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_led.c Normal file
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File diff suppressed because it is too large Load Diff

227
drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_recv.c Normal file
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@@ -0,0 +1,227 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8192CU_RECV_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <mlme_osdep.h>
#include <ip.h>
#include <if_ether.h>
#include <ethernet.h>
#include <usb_ops.h>
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
#include <wifi.h>
#include <circ_buf.h>
#include <rtl8192c_hal.h>
void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf)
{
precvbuf->transfer_len = 0;
precvbuf->len = 0;
precvbuf->ref_cnt = 0;
if(precvbuf->pbuf)
{
precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf;
precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
}
}
int rtl8192cu_init_recv_priv(_adapter *padapter)
{
struct recv_priv *precvpriv = &padapter->recvpriv;
int i, res = _SUCCESS;
struct recv_buf *precvbuf;
#ifdef CONFIG_RECV_THREAD_MODE
_rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed
_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed
#endif
#ifdef PLATFORM_LINUX
tasklet_init(&precvpriv->recv_tasklet,
(void(*)(unsigned long))rtl8192cu_recv_tasklet,
(unsigned long)padapter);
#endif
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL);
if(precvpriv->int_in_urb == NULL){
DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n");
}
#endif
precvpriv->int_in_buf = rtw_zmalloc(sizeof(INTERRUPT_MSG_FORMAT_EX));
if(precvpriv->int_in_buf == NULL){
DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n");
}
#endif
//init recv_buf
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
_rtw_init_queue(&precvpriv->recv_buf_pending_queue);
#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX
precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4);
if(precvpriv->pallocated_recv_buf==NULL){
res= _FAIL;
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n"));
goto exit;
}
_rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4);
//precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 -
// ((uint) (precvpriv->pallocated_recv_buf) &(4-1));
precvbuf = (struct recv_buf*)precvpriv->precv_buf;
for(i=0; i < NR_RECVBUFF ; i++)
{
_rtw_init_listhead(&precvbuf->list);
_rtw_spinlock_init(&precvbuf->recvbuf_lock);
precvbuf->alloc_sz = MAX_RECVBUF_SZ;
res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
if(res==_FAIL)
break;
precvbuf->ref_cnt = 0;
precvbuf->adapter =padapter;
//rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue));
precvbuf++;
}
precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF;
#ifdef PLATFORM_LINUX
skb_queue_head_init(&precvpriv->rx_skb_queue);
#ifdef CONFIG_PREALLOC_RECV_SKB
{
int i;
SIZE_PTR tmpaddr=0;
SIZE_PTR alignment=0;
struct sk_buff *pskb=NULL;
skb_queue_head_init(&precvpriv->free_recv_skb_queue);
for(i=0; i<NR_PREALLOC_RECV_SKB; i++)
{
pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
if(pskb)
{
pskb->dev = padapter->pnetdev;
tmpaddr = (SIZE_PTR)pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
}
pskb=NULL;
}
}
#endif
#endif
exit:
return res;
}
void rtl8192cu_free_recv_priv (_adapter *padapter)
{
int i;
struct recv_buf *precvbuf;
struct recv_priv *precvpriv = &padapter->recvpriv;
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for(i=0; i < NR_RECVBUFF ; i++)
{
rtw_os_recvbuf_resource_free(padapter, precvbuf);
precvbuf++;
}
if(precvpriv->pallocated_recv_buf)
rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
if(precvpriv->int_in_urb)
{
usb_free_urb(precvpriv->int_in_urb);
}
#endif
if(precvpriv->int_in_buf)
rtw_mfree(precvpriv->int_in_buf, sizeof(INTERRUPT_MSG_FORMAT_EX));
#endif
#ifdef PLATFORM_LINUX
if (skb_queue_len(&precvpriv->rx_skb_queue)) {
DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n");
}
rtw_skb_queue_purge(&precvpriv->rx_skb_queue);
#ifdef CONFIG_PREALLOC_RECV_SKB
if (skb_queue_len(&precvpriv->free_recv_skb_queue)) {
DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
}
rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue);
#endif
#endif
}

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#DHCP client
DEVICE=wlan0
BOOTPROTO=dhcp
ONBOOT=yes

85
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192CE_FW_IMG_H
#define __INC_HAL8192CE_FW_IMG_H
#include <basic_types.h>
/*Created on 2011/ 6/15, 5:45*/
#ifdef CONFIG_BT_COEXISTENCE
#define TSMCImgArrayLength 15706 //v84 TSMC COMMON 2012-04-13
#else //#ifdef CONFIG_P2P
#define TSMCImgArrayLength 16126 //v88 TSMC P2PPS with CCX report C2H 2012-12-05
#endif
extern u8 Rtl8192CEFwTSMCImgArray[TSMCImgArrayLength];
#ifdef CONFIG_BT_COEXISTENCE
#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06
#else //#ifdef CONFIG_P2P
#define UMCACutImgArrayLength 16126 //v88 UMC A Cut P2PPS with CCX report C2H 2012-12-05
#endif
extern u8 Rtl8192CEFwUMCACutImgArray[UMCACutImgArrayLength];
#ifdef CONFIG_BT_COEXISTENCE
#define UMCBCutImgArrayLength 15686 //v84 UMC B Cut COMMON 2012-04-13
#else //#ifdef CONFIG_P2P
#define UMCBCutImgArrayLength 16096 //v88 UMC B Cut P2PPS with CCX report C2H 2012-12-05
#endif
extern u8 Rtl8192CEFwUMCBCutImgArray[UMCBCutImgArrayLength];
//8192C_Formal_92CE_PHYforMP_110804 2011-11-23
//8188C_Formal_88CE_PHYforMP_111117 2011-11-23
#define PHY_REG_2TArrayLength 374
extern u32 Rtl8192CEPHY_REG_2TArray[PHY_REG_2TArrayLength];
#define PHY_REG_1TArrayLength 374
extern u32 Rtl8192CEPHY_REG_1TArray[PHY_REG_1TArrayLength];
#define PHY_ChangeTo_1T1RArrayLength 1
extern u32 Rtl8192CEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
#define PHY_ChangeTo_1T2RArrayLength 1
extern u32 Rtl8192CEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
#define PHY_ChangeTo_2T2RArrayLength 1
extern u32 Rtl8192CEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
#define PHY_REG_Array_PGLength 336
extern u32 Rtl8192CEPHY_REG_Array_PG[PHY_REG_Array_PGLength];
#define PHY_REG_Array_MPLength 4
extern u32 Rtl8192CEPHY_REG_Array_MP[PHY_REG_Array_MPLength];
#define RadioA_2TArrayLength 282
extern u32 Rtl8192CERadioA_2TArray[RadioA_2TArrayLength];
#define RadioB_2TArrayLength 78
extern u32 Rtl8192CERadioB_2TArray[RadioB_2TArrayLength];
#define RadioA_1TArrayLength 282
extern u32 Rtl8192CERadioA_1TArray[RadioA_1TArrayLength];
#define RadioB_1TArrayLength 1
extern u32 Rtl8192CERadioB_1TArray[RadioB_1TArrayLength];
#define RadioB_GM_ArrayLength 1
extern u32 Rtl8192CERadioB_GM_Array[RadioB_GM_ArrayLength];
// MAC reg V14 - 2011-11-23
#define MAC_2T_ArrayLength 174
extern u32 Rtl8192CEMAC_2T_Array[MAC_2T_ArrayLength];
#define MACPHY_Array_PGLength 1
extern u32 Rtl8192CEMACPHY_Array_PG[MACPHY_Array_PGLength];
#define AGCTAB_2TArrayLength 320
extern u32 Rtl8192CEAGCTAB_2TArray[AGCTAB_2TArrayLength];
#define AGCTAB_1TArrayLength 320
extern u32 Rtl8192CEAGCTAB_1TArray[AGCTAB_1TArrayLength];
#endif //__INC_HAL8192CE_FW_IMG_H

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drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CPhyCfg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*****************************************************************************
* Module: __INC_HAL8192CPHYCFG_H
*
*
* Note:
*
*
* Export: Constants, macro, functions(API), global variables(None).
*
* Abbrev:
*
* History:
* Data Who Remark
* 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h.
* 2. Reorganize code architecture.
*
*****************************************************************************/
/* Check to see if the file has been included already. */
#ifndef __INC_HAL8192CPHYCFG_H
#define __INC_HAL8192CPHYCFG_H
/*--------------------------Define Parameters-------------------------------*/
#define LOOP_LIMIT 5
#define MAX_STALL_TIME 50 //us
#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)
#define MAX_TXPWR_IDX_NMODE_92S 63
#define Reset_Cnt_Limit 3
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
#ifdef CONFIG_PCI_HCI
#define MAX_AGGR_NUM 0x0A0A
#else
#define MAX_AGGR_NUM 0x0909
#endif
#ifdef CONFIG_PCI_HCI
#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \
{ \
u1Byte u1bTmp; \
u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \
u1bTmp |= BIT0; \
PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \
PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \
PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
delay_us(100); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
}
#endif
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
typedef enum _SwChnlCmdID{
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
}SwChnlCmdID;
/* 1. Switch channel related */
typedef struct _SwChnlCmd{
SwChnlCmdID CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
}SwChnlCmd;
typedef enum _HW90_BLOCK{
HW90_BLOCK_MAC = 0,
HW90_BLOCK_PHY0 = 1,
HW90_BLOCK_PHY1 = 2,
HW90_BLOCK_RF = 3,
HW90_BLOCK_MAXIMUM = 4, // Never use this
}HW90_BLOCK_E, *PHW90_BLOCK_E;
#define RF_PATH_MAX 2
#define CHANNEL_MAX_NUMBER 14 // 14 is the max channel number
#define CHANNEL_GROUP_MAX 3 // ch1~3, ch4~9, ch10~14 total three groups
typedef enum _WIRELESS_MODE {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = 0x01,
WIRELESS_MODE_B = 0x02,
WIRELESS_MODE_G = 0x04,
WIRELESS_MODE_AUTO = 0x08,
WIRELESS_MODE_N_24G = 0x10,
WIRELESS_MODE_N_5G = 0x20
} WIRELESS_MODE;
typedef enum _BaseBand_Config_Type{
BaseBand_Config_PHY_REG = 0, //Radio Path A
BaseBand_Config_AGC_TAB = 1, //Radio Path B
}BaseBand_Config_Type, *PBaseBand_Config_Type;
typedef enum _PHY_Rate_Tx_Power_Offset_Area{
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
}RA_OFFSET_AREA,*PRA_OFFSET_AREA;
/* BB/RF related */
typedef enum _RF_TYPE_8190P{
RF_TYPE_MIN, // 0
RF_8225=1, // 1 11b/g RF for verification only
RF_8256=2, // 2 11b/g/n
RF_8258=3, // 3 11a/b/g/n RF
RF_6052=4, // 4 11b/g/n RF
//RF_6052=5, // 4 11b/g/n RF
// TODO: We sholud remove this psudo PHY RF after we get new RF.
RF_PSEUDO_11N=5, // 5, It is a temporality RF.
}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E;
typedef struct _BB_REGISTER_DEFINITION{
u32 rfintfs; // set software control:
// 0x870~0x877[8 bytes]
u32 rfintfi; // readback data:
// 0x8e0~0x8e7[8 bytes]
u32 rfintfo; // output data:
// 0x860~0x86f [16 bytes]
u32 rfintfe; // output enable:
// 0x860~0x86f [16 bytes]
u32 rf3wireOffset; // LSSI data:
// 0x840~0x84f [16 bytes]
u32 rfLSSI_Select; // BB Band Select:
// 0x878~0x87f [8 bytes]
u32 rfTxGainStage; // Tx gain stage:
// 0x80c~0x80f [4 bytes]
u32 rfHSSIPara1; // wire parameter control1 :
// 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes]
u32 rfHSSIPara2; // wire parameter control2 :
// 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]
u32 rfSwitchControl; //Tx Rx antenna control :
// 0x858~0x85f [16 bytes]
u32 rfAGCControl1; //AGC parameter control1 :
// 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes]
u32 rfAGCControl2; //AGC parameter control2 :
// 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes]
u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix :
// 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]
u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter :
// 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes]
u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix
// 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes]
u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type
// 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]
u32 rfLSSIReadBack; //LSSI RF readback data SI mode
// 0x8a0~0x8af [16 bytes]
u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B
}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
#ifdef CONFIG_MP_INCLUDED
typedef enum _ANTENNA_PATH{
ANTENNA_NONE = 0x00,
ANTENNA_D ,
ANTENNA_C ,
ANTENNA_CD ,
ANTENNA_B ,
ANTENNA_BD ,
ANTENNA_BC ,
ANTENNA_BCD ,
ANTENNA_A ,
ANTENNA_AD ,
ANTENNA_AC ,
ANTENNA_ACD ,
ANTENNA_AB ,
ANTENNA_ABD ,
ANTENNA_ABC ,
ANTENNA_ABCD
} ANTENNA_PATH;
#endif
typedef struct _R_ANTENNA_SELECT_OFDM{
u32 r_tx_antenna:4;
u32 r_ant_l:4;
u32 r_ant_non_ht:4;
u32 r_ant_ht1:4;
u32 r_ant_ht2:4;
u32 r_ant_ht_s1:4;
u32 r_ant_non_ht_s1:4;
u32 OFDM_TXSC:2;
u32 Reserved:2;
}R_ANTENNA_SELECT_OFDM;
typedef struct _R_ANTENNA_SELECT_CCK{
u8 r_cckrx_enable_2:2;
u8 r_cckrx_enable:2;
u8 r_ccktx_enable:4;
}R_ANTENNA_SELECT_CCK;
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
//
// BB and RF register read/write
//
u32 rtl8192c_PHY_QueryBBReg( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask );
void rtl8192c_PHY_SetBBReg( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
u32 rtl8192c_PHY_QueryRFReg( IN PADAPTER Adapter,
IN RF_RADIO_PATH_E eRFPath,
IN u32 RegAddr,
IN u32 BitMask );
void rtl8192c_PHY_SetRFReg( IN PADAPTER Adapter,
IN RF_RADIO_PATH_E eRFPath,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
//
// Initialization related function
//
/* MAC/BB/RF HAL config */
int PHY_MACConfig8192C( IN PADAPTER Adapter );
int PHY_BBConfig8192C( IN PADAPTER Adapter );
int PHY_RFConfig8192C( IN PADAPTER Adapter );
/* RF config */
int rtl8192c_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter,
IN u8* pFileName,
IN RF_RADIO_PATH_E eRFPath);
int rtl8192c_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter,
IN RF_RADIO_PATH_E eRFPath);
/* BB/RF readback check for making sure init OK */
int rtl8192c_PHY_CheckBBAndRFOK( IN PADAPTER Adapter,
IN HW90_BLOCK_E CheckBlock,
IN RF_RADIO_PATH_E eRFPath );
/* Read initi reg value for tx power setting. */
void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter );
//
// RF Power setting
//
//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter,
// IN RT_RF_POWER_STATE eRFPowerState);
//
// BB TX Power R/W
//
void PHY_GetTxPowerLevel8192C( IN PADAPTER Adapter,
OUT u32* powerlevel );
void PHY_SetTxPowerLevel8192C( IN PADAPTER Adapter,
IN u8 channel );
BOOLEAN PHY_UpdateTxPowerDbm8192C( IN PADAPTER Adapter,
IN int powerInDbm );
//
VOID
PHY_ScanOperationBackup8192C(IN PADAPTER Adapter,
IN u8 Operation );
//
// Switch bandwidth for 8192S
//
//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer );
void PHY_SetBWMode8192C( IN PADAPTER pAdapter,
IN HT_CHANNEL_WIDTH ChnlWidth,
IN unsigned char Offset );
//
// Set FW CMD IO for 8192S.
//
//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter,
// IN IO_TYPE IOType);
//
// Set A2 entry to fw for 8192S
//
extern void FillA2Entry8192C( IN PADAPTER Adapter,
IN u8 index,
IN u8* val);
//
// channel switch related funciton
//
//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer );
void PHY_SwChnl8192C( IN PADAPTER pAdapter,
IN u8 channel );
// Call after initialization
void PHY_SwChnlPhy8192C( IN PADAPTER pAdapter,
IN u8 channel );
void ChkFwCmdIoDone( IN PADAPTER Adapter);
#ifdef USE_WORKITEM
//extern void SetIOWorkItemCallback( IN PVOID pContext );
#else
//extern void SetIOTimerCallback( IN PRT_TIMER pTimer);
#endif
//
// BB/MAC/RF other monitor API
//
void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter,
IN BOOLEAN bEnableMonitorMode );
BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter,
IN u32 eRFPath );
//
// IQ calibrate
//
VOID rtl8192c_PHY_IQCalibrate( IN PADAPTER pAdapter , IN BOOLEAN bReCovery);
//
// LC calibrate
//
VOID rtl8192c_PHY_LCCalibrate(IN PADAPTER pAdapter);
//
// AP calibrate
//
VOID rtl8192c_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta);
VOID rtl8192c_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain);
//
// Modify the value of the hw register when beacon interval be changed.
//
void
rtl8192c_PHY_SetBeaconHwReg( IN PADAPTER Adapter,
IN u16 BeaconInterval );
extern VOID
PHY_SwitchEphyParameter(
IN PADAPTER Adapter
);
extern VOID
PHY_EnableHostClkReq(
IN PADAPTER Adapter
);
BOOLEAN
SetAntennaConfig92C(
IN PADAPTER Adapter,
IN u8 DefaultAnt
);
/*--------------------------Exported Function prototype---------------------*/
#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192c_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data))
#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192c_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask))
#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192c_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
#define PHY_SetMacReg PHY_SetBBReg
#endif // __INC_HAL8192CPHYCFG_H

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drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CPhyReg.h Normal file
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drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CUHWImg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192CU_FW_IMG_H
#define __INC_HAL8192CU_FW_IMG_H
/*Created on 2011/ 6/15, 5:45*/
#ifdef CONFIG_BT_COEXISTENCE
#define TSMCImgArrayLength 15706 //v84 TSMC COMMON 2012-04-13
#else //#ifdef CONFIG_P2P
#define TSMCImgArrayLength 16126 //v88 TSMC P2PPS with CCX report C2H 2012-12-05
#endif
extern u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength];
#ifdef CONFIG_BT_COEXISTENCE
#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06
#else //#ifdef CONFIG_P2P
#define UMCACutImgArrayLength 16126 //v88 UMC A Cut P2PPS with CCX report C2H 2012-12-05
#endif
extern u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength];
#ifdef CONFIG_BT_COEXISTENCE
#define UMCBCutImgArrayLength 15686 //v84 UMC B Cut COMMON 2012-04-13
#else //#ifdef CONFIG_P2P
#define UMCBCutImgArrayLength 16096 //v88 UMC B Cut P2PPS with CCX report C2H 2012-12-05
#endif
extern u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength];
//8188C_Formal_All_PHYforMP_111117 2011-11-23
//8192C_Formal_92CU_PHYforMP_110817 2011-11-23
#define PHY_REG_2TArrayLength 374
extern u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength];
#define PHY_REG_1TArrayLength 374
extern u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength];
#define PHY_ChangeTo_1T1RArrayLength 1
extern u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
#define PHY_ChangeTo_1T2RArrayLength 1
extern u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
#define PHY_ChangeTo_2T2RArrayLength 1
extern u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
#define PHY_REG_Array_PGLength 336
extern u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength];
#define PHY_REG_Array_PG_mCardLength 336
extern u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength];
#define PHY_REG_Array_MPLength 4
extern u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength];
#define PHY_REG_1T_HPArrayLength 378
extern u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength];
#define PHY_REG_1T_mCardArrayLength 374
extern u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength];
#define PHY_REG_2T_mCardArrayLength 374
extern u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength];
#define PHY_REG_Array_PG_HPLength 336
extern u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength];
#define RadioA_2TArrayLength 282
extern u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength];
#define RadioB_2TArrayLength 78
extern u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength];
#define RadioA_1TArrayLength 282
extern u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength];
#define RadioB_1TArrayLength 1
extern u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength];
#define RadioA_2T_mCardArrayLength 282
extern u32 Rtl8192CURadioA_2T_mCardArray[RadioA_2T_mCardArrayLength];
#define RadioB_2T_mCardArrayLength 78
extern u32 Rtl8192CURadioB_2T_mCardArray[RadioB_2T_mCardArrayLength];
#define RadioA_1T_mCardArrayLength 282
extern u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength];
#define RadioB_1T_mCardArrayLength 1
extern u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength];
#define RadioA_1T_HPArrayLength 282
extern u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength];
#define RadioB_GM_ArrayLength 1
extern u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength];
// MAC reg V14 - 2011-11-23
#define MAC_2T_ArrayLength 174
extern u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength];
#define MACPHY_Array_PGLength 1
extern u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength];
#define AGCTAB_2TArrayLength 320
extern u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength];
#define AGCTAB_1TArrayLength 320
extern u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength];
#define AGCTAB_1T_HPArrayLength 320
extern u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_H

33
drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CUHWImg_wowlan.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192CU_FW_IMG_WOWLAN_H
#define __INC_HAL8192CU_FW_IMG_WOWLAN_H
/*Created on 2011/11/ 8, 14:15*/
#define TSMCWWImgArrayLength 13458
extern u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength];
#define UMCACutWWImgArrayLength 13458
extern u8 Rtl8192CUFwUMCACutWWImgArray[UMCACutWWImgArrayLength];
#define UMCBCutWWImgArrayLength 13446
extern u8 Rtl8192CUFwUMCBCutWWImgArray[UMCBCutWWImgArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_WOWLAN_H

66
drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DEHWImg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192DE_FW_IMG_H
#define __INC_HAL8192DE_FW_IMG_H
#include <basic_types.h>
/*Created on 2011/11/11, 8: 8*/
#define Rtl8192DEImgArrayLength 32296
extern const u8 Rtl8192DEFwImgArray[Rtl8192DEImgArrayLength];
#define Rtl8192DEMainArrayLength 1
extern const u8 Rtl8192DEFwMainArray[Rtl8192DEMainArrayLength];
#define Rtl8192DEDataArrayLength 1
extern const u8 Rtl8192DEFwDataArray[Rtl8192DEDataArrayLength];
#define Rtl8192DEPHY_REG_2TArrayLength 372
extern const u32 Rtl8192DEPHY_REG_2TArray[Rtl8192DEPHY_REG_2TArrayLength];
#define Rtl8192DEPHY_REG_1TArrayLength 1
extern const u32 Rtl8192DEPHY_REG_1TArray[Rtl8192DEPHY_REG_1TArrayLength];
#define Rtl8192DEPHY_REG_Array_PGLength 624
extern const u32 Rtl8192DEPHY_REG_Array_PG[Rtl8192DEPHY_REG_Array_PGLength];
#define Rtl8192DEPHY_REG_Array_MPLength 12
extern const u32 Rtl8192DEPHY_REG_Array_MP[Rtl8192DEPHY_REG_Array_MPLength];
#define Rtl8192DERadioA_2TArrayLength 378
extern const u32 Rtl8192DERadioA_2TArray[Rtl8192DERadioA_2TArrayLength];
#define Rtl8192DERadioB_2TArrayLength 384
extern const u32 Rtl8192DERadioB_2TArray[Rtl8192DERadioB_2TArrayLength];
#define Rtl8192DERadioA_1TArrayLength 1
extern const u32 Rtl8192DERadioA_1TArray[Rtl8192DERadioA_1TArrayLength];
#define Rtl8192DERadioB_1TArrayLength 1
extern const u32 Rtl8192DERadioB_1TArray[Rtl8192DERadioB_1TArrayLength];
#define Rtl8192DERadioA_2T_intPAArrayLength 378
extern const u32 Rtl8192DERadioA_2T_intPAArray[Rtl8192DERadioA_2T_intPAArrayLength];
#define Rtl8192DERadioB_2T_intPAArrayLength 384
extern const u32 Rtl8192DERadioB_2T_intPAArray[Rtl8192DERadioB_2T_intPAArrayLength];
#define Rtl8192DEMAC_2T_ArrayLength 192
extern const u32 Rtl8192DEMAC_2T_Array[Rtl8192DEMAC_2T_ArrayLength];
#define Rtl8192DEAGCTAB_ArrayLength 386
extern const u32 Rtl8192DEAGCTAB_Array[Rtl8192DEAGCTAB_ArrayLength];
#define Rtl8192DEAGCTAB_5GArrayLength 194
extern const u32 Rtl8192DEAGCTAB_5GArray[Rtl8192DEAGCTAB_5GArrayLength];
#define Rtl8192DEAGCTAB_2GArrayLength 194
extern const u32 Rtl8192DEAGCTAB_2GArray[Rtl8192DEAGCTAB_2GArrayLength];
#define Rtl8192DEAGCTAB_2TArrayLength 1
extern const u32 Rtl8192DEAGCTAB_2TArray[Rtl8192DEAGCTAB_2TArrayLength];
#define Rtl8192DEAGCTAB_1TArrayLength 1
extern const u32 Rtl8192DEAGCTAB_1TArray[Rtl8192DEAGCTAB_1TArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_H

527
drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DPhyCfg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*****************************************************************************
*
* Module: __INC_HAL8192DPHYCFG_H
*
*
* Note:
*
*
* Export: Constants, macro, functions(API), global variables(None).
*
* Abbrev:
*
* History:
* Data Who Remark
* 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h.
* 2. Reorganize code architecture.
*
*****************************************************************************/
/* Check to see if the file has been included already. */
#ifndef __INC_HAL8192DPHYCFG_H
#define __INC_HAL8192DPHYCFG_H
/*--------------------------Define Parameters-------------------------------*/
#define LOOP_LIMIT 5
#define MAX_STALL_TIME 50 //us
#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)
#define MAX_TXPWR_IDX_NMODE_92S 63
#define Reset_Cnt_Limit 3
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 10
#define IQK_BB_REG_NUM_92C 9
#define IQK_BB_REG_NUM_92D 10
#define IQK_BB_REG_NUM_test 6
#define index_mapping_NUM 13
#define Rx_index_mapping_NUM 15
#define AVG_THERMAL_NUM 8
#define IQK_Matrix_REG_NUM 8
#define IQK_Matrix_Settings_NUM 1+24+21
#ifdef CONFIG_PCI_HCI
#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \
{ \
u1Byte u1bTmp; \
u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \
u1bTmp |= BIT0; \
PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \
PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \
PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
delay_us(100); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
}
#endif
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
typedef enum _SwChnlCmdID{
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
}SwChnlCmdID;
/* 1. Switch channel related */
typedef struct _SwChnlCmd{
SwChnlCmdID CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
}SwChnlCmd;
typedef enum _HW90_BLOCK{
HW90_BLOCK_MAC = 0,
HW90_BLOCK_PHY0 = 1,
HW90_BLOCK_PHY1 = 2,
HW90_BLOCK_RF = 3,
HW90_BLOCK_MAXIMUM = 4, // Never use this
}HW90_BLOCK_E, *PHW90_BLOCK_E;
//vivi added this for read parameter from header, 20100908
typedef enum _RF_CONTENT{
radioa_txt = 0x1000,
radiob_txt = 0x1001,
radioc_txt = 0x1002,
radiod_txt = 0x1003
} RF_CONTENT;
#define RF_PATH_MAX 2
typedef enum _WIRELESS_MODE {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = 0x01,
WIRELESS_MODE_B = 0x02,
WIRELESS_MODE_G = 0x04,
WIRELESS_MODE_AUTO = 0x08,
WIRELESS_MODE_N_24G = 0x10,
WIRELESS_MODE_N_5G = 0x20
} WIRELESS_MODE;
#define CHANNEL_MAX_NUMBER 14+24+21 // 14 is the max channel number
#define CHANNEL_GROUP_MAX 3+9 // ch1~3, ch4~9, ch10~14 total three groups
#define MAX_PG_GROUP 13
#define CHANNEL_GROUP_MAX_2G 3
#define CHANNEL_GROUP_IDX_5GL 3
#define CHANNEL_GROUP_IDX_5GM 6
#define CHANNEL_GROUP_IDX_5GH 9
#define CHANNEL_GROUP_MAX_5G 9
#define CHANNEL_MAX_NUMBER_2G 14
typedef enum _BaseBand_Config_Type{
BaseBand_Config_PHY_REG = 0, //Radio Path A
BaseBand_Config_AGC_TAB = 1, //Radio Path B
}BaseBand_Config_Type, *PBaseBand_Config_Type;
typedef enum _MACPHY_MODE_8192D{
SINGLEMAC_SINGLEPHY,
DUALMAC_DUALPHY,
DUALMAC_SINGLEPHY,
}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D;
typedef enum _MACPHY_MODE_CHANGE_ACTION{
DMDP2DMSP = 0,
DMSP2DMDP = 1,
DMDP2SMSP = 2,
SMSP2DMDP = 3,
DMSP2SMSP = 4,
SMSP2DMSP = 5,
MAXACTION
}MACPHY_MODE_CHANGE_ACTION,*PMACPHY_MODE_CHANGE_ACTION;
typedef enum _BAND_TYPE{
BAND_ON_2_4G = 0,
BAND_ON_5G,
BAND_ON_BOTH,
BANDMAX
}BAND_TYPE,*PBAND_TYPE;
typedef enum _PHY_Rate_Tx_Power_Offset_Area{
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
}RA_OFFSET_AREA,*PRA_OFFSET_AREA;
/* BB/RF related */
typedef enum _RF_TYPE_8190P{
RF_TYPE_MIN, // 0
RF_8225=1, // 1 11b/g RF for verification only
RF_8256=2, // 2 11b/g/n
RF_8258=3, // 3 11a/b/g/n RF
RF_6052=4, // 4 11b/g/n RF
//RF_6052=5, // 4 11b/g/n RF
// TODO: We sholud remove this psudo PHY RF after we get new RF.
RF_PSEUDO_11N=5, // 5, It is a temporality RF.
}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E;
typedef struct _BB_REGISTER_DEFINITION{
u32 rfintfs; // set software control:
// 0x870~0x877[8 bytes]
u32 rfintfi; // readback data:
// 0x8e0~0x8e7[8 bytes]
u32 rfintfo; // output data:
// 0x860~0x86f [16 bytes]
u32 rfintfe; // output enable:
// 0x860~0x86f [16 bytes]
u32 rf3wireOffset; // LSSI data:
// 0x840~0x84f [16 bytes]
u32 rfLSSI_Select; // BB Band Select:
// 0x878~0x87f [8 bytes]
u32 rfTxGainStage; // Tx gain stage:
// 0x80c~0x80f [4 bytes]
u32 rfHSSIPara1; // wire parameter control1 :
// 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes]
u32 rfHSSIPara2; // wire parameter control2 :
// 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]
u32 rfSwitchControl; //Tx Rx antenna control :
// 0x858~0x85f [16 bytes]
u32 rfAGCControl1; //AGC parameter control1 :
// 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes]
u32 rfAGCControl2; //AGC parameter control2 :
// 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes]
u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix :
// 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]
u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter :
// 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes]
u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix
// 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes]
u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type
// 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]
u32 rfLSSIReadBack; //LSSI RF readback data SI mode
// 0x8a0~0x8af [16 bytes]
u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B
}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
#ifdef CONFIG_MP_INCLUDED
typedef enum _ANTENNA_PATH{
ANTENNA_NONE = 0x00,
ANTENNA_D ,
ANTENNA_C ,
ANTENNA_CD ,
ANTENNA_B ,
ANTENNA_BD ,
ANTENNA_BC ,
ANTENNA_BCD ,
ANTENNA_A ,
ANTENNA_AD ,
ANTENNA_AC ,
ANTENNA_ACD ,
ANTENNA_AB ,
ANTENNA_ABD ,
ANTENNA_ABC ,
ANTENNA_ABCD
} ANTENNA_PATH;
#endif
typedef struct _R_ANTENNA_SELECT_OFDM{
u32 r_tx_antenna:4;
u32 r_ant_l:4;
u32 r_ant_non_ht:4;
u32 r_ant_ht1:4;
u32 r_ant_ht2:4;
u32 r_ant_ht_s1:4;
u32 r_ant_non_ht_s1:4;
u32 OFDM_TXSC:2;
u32 Reserved:2;
}R_ANTENNA_SELECT_OFDM;
typedef struct _R_ANTENNA_SELECT_CCK{
u8 r_cckrx_enable_2:2;
u8 r_cckrx_enable:2;
u8 r_ccktx_enable:4;
}R_ANTENNA_SELECT_CCK;
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
//Added for TX Power
//u8 GetRightChnlPlace(u8 chnl);
u8 rtl8192d_GetRightChnlPlaceforIQK(u8 chnl);
u8 rtl8192d_getChnlGroupfromArray(u8 chnl);
/*--------------------------Exported Function prototype---------------------*/
//
// BB and RF register read/write
//
void rtl8192d_PHY_SetBBReg1Byte( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
u32 rtl8192d_PHY_QueryBBReg( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask );
void rtl8192d_PHY_SetBBReg( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
u32 rtl8192d_PHY_QueryRFReg( IN PADAPTER Adapter,
IN RF_RADIO_PATH_E eRFPath,
IN u32 RegAddr,
IN u32 BitMask );
void rtl8192d_PHY_SetRFReg( IN PADAPTER Adapter,
IN RF_RADIO_PATH_E eRFPath,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
//
// Initialization related function
//
/* MAC/BB/RF HAL config */
extern int PHY_MACConfig8192D( IN PADAPTER Adapter );
extern int PHY_BBConfig8192D( IN PADAPTER Adapter );
extern int PHY_RFConfig8192D( IN PADAPTER Adapter );
/* RF config */
int rtl8192d_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter,
IN u8* pFileName,
IN RF_RADIO_PATH_E eRFPath);
int rtl8192d_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter,
IN RF_CONTENT Content,
IN RF_RADIO_PATH_E eRFPath);
/* BB/RF readback check for making sure init OK */
int rtl8192d_PHY_CheckBBAndRFOK( IN PADAPTER Adapter,
IN HW90_BLOCK_E CheckBlock,
IN RF_RADIO_PATH_E eRFPath );
/* Read initi reg value for tx power setting. */
void rtl8192d_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter );
//
// RF Power setting
//
//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter,
// IN RT_RF_POWER_STATE eRFPowerState);
//
// BB TX Power R/W
//
void PHY_GetTxPowerLevel8192D( IN PADAPTER Adapter,
OUT u32* powerlevel );
void PHY_SetTxPowerLevel8192D( IN PADAPTER Adapter,
IN u8 channel );
BOOLEAN PHY_UpdateTxPowerDbm8192D( IN PADAPTER Adapter,
IN int powerInDbm );
//
VOID
PHY_ScanOperationBackup8192D(IN PADAPTER Adapter,
IN u8 Operation );
//
// Switch bandwidth for 8192S
//
//void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer );
void PHY_SetBWMode8192D( IN PADAPTER pAdapter,
IN HT_CHANNEL_WIDTH ChnlWidth,
IN unsigned char Offset );
//
// Set FW CMD IO for 8192S.
//
//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter,
// IN IO_TYPE IOType);
//
// Set A2 entry to fw for 8192S
//
extern void FillA2Entry8192C( IN PADAPTER Adapter,
IN u8 index,
IN u8* val);
//
// channel switch related funciton
//
//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer );
void PHY_SwChnl8192D( IN PADAPTER pAdapter,
IN u8 channel );
// Call after initialization
void PHY_SwChnlPhy8192D( IN PADAPTER pAdapter,
IN u8 channel );
extern void ChkFwCmdIoDone( IN PADAPTER Adapter);
#ifdef USE_WORKITEM
//extern void SetIOWorkItemCallback( IN PVOID pContext );
#else
//extern void SetIOTimerCallback( IN PRT_TIMER pTimer);
#endif
//
// BB/MAC/RF other monitor API
//
void PHY_SetMonitorMode8192D(IN PADAPTER pAdapter,
IN BOOLEAN bEnableMonitorMode );
BOOLEAN PHY_CheckIsLegalRfPath8192D(IN PADAPTER pAdapter,
IN u32 eRFPath );
//
// IQ calibrate
//
void rtl8192d_PHY_IQCalibrate( IN PADAPTER pAdapter);
//
// LC calibrate
//
void rtl8192d_PHY_LCCalibrate(IN PADAPTER pAdapter);
//
// AP calibrate
//
void rtl8192d_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta);
//
// Modify the value of the hw register when beacon interval be changed.
//
void
rtl8192d_PHY_SetBeaconHwReg( IN PADAPTER Adapter,
IN u16 BeaconInterval );
extern VOID
PHY_SwitchEphyParameter(
IN PADAPTER Adapter
);
extern VOID
PHY_EnableHostClkReq(
IN PADAPTER Adapter
);
BOOLEAN
SetAntennaConfig92C(
IN PADAPTER Adapter,
IN u8 DefaultAnt
);
VOID
PHY_StopTRXBeforeChangeBand8192D(
PADAPTER Adapter
);
VOID
PHY_UpdateBBRFConfiguration8192D(
IN PADAPTER Adapter,
IN BOOLEAN bisBandSwitch
);
VOID PHY_ReadMacPhyMode92D(
IN PADAPTER Adapter,
IN BOOLEAN AutoloadFail
);
VOID PHY_ConfigMacPhyMode92D(
IN PADAPTER Adapter
);
VOID PHY_ConfigMacPhyModeInfo92D(
IN PADAPTER Adapter
);
VOID PHY_ConfigMacCoexist_RFPage92D(
IN PADAPTER Adapter
);
VOID
rtl8192d_PHY_InitRxSetting(
IN PADAPTER Adapter
);
VOID
rtl8192d_PHY_ResetIQKResult(
IN PADAPTER Adapter
);
VOID
rtl8192d_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain);
VOID
HalChangeCCKStatus8192D(
IN PADAPTER Adapter,
IN BOOLEAN bCCKDisable
);
VOID
PHY_InitPABias92D(IN PADAPTER Adapter);
/*--------------------------Exported Function prototype---------------------*/
#define PHY_SetBBReg1Byte(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg1Byte((Adapter), (RegAddr), (BitMask), (Data))
#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192d_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data))
#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192d_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask))
#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192d_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
#define PHY_SetMacReg PHY_SetBBReg
#endif // __INC_HAL8192SPHYCFG_H

1170
drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DPhyReg.h Normal file
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66
drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DUHWImg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192DU_FW_IMG_H
#define __INC_HAL8192DU_FW_IMG_H
#include <basic_types.h>
/*Created on 2011/11/11, 8: 8*/
#define Rtl8192DUImgArrayLength 31452
extern const u8 Rtl8192DUFwImgArray[Rtl8192DUImgArrayLength];
#define Rtl8192DUMainArrayLength 1
extern const u8 Rtl8192DUFwMainArray[Rtl8192DUMainArrayLength];
#define Rtl8192DUDataArrayLength 1
extern const u8 Rtl8192DUFwDataArray[Rtl8192DUDataArrayLength];
#define Rtl8192DUPHY_REG_2TArrayLength 372
extern const u32 Rtl8192DUPHY_REG_2TArray[Rtl8192DUPHY_REG_2TArrayLength];
#define Rtl8192DUPHY_REG_1TArrayLength 1
extern const u32 Rtl8192DUPHY_REG_1TArray[Rtl8192DUPHY_REG_1TArrayLength];
#define Rtl8192DUPHY_REG_Array_PGLength 624
extern const u32 Rtl8192DUPHY_REG_Array_PG[Rtl8192DUPHY_REG_Array_PGLength];
#define Rtl8192DUPHY_REG_Array_MPLength 14
extern const u32 Rtl8192DUPHY_REG_Array_MP[Rtl8192DUPHY_REG_Array_MPLength];
#define Rtl8192DURadioA_2TArrayLength 378
extern const u32 Rtl8192DURadioA_2TArray[Rtl8192DURadioA_2TArrayLength];
#define Rtl8192DURadioB_2TArrayLength 384
extern const u32 Rtl8192DURadioB_2TArray[Rtl8192DURadioB_2TArrayLength];
#define Rtl8192DURadioA_1TArrayLength 1
extern const u32 Rtl8192DURadioA_1TArray[Rtl8192DURadioA_1TArrayLength];
#define Rtl8192DURadioB_1TArrayLength 1
extern const u32 Rtl8192DURadioB_1TArray[Rtl8192DURadioB_1TArrayLength];
#define Rtl8192DURadioA_2T_intPAArrayLength 378
extern const u32 Rtl8192DURadioA_2T_intPAArray[Rtl8192DURadioA_2T_intPAArrayLength];
#define Rtl8192DURadioB_2T_intPAArrayLength 384
extern const u32 Rtl8192DURadioB_2T_intPAArray[Rtl8192DURadioB_2T_intPAArrayLength];
#define Rtl8192DUMAC_2T_ArrayLength 192
extern const u32 Rtl8192DUMAC_2T_Array[Rtl8192DUMAC_2T_ArrayLength];
#define Rtl8192DUAGCTAB_ArrayLength 386
extern const u32 Rtl8192DUAGCTAB_Array[Rtl8192DUAGCTAB_ArrayLength];
#define Rtl8192DUAGCTAB_5GArrayLength 194
extern const u32 Rtl8192DUAGCTAB_5GArray[Rtl8192DUAGCTAB_5GArrayLength];
#define Rtl8192DUAGCTAB_2GArrayLength 194
extern const u32 Rtl8192DUAGCTAB_2GArray[Rtl8192DUAGCTAB_2GArrayLength];
#define Rtl8192DUAGCTAB_2TArrayLength 1
extern const u32 Rtl8192DUAGCTAB_2TArray[Rtl8192DUAGCTAB_2TArrayLength];
#define Rtl8192DUAGCTAB_1TArrayLength 1
extern const u32 Rtl8192DUAGCTAB_1TArray[Rtl8192DUAGCTAB_1TArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_H

29
drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DUHWImg_wowlan.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192DU_FW_IMG_WOWLAN_H
#define __INC_HAL8192DU_FW_IMG_WOWLAN_H
/*Created on 2011/11/ 8, 14:15*/
#define DUWWImgArrayLength 24818
extern u8 Rtl8192DUFwWWImgArray[DUWWImgArrayLength];
#endif //__INC_HAL8192DU_FW_IMG_WOWLAN_H

137
drivers/net/wireless/realtek/rtl8192cu/include/HalPwrSeqCmd.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HALPWRSEQCMD_H__
#define __HALPWRSEQCMD_H__
#include <drv_types.h>
/*---------------------------------------------*/
//3 The value of cmd: 4 bits
/*---------------------------------------------*/
#define PWR_CMD_READ 0x00
// offset: the read register offset
// msk: the mask of the read value
// value: N/A, left by 0
// note: dirver shall implement this function by read & msk
#define PWR_CMD_WRITE 0x01
// offset: the read register offset
// msk: the mask of the write bits
// value: write value
// note: driver shall implement this cmd by read & msk after write
#define PWR_CMD_POLLING 0x02
// offset: the read register offset
// msk: the mask of the polled value
// value: the value to be polled, masked by the msd field.
// note: driver shall implement this cmd by
// do{
// if( (Read(offset) & msk) == (value & msk) )
// break;
// } while(not timeout);
#define PWR_CMD_DELAY 0x03
// offset: the value to delay
// msk: N/A
// value: the unit of delay, 0: us, 1: ms
#define PWR_CMD_END 0x04
// offset: N/A
// msk: N/A
// value: N/A
/*---------------------------------------------*/
//3 The value of base: 4 bits
/*---------------------------------------------*/
// define the base address of each block
#define PWR_BASEADDR_MAC 0x00
#define PWR_BASEADDR_USB 0x01
#define PWR_BASEADDR_PCIE 0x02
#define PWR_BASEADDR_SDIO 0x03
/*---------------------------------------------*/
//3 The value of interface_msk: 4 bits
/*---------------------------------------------*/
#define PWR_INTF_SDIO_MSK BIT(0)
#define PWR_INTF_USB_MSK BIT(1)
#define PWR_INTF_PCI_MSK BIT(2)
#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/*---------------------------------------------*/
//3 The value of fab_msk: 4 bits
/*---------------------------------------------*/
#define PWR_FAB_TSMC_MSK BIT(0)
#define PWR_FAB_UMC_MSK BIT(1)
#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/*---------------------------------------------*/
//3 The value of cut_msk: 8 bits
/*---------------------------------------------*/
#define PWR_CUT_TESTCHIP_MSK BIT(0)
#define PWR_CUT_A_MSK BIT(1)
#define PWR_CUT_B_MSK BIT(2)
#define PWR_CUT_C_MSK BIT(3)
#define PWR_CUT_D_MSK BIT(4)
#define PWR_CUT_E_MSK BIT(5)
#define PWR_CUT_F_MSK BIT(6)
#define PWR_CUT_G_MSK BIT(7)
#define PWR_CUT_ALL_MSK 0xFF
typedef enum _PWRSEQ_CMD_DELAY_UNIT_
{
PWRSEQ_DELAY_US,
PWRSEQ_DELAY_MS,
} PWRSEQ_DELAY_UNIT;
typedef struct _WL_PWR_CFG_
{
u16 offset;
u8 cut_msk;
u8 fab_msk:4;
u8 interface_msk:4;
u8 base:4;
u8 cmd:4;
u8 msk;
u8 value;
} WLAN_PWR_CFG, *PWLAN_PWR_CFG;
#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk
#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk
#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk
#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base
#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
//================================================================================
// Prototype of protected function.
//================================================================================
u8 HalPwrSeqCmdParsing(
PADAPTER padapter,
u8 CutVersion,
u8 FabVersion,
u8 InterfaceType,
WLAN_PWR_CFG PwrCfgCmd[]);
#endif

336
drivers/net/wireless/realtek/rtl8192cu/include/autoconf.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*
* Public General Config
*/
#define AUTOCONF_INCLUDED
#define RTL871X_MODULE_NAME "92CU"
#define DRV_NAME "rtl8192cu"
#define CONFIG_USB_HCI 1
#define CONFIG_RTL8192C 1
#define PLATFORM_LINUX 1
//#define CONFIG_IOCTL_CFG80211 1
#ifdef CONFIG_IOCTL_CFG80211
//#define RTW_USE_CFG80211_STA_EVENT /* Indecate new sta asoc through cfg80211_new_sta */
#define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER
//#define CONFIG_DEBUG_CFG80211 1
//#define CONFIG_DRV_ISSUE_PROV_REQ // IOT FOR S2
#define CONFIG_SET_SCAN_DENY_TIMER
#endif
/*
* Internal General Config
*/
//#define CONFIG_PWRCTRL
//#define CONFIG_H2CLBK
#define CONFIG_EMBEDDED_FWIMG 1
//#define CONFIG_FILE_FWIMG
#ifdef CONFIG_WAKE_ON_WLAN
#define CONFIG_WOWLAN 1
#endif //CONFIG_WAKE_ON_WLAN
#define CONFIG_R871X_TEST 1
#define CONFIG_XMIT_ACK
#ifdef CONFIG_XMIT_ACK
#define CONFIG_XMIT_ACK_POLLING
#define CONFIG_ACTIVE_KEEP_ALIVE_CHECK
#endif
#define CONFIG_80211N_HT 1
#define CONFIG_RECV_REORDERING_CTRL 1
//#define CONFIG_TCP_CSUM_OFFLOAD_RX 1
//#define CONFIG_BEFORE_LINKED_DIG
//#define CONFIG_DRVEXT_MODULE 1
#ifndef CONFIG_MP_INCLUDED
#define CONFIG_IPS 1
#ifdef CONFIG_IPS
//#define CONFIG_IPS_LEVEL_2 1 //enable this to set default IPS mode to IPS_LEVEL_2
#endif
#define SUPPORT_HW_RFOFF_DETECTED 1
#define CONFIG_LPS 1
#define CONFIG_BT_COEXIST 1
//befor link
#define CONFIG_ANTENNA_DIVERSITY
//after link
#ifdef CONFIG_ANTENNA_DIVERSITY
#define CONFIG_SW_ANTENNA_DIVERSITY
//#define CONFIG_HW_ANTENNA_DIVERSITY
#endif
#define CONFIG_IOL
#else //#ifndef CONFIG_MP_INCLUDED
#define CONFIG_MP_IWPRIV_SUPPORT 1
#endif //#ifndef CONFIG_MP_INCLUDED
#define CONFIG_AP_MODE 1
#ifdef CONFIG_AP_MODE
#define CONFIG_NATIVEAP_MLME 1
#ifndef CONFIG_NATIVEAP_MLME
#define CONFIG_HOSTAPD_MLME 1
#endif
#define CONFIG_FIND_BEST_CHANNEL 1
//#define CONFIG_NO_WIRELESS_HANDLERS 1
#endif
// Added by Albert 20110314
#define CONFIG_P2P 1
#ifdef CONFIG_P2P
//Added by Albert 20110812
//The CONFIG_WFD is for supporting the Wi-Fi display
#define CONFIG_WFD
#ifndef CONFIG_WIFI_TEST
#define CONFIG_P2P_REMOVE_GROUP_INFO
#endif
//#define CONFIG_DBG_P2P
//#define CONFIG_P2P_PS
//#define CONFIG_P2P_IPS
#define P2P_OP_CHECK_SOCIAL_CH
// Added comment by Borg 2013/06/21
// Issue: Nexus 4 is hard to do miracast.
// Root Cause: After group formation,
// Nexus 4 is possible to be not at OP channel of Invitation Resp/Nego Confirm but at social channel.
// Patch: While scan OP channel,
// not only scan OP channel of Invitation Resp/Nego Confirm,
// but also scan social channel(1, 6, 11)
#endif
// Added by Kurt 20110511
//#define CONFIG_TDLS 1
#ifdef CONFIG_TDLS
// #ifndef CONFIG_WFD
// #define CONFIG_WFD 1
// #endif
// #define CONFIG_TDLS_AUTOSETUP 1
// #define CONFIG_TDLS_AUTOCHECKALIVE 1
#endif
#define CONFIG_SKB_COPY 1//for amsdu
#define CONFIG_LED
#ifdef CONFIG_LED
#define CONFIG_SW_LED
#ifdef CONFIG_SW_LED
//#define CONFIG_LED_HANDLED_BY_CMD_THREAD
#endif
#endif // CONFIG_LED
#define USB_INTERFERENCE_ISSUE // this should be checked in all usb interface
#define CONFIG_GLOBAL_UI_PID
#define CONFIG_LAYER2_ROAMING
#define CONFIG_LAYER2_ROAMING_RESUME
//#define CONFIG_ADAPTOR_INFO_CACHING_FILE // now just applied on 8192cu only, should make it general...
//#define CONFIG_RESUME_IN_WORKQUEUE
//#define CONFIG_SET_SCAN_DENY_TIMER
#define CONFIG_LONG_DELAY_ISSUE
#define CONFIG_NEW_SIGNAL_STAT_PROCESS
//#define CONFIG_SIGNAL_DISPLAY_DBM //display RX signal with dbm
#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable */
#define CONFIG_DEAUTH_BEFORE_CONNECT
#ifdef CONFIG_IOL
#define CONFIG_IOL_LLT
#define CONFIG_IOL_MAC
#define CONFIG_IOL_BB_PHY_REG
#define CONFIG_IOL_BB_AGC_TAB
#define CONFIG_IOL_RF_RF90_PATH_A
#define CONFIG_IOL_RF_RF90_PATH_B
#endif
#define CONFIG_BR_EXT 1 // Enable NAT2.5 support for STA mode interface with a L2 Bridge
#ifdef CONFIG_BR_EXT
#define CONFIG_BR_EXT_BRNAME "br0"
#endif // CONFIG_BR_EXT
#define CONFIG_TX_MCAST2UNI 1 // Support IP multicast->unicast
//#define CONFIG_DM_ADAPTIVITY
//#define CONFIG_CHECK_AC_LIFETIME 1 // Check packet lifetime of 4 ACs.
//#define CONFIG_CONCURRENT_MODE 1
#ifdef CONFIG_CONCURRENT_MODE
#define CONFIG_TSF_RESET_OFFLOAD 1 // For 2 PORT TSF SYNC.
//#define CONFIG_HWPORT_SWAP //Port0->Sec , Port1 -> Pri
//#define CONFIG_STA_MODE_SCAN_UNDER_AP_MODE
//#define CONFIG_MULTI_VIR_IFACES //besides primary&secondary interfaces, extend to support more interfaces
#endif // CONFIG_CONCURRENT_MODE
#define CONFIG_80211D
/*
* Interface Related Config
*/
//#define CONFIG_USB_ONE_OUT_EP
//#define CONFIG_USB_INTERRUPT_IN_PIPE 1
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#define CONFIG_USB_TX_AGGREGATION 1
#define CONFIG_USB_RX_AGGREGATION 1
#endif
#define CONFIG_PREALLOC_RECV_SKB 1
//#define CONFIG_REDUCE_USB_TX_INT 1 // Trade-off: Improve performance, but may cause TX URBs blocked by USB Host/Bus driver on few platforms.
//#define CONFIG_EASY_REPLACEMENT 1
/*
* CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now!
*/
//#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1 // Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms.
//#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 // For RX path
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
#undef CONFIG_PREALLOC_RECV_SKB
#endif
/*
* USB VENDOR REQ BUFFER ALLOCATION METHOD
* if not set we'll use function local variable (stack memory)
*/
//#define CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
#define CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
#define CONFIG_USB_VENDOR_REQ_MUTEX
#define CONFIG_VENDOR_REQ_RETRY
//#define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ 1
/*
* HAL Related Config
*/
#define RTL8192C_RX_PACKET_NO_INCLUDE_CRC 1
#define SUPPORTED_BLOCK_IO
#define RTL8192CU_FW_DOWNLOAD_ENABLE 1
#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW 0
#define CONFIG_OUT_EP_WIFI_MODE 0
#define ENABLE_USB_DROP_INCORRECT_OUT 0
#define RTL8192CU_ASIC_VERIFICATION 0 // For ASIC verification.
#define RTL8192CU_ADHOC_WORKAROUND_SETTING 1
#define DISABLE_BB_RF 0
#define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0
#ifdef CONFIG_MP_INCLUDED
#define MP_DRIVER 1
#undef CONFIG_USB_TX_AGGREGATION
#undef CONFIG_USB_RX_AGGREGATION
#else
#define MP_DRIVER 0
#endif
/*
* Platform Related Config
*/
#ifdef CONFIG_PLATFORM_MN10300
#define CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
#if defined (CONFIG_SW_ANTENNA_DIVERSITY)
#undef CONFIG_SW_ANTENNA_DIVERSITY
#define CONFIG_HW_ANTENNA_DIVERSITY
#endif
#endif
#ifdef CONFIG_WISTRON_PLATFORM
#endif
#ifdef CONFIG_PLATFORM_TI_DM365
#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1
#endif
#define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR
/*
* Debug Related Config
*/
//#define CONFIG_DEBUG_RTL871X
#define DBG 0
//#define CONFIG_DEBUG_RTL819X
//#define CONFIG_PROC_DEBUG 1
//#define DBG_IO
//#define DBG_DELAY_OS
//#define DBG_MEM_ALLOC
//#define DBG_IOCTL
//#define DBG_TX
//#define DBG_XMIT_BUF
//#define DBG_TX_DROP_FRAME
//#define DBG_RX_DROP_FRAME
//#define DBG_RX_SEQ
//#define DBG_RX_SIGNAL_DISPLAY_PROCESSING
//#define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap"
//#define DBG_EXPIRATION_CHK
//#define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
//#define DBG_ROAMING_TEST
//#define DBG_HAL_INIT_PROFILING
//#define DBG_MEMORY_LEAK 1
#define DBG_CONFIG_ERROR_DETECT
//#define DBG_CONFIG_ERROR_RESET
//TX use 1 urb
//#define CONFIG_SINGLE_XMIT_BUF
//RX use 1 urb
//#define CONFIG_SINGLE_RECV_BUF
//turn off power tracking when traffic is busy
//#define CONFIG_BUSY_TRAFFIC_SKIP_PWR_TRACK

320
drivers/net/wireless/realtek/rtl8192cu/include/basic_types.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __BASIC_TYPES_H__
#define __BASIC_TYPES_H__
#include <drv_conf.h>
#define SUCCESS 0
#define FAIL (-1)
#ifndef TRUE
#define _TRUE 1
#else
#define _TRUE TRUE
#endif
#ifndef FALSE
#define _FALSE 0
#else
#define _FALSE FALSE
#endif
#ifdef PLATFORM_WINDOWS
typedef signed char s8;
typedef unsigned char u8;
typedef signed short s16;
typedef unsigned short u16;
typedef signed long s32;
typedef unsigned long u32;
typedef unsigned int uint;
typedef signed int sint;
typedef signed long long s64;
typedef unsigned long long u64;
#ifdef NDIS50_MINIPORT
#define NDIS_MAJOR_VERSION 5
#define NDIS_MINOR_VERSION 0
#endif
#ifdef NDIS51_MINIPORT
#define NDIS_MAJOR_VERSION 5
#define NDIS_MINOR_VERSION 1
#endif
typedef NDIS_PROC proc_t;
typedef LONG atomic_t;
#endif
#ifdef PLATFORM_LINUX
#include <linux/types.h>
#define IN
#define OUT
#define VOID void
#define NDIS_OID uint
#define NDIS_STATUS uint
typedef signed int sint;
#ifndef PVOID
typedef void * PVOID;
//#define PVOID (void *)
#endif
#define UCHAR u8
#define USHORT u16
#define UINT u32
#define ULONG u32
typedef void (*proc_t)(void*);
typedef __kernel_size_t SIZE_T;
typedef __kernel_ssize_t SSIZE_T;
#define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field)
#endif
#ifdef PLATFORM_FREEBSD
typedef signed char s8;
typedef unsigned char u8;
typedef signed short s16;
typedef unsigned short u16;
typedef signed int s32;
typedef unsigned int u32;
typedef unsigned int uint;
typedef signed int sint;
typedef long atomic_t;
typedef signed long long s64;
typedef unsigned long long u64;
#define IN
#define OUT
#define VOID void
#define NDIS_OID uint
#define NDIS_STATUS uint
#ifndef PVOID
typedef void * PVOID;
//#define PVOID (void *)
#endif
typedef u32 dma_addr_t;
#define UCHAR u8
#define USHORT u16
#define UINT u32
#define ULONG u32
typedef void (*proc_t)(void*);
typedef unsigned int __kernel_size_t;
typedef int __kernel_ssize_t;
typedef __kernel_size_t SIZE_T;
typedef __kernel_ssize_t SSIZE_T;
#define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field)
#endif
#define MEM_ALIGNMENT_OFFSET (sizeof (SIZE_T))
#define MEM_ALIGNMENT_PADDING (sizeof(SIZE_T) - 1)
#define SIZE_PTR SIZE_T
#define SSIZE_PTR SSIZE_T
//port from fw by thomas
// TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness
/*
* Call endian free function when
* 1. Read/write packet content.
* 2. Before write integer to IO.
* 3. After read integer from IO.
*/
//
// Byte Swapping routine.
//
#define EF1Byte
#define EF2Byte le16_to_cpu
#define EF4Byte le32_to_cpu
//
// Read LE format data from memory
//
#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr)))
#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr)))
#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr)))
//
// Write LE data to memory
//
#define WriteEF1Byte(_ptr, _val) (*((u8 *)(_ptr)))=EF1Byte(_val)
#define WriteEF2Byte(_ptr, _val) (*((u16 *)(_ptr)))=EF2Byte(_val)
#define WriteEF4Byte(_ptr, _val) (*((u32 *)(_ptr)))=EF4Byte(_val)
//
// Example:
// BIT_LEN_MASK_32(0) => 0x00000000
// BIT_LEN_MASK_32(1) => 0x00000001
// BIT_LEN_MASK_32(2) => 0x00000003
// BIT_LEN_MASK_32(32) => 0xFFFFFFFF
//
#define BIT_LEN_MASK_32(__BitLen) \
(0xFFFFFFFF >> (32 - (__BitLen)))
//
// Example:
// BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003
// BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000
//
#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \
(BIT_LEN_MASK_32(__BitLen) << (__BitOffset))
//
// Description:
// Return 4-byte value in host byte ordering from
// 4-byte pointer in litten-endian system.
//
#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
(EF4Byte(*((u32 *)(__pStart))))
//
// Description:
// Translate subfield (continuous bits in little-endian) of 4-byte value in litten byte to
// 4-byte value in host byte ordering.
//
#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
( \
( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \
& \
BIT_LEN_MASK_32(__BitLen) \
)
//
// Description:
// Mask subfield (continuous bits in little-endian) of 4-byte value in litten byte oredering
// and return the result in 4-byte value in host byte ordering.
//
#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
( \
LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
& \
( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \
)
//
// Description:
// Set subfield of little-endian 4-byte value to specified value.
//
#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \
*((u32 *)(__pStart)) = \
EF4Byte( \
LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
| \
( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \
);
#define BIT_LEN_MASK_16(__BitLen) \
(0xFFFF >> (16 - (__BitLen)))
#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
(BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
(EF2Byte(*((u16 *)(__pStart))))
#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
( \
( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \
& \
BIT_LEN_MASK_16(__BitLen) \
)
#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
( \
LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
& \
( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \
)
#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \
*((u16 *)(__pStart)) = \
EF2Byte( \
LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
| \
( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \
);
#define BIT_LEN_MASK_8(__BitLen) \
(0xFF >> (8 - (__BitLen)))
#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
(BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
(EF1Byte(*((u8 *)(__pStart))))
#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
( \
( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \
& \
BIT_LEN_MASK_8(__BitLen) \
)
#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
( \
LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
& \
( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \
)
#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \
*((u8 *)(__pStart)) = \
EF1Byte( \
LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
| \
( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \
);
// Get the N-bytes aligment offset from the current length
#define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment))
typedef unsigned char BOOLEAN,*PBOOLEAN;
#endif //__BASIC_TYPES_H__

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H
#define _LINUX_BYTEORDER_BIG_ENDIAN_H
#ifndef __BIG_ENDIAN
#define __BIG_ENDIAN 4321
#endif
#ifndef __BIG_ENDIAN_BITFIELD
#define __BIG_ENDIAN_BITFIELD
#endif
#include <byteorder/swab.h>
#define __constant_htonl(x) ((__u32)(x))
#define __constant_ntohl(x) ((__u32)(x))
#define __constant_htons(x) ((__u16)(x))
#define __constant_ntohs(x) ((__u16)(x))
#define __constant_cpu_to_le64(x) ___constant_swab64((x))
#define __constant_le64_to_cpu(x) ___constant_swab64((x))
#define __constant_cpu_to_le32(x) ___constant_swab32((x))
#define __constant_le32_to_cpu(x) ___constant_swab32((x))
#define __constant_cpu_to_le16(x) ___constant_swab16((x))
#define __constant_le16_to_cpu(x) ___constant_swab16((x))
#define __constant_cpu_to_be64(x) ((__u64)(x))
#define __constant_be64_to_cpu(x) ((__u64)(x))
#define __constant_cpu_to_be32(x) ((__u32)(x))
#define __constant_be32_to_cpu(x) ((__u32)(x))
#define __constant_cpu_to_be16(x) ((__u16)(x))
#define __constant_be16_to_cpu(x) ((__u16)(x))
#define __cpu_to_le64(x) __swab64((x))
#define __le64_to_cpu(x) __swab64((x))
#define __cpu_to_le32(x) __swab32((x))
#define __le32_to_cpu(x) __swab32((x))
#define __cpu_to_le16(x) __swab16((x))
#define __le16_to_cpu(x) __swab16((x))
#define __cpu_to_be64(x) ((__u64)(x))
#define __be64_to_cpu(x) ((__u64)(x))
#define __cpu_to_be32(x) ((__u32)(x))
#define __be32_to_cpu(x) ((__u32)(x))
#define __cpu_to_be16(x) ((__u16)(x))
#define __be16_to_cpu(x) ((__u16)(x))
#define __cpu_to_le64p(x) __swab64p((x))
#define __le64_to_cpup(x) __swab64p((x))
#define __cpu_to_le32p(x) __swab32p((x))
#define __le32_to_cpup(x) __swab32p((x))
#define __cpu_to_le16p(x) __swab16p((x))
#define __le16_to_cpup(x) __swab16p((x))
#define __cpu_to_be64p(x) (*(__u64*)(x))
#define __be64_to_cpup(x) (*(__u64*)(x))
#define __cpu_to_be32p(x) (*(__u32*)(x))
#define __be32_to_cpup(x) (*(__u32*)(x))
#define __cpu_to_be16p(x) (*(__u16*)(x))
#define __be16_to_cpup(x) (*(__u16*)(x))
#define __cpu_to_le64s(x) __swab64s((x))
#define __le64_to_cpus(x) __swab64s((x))
#define __cpu_to_le32s(x) __swab32s((x))
#define __le32_to_cpus(x) __swab32s((x))
#define __cpu_to_le16s(x) __swab16s((x))
#define __le16_to_cpus(x) __swab16s((x))
#define __cpu_to_be64s(x) do {} while (0)
#define __be64_to_cpus(x) do {} while (0)
#define __cpu_to_be32s(x) do {} while (0)
#define __be32_to_cpus(x) do {} while (0)
#define __cpu_to_be16s(x) do {} while (0)
#define __be16_to_cpus(x) do {} while (0)
#include <byteorder/generic.h>
#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_GENERIC_H
#define _LINUX_BYTEORDER_GENERIC_H
/*
* linux/byteorder_generic.h
* Generic Byte-reordering support
*
* Francois-Rene Rideau <fare@tunes.org> 19970707
* gathered all the good ideas from all asm-foo/byteorder.h into one file,
* cleaned them up.
* I hope it is compliant with non-GCC compilers.
* I decided to put __BYTEORDER_HAS_U64__ in byteorder.h,
* because I wasn't sure it would be ok to put it in types.h
* Upgraded it to 2.1.43
* Francois-Rene Rideau <fare@tunes.org> 19971012
* Upgraded it to 2.1.57
* to please Linus T., replaced huge #ifdef's between little/big endian
* by nestedly #include'd files.
* Francois-Rene Rideau <fare@tunes.org> 19971205
* Made it to 2.1.71; now a facelift:
* Put files under include/linux/byteorder/
* Split swab from generic support.
*
* TODO:
* = Regular kernel maintainers could also replace all these manual
* byteswap macros that remain, disseminated among drivers,
* after some grep or the sources...
* = Linus might want to rename all these macros and files to fit his taste,
* to fit his personal naming scheme.
* = it seems that a few drivers would also appreciate
* nybble swapping support...
* = every architecture could add their byteswap macro in asm/byteorder.h
* see how some architectures already do (i386, alpha, ppc, etc)
* = cpu_to_beXX and beXX_to_cpu might some day need to be well
* distinguished throughout the kernel. This is not the case currently,
* since little endian, big endian, and pdp endian machines needn't it.
* But this might be the case for, say, a port of Linux to 20/21 bit
* architectures (and F21 Linux addict around?).
*/
/*
* The following macros are to be defined by <asm/byteorder.h>:
*
* Conversion of long and short int between network and host format
* ntohl(__u32 x)
* ntohs(__u16 x)
* htonl(__u32 x)
* htons(__u16 x)
* It seems that some programs (which? where? or perhaps a standard? POSIX?)
* might like the above to be functions, not macros (why?).
* if that's true, then detect them, and take measures.
* Anyway, the measure is: define only ___ntohl as a macro instead,
* and in a separate file, have
* unsigned long inline ntohl(x){return ___ntohl(x);}
*
* The same for constant arguments
* __constant_ntohl(__u32 x)
* __constant_ntohs(__u16 x)
* __constant_htonl(__u32 x)
* __constant_htons(__u16 x)
*
* Conversion of XX-bit integers (16- 32- or 64-)
* between native CPU format and little/big endian format
* 64-bit stuff only defined for proper architectures
* cpu_to_[bl]eXX(__uXX x)
* [bl]eXX_to_cpu(__uXX x)
*
* The same, but takes a pointer to the value to convert
* cpu_to_[bl]eXXp(__uXX x)
* [bl]eXX_to_cpup(__uXX x)
*
* The same, but change in situ
* cpu_to_[bl]eXXs(__uXX x)
* [bl]eXX_to_cpus(__uXX x)
*
* See asm-foo/byteorder.h for examples of how to provide
* architecture-optimized versions
*
*/
#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) || defined(PLATFORM_FREEBSD)
/*
* inside the kernel, we can use nicknames;
* outside of it, we must avoid POSIX namespace pollution...
*/
#define cpu_to_le64 __cpu_to_le64
#define le64_to_cpu __le64_to_cpu
#define cpu_to_le32 __cpu_to_le32
#define le32_to_cpu __le32_to_cpu
#define cpu_to_le16 __cpu_to_le16
#define le16_to_cpu __le16_to_cpu
#define cpu_to_be64 __cpu_to_be64
#define be64_to_cpu __be64_to_cpu
#define cpu_to_be32 __cpu_to_be32
#define be32_to_cpu __be32_to_cpu
#define cpu_to_be16 __cpu_to_be16
#define be16_to_cpu __be16_to_cpu
#define cpu_to_le64p __cpu_to_le64p
#define le64_to_cpup __le64_to_cpup
#define cpu_to_le32p __cpu_to_le32p
#define le32_to_cpup __le32_to_cpup
#define cpu_to_le16p __cpu_to_le16p
#define le16_to_cpup __le16_to_cpup
#define cpu_to_be64p __cpu_to_be64p
#define be64_to_cpup __be64_to_cpup
#define cpu_to_be32p __cpu_to_be32p
#define be32_to_cpup __be32_to_cpup
#define cpu_to_be16p __cpu_to_be16p
#define be16_to_cpup __be16_to_cpup
#define cpu_to_le64s __cpu_to_le64s
#define le64_to_cpus __le64_to_cpus
#define cpu_to_le32s __cpu_to_le32s
#define le32_to_cpus __le32_to_cpus
#define cpu_to_le16s __cpu_to_le16s
#define le16_to_cpus __le16_to_cpus
#define cpu_to_be64s __cpu_to_be64s
#define be64_to_cpus __be64_to_cpus
#define cpu_to_be32s __cpu_to_be32s
#define be32_to_cpus __be32_to_cpus
#define cpu_to_be16s __cpu_to_be16s
#define be16_to_cpus __be16_to_cpus
#endif
/*
* Handle ntohl and suches. These have various compatibility
* issues - like we want to give the prototype even though we
* also have a macro for them in case some strange program
* wants to take the address of the thing or something..
*
* Note that these used to return a "long" in libc5, even though
* long is often 64-bit these days.. Thus the casts.
*
* They have to be macros in order to do the constant folding
* correctly - if the argument passed into a inline function
* it is no longer constant according to gcc..
*/
#undef ntohl
#undef ntohs
#undef htonl
#undef htons
/*
* Do the prototypes. Somebody might want to take the
* address or some such sick thing..
*/
#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2)
extern __u32 ntohl(__u32);
extern __u32 htonl(__u32);
#else //defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2)
#ifndef PLATFORM_FREEBSD
extern unsigned long int ntohl(unsigned long int);
extern unsigned long int htonl(unsigned long int);
#endif
#endif
#ifndef PLATFORM_FREEBSD
extern unsigned short int ntohs(unsigned short int);
extern unsigned short int htons(unsigned short int);
#endif
#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) || defined(PLATFORM_MPIXEL)
#define ___htonl(x) __cpu_to_be32(x)
#define ___htons(x) __cpu_to_be16(x)
#define ___ntohl(x) __be32_to_cpu(x)
#define ___ntohs(x) __be16_to_cpu(x)
#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2)
#define htonl(x) ___htonl(x)
#define ntohl(x) ___ntohl(x)
#else
#define htonl(x) ((unsigned long)___htonl(x))
#define ntohl(x) ((unsigned long)___ntohl(x))
#endif
#define htons(x) ___htons(x)
#define ntohs(x) ___ntohs(x)
#endif /* OPTIMIZE */
#if defined (PLATFORM_WINDOWS)
#define htonl(x) __cpu_to_be32(x)
#define ntohl(x) __be32_to_cpu(x)
#define htons(x) __cpu_to_be16(x)
#define ntohs(x) __be16_to_cpu(x)
#endif
#endif /* _LINUX_BYTEORDER_GENERIC_H */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H
#ifndef __LITTLE_ENDIAN
#define __LITTLE_ENDIAN 1234
#endif
#ifndef __LITTLE_ENDIAN_BITFIELD
#define __LITTLE_ENDIAN_BITFIELD
#endif
#include <byteorder/swab.h>
#ifndef __constant_htonl
#define __constant_htonl(x) ___constant_swab32((x))
#define __constant_ntohl(x) ___constant_swab32((x))
#define __constant_htons(x) ___constant_swab16((x))
#define __constant_ntohs(x) ___constant_swab16((x))
#define __constant_cpu_to_le64(x) ((__u64)(x))
#define __constant_le64_to_cpu(x) ((__u64)(x))
#define __constant_cpu_to_le32(x) ((__u32)(x))
#define __constant_le32_to_cpu(x) ((__u32)(x))
#define __constant_cpu_to_le16(x) ((__u16)(x))
#define __constant_le16_to_cpu(x) ((__u16)(x))
#define __constant_cpu_to_be64(x) ___constant_swab64((x))
#define __constant_be64_to_cpu(x) ___constant_swab64((x))
#define __constant_cpu_to_be32(x) ___constant_swab32((x))
#define __constant_be32_to_cpu(x) ___constant_swab32((x))
#define __constant_cpu_to_be16(x) ___constant_swab16((x))
#define __constant_be16_to_cpu(x) ___constant_swab16((x))
#define __cpu_to_le64(x) ((__u64)(x))
#define __le64_to_cpu(x) ((__u64)(x))
#define __cpu_to_le32(x) ((__u32)(x))
#define __le32_to_cpu(x) ((__u32)(x))
#define __cpu_to_le16(x) ((__u16)(x))
#define __le16_to_cpu(x) ((__u16)(x))
#define __cpu_to_be64(x) __swab64((x))
#define __be64_to_cpu(x) __swab64((x))
#define __cpu_to_be32(x) __swab32((x))
#define __be32_to_cpu(x) __swab32((x))
#define __cpu_to_be16(x) __swab16((x))
#define __be16_to_cpu(x) __swab16((x))
#define __cpu_to_le64p(x) (*(__u64*)(x))
#define __le64_to_cpup(x) (*(__u64*)(x))
#define __cpu_to_le32p(x) (*(__u32*)(x))
#define __le32_to_cpup(x) (*(__u32*)(x))
#define __cpu_to_le16p(x) (*(__u16*)(x))
#define __le16_to_cpup(x) (*(__u16*)(x))
#define __cpu_to_be64p(x) __swab64p((x))
#define __be64_to_cpup(x) __swab64p((x))
#define __cpu_to_be32p(x) __swab32p((x))
#define __be32_to_cpup(x) __swab32p((x))
#define __cpu_to_be16p(x) __swab16p((x))
#define __be16_to_cpup(x) __swab16p((x))
#define __cpu_to_le64s(x) do {} while (0)
#define __le64_to_cpus(x) do {} while (0)
#define __cpu_to_le32s(x) do {} while (0)
#define __le32_to_cpus(x) do {} while (0)
#define __cpu_to_le16s(x) do {} while (0)
#define __le16_to_cpus(x) do {} while (0)
#define __cpu_to_be64s(x) __swab64s((x))
#define __be64_to_cpus(x) __swab64s((x))
#define __cpu_to_be32s(x) __swab32s((x))
#define __be32_to_cpus(x) __swab32s((x))
#define __cpu_to_be16s(x) __swab16s((x))
#define __be16_to_cpus(x) __swab16s((x))
#endif // __constant_htonl
#include <byteorder/generic.h>
#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_SWAB_H
#define _LINUX_BYTEORDER_SWAB_H
#if !defined(CONFIG_PLATFORM_MSTAR)
#ifndef __u16
typedef unsigned short __u16;
#endif
#ifndef __u32
typedef unsigned int __u32;
#endif
#ifndef __u8
typedef unsigned char __u8;
#endif
#ifndef __u64
typedef unsigned long long __u64;
#endif
__inline static __u16 ___swab16(__u16 x)
{
__u16 __x = x;
return
((__u16)(
(((__u16)(__x) & (__u16)0x00ffU) << 8) |
(((__u16)(__x) & (__u16)0xff00U) >> 8) ));
}
__inline static __u32 ___swab32(__u32 x)
{
__u32 __x = (x);
return ((__u32)(
(((__u32)(__x) & (__u32)0x000000ffUL) << 24) |
(((__u32)(__x) & (__u32)0x0000ff00UL) << 8) |
(((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) |
(((__u32)(__x) & (__u32)0xff000000UL) >> 24) ));
}
__inline static __u64 ___swab64(__u64 x)
{
__u64 __x = (x);
return
((__u64)( \
(__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \
(__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \
(__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \
(__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) << 8) | \
(__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >> 8) | \
(__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \
(__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \
(__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \
}
#endif // CONFIG_PLATFORM_MSTAR
#ifndef __arch__swab16
__inline static __u16 __arch__swab16(__u16 x)
{
return ___swab16(x);
}
#endif
#ifndef __arch__swab32
__inline static __u32 __arch__swab32(__u32 x)
{
__u32 __tmp = (x) ;
return ___swab32(__tmp);
}
#endif
#ifndef __arch__swab64
__inline static __u64 __arch__swab64(__u64 x)
{
__u64 __tmp = (x) ;
return ___swab64(__tmp);
}
#endif
#ifndef __swab16
#define __swab16(x) __fswab16(x)
#define __swab32(x) __fswab32(x)
#define __swab64(x) __fswab64(x)
#endif // __swab16
#ifdef PLATFORM_FREEBSD
__inline static __u16 __fswab16(__u16 x)
#else
__inline static const __u16 __fswab16(__u16 x)
#endif //PLATFORM_FREEBSD
{
return __arch__swab16(x);
}
#ifdef PLATFORM_FREEBSD
__inline static __u32 __fswab32(__u32 x)
#else
__inline static const __u32 __fswab32(__u32 x)
#endif //PLATFORM_FREEBSD
{
return __arch__swab32(x);
}
#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS)
#define swab16 __swab16
#define swab32 __swab32
#define swab64 __swab64
#define swab16p __swab16p
#define swab32p __swab32p
#define swab64p __swab64p
#define swab16s __swab16s
#define swab32s __swab32s
#define swab64s __swab64s
#endif
#endif /* _LINUX_BYTEORDER_SWAB_H */

156
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_SWABB_H
#define _LINUX_BYTEORDER_SWABB_H
/*
* linux/byteorder/swabb.h
* SWAp Bytes Bizarrely
* swaHHXX[ps]?(foo)
*
* Support for obNUXIous pdp-endian and other bizarre architectures.
* Will Linux ever run on such ancient beasts? if not, this file
* will be but a programming pearl. Still, it's a reminder that we
* shouldn't be making too many assumptions when trying to be portable.
*
*/
/*
* Meaning of the names I chose (vaxlinux people feel free to correct them):
* swahw32 swap 16-bit half-words in a 32-bit word
* swahb32 swap 8-bit halves of each 16-bit half-word in a 32-bit word
*
* No 64-bit support yet. I don't know NUXI conventions for long longs.
* I guarantee it will be a mess when it's there, though :->
* It will be even worse if there are conflicting 64-bit conventions.
* Hopefully, no one ever used 64-bit objects on NUXI machines.
*
*/
#define ___swahw32(x) \
({ \
__u32 __x = (x); \
((__u32)( \
(((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \
(((__u32)(__x) & (__u32)0xffff0000UL) >> 16) )); \
})
#define ___swahb32(x) \
({ \
__u32 __x = (x); \
((__u32)( \
(((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \
(((__u32)(__x) & (__u32)0xff00ff00UL) >> 8) )); \
})
#define ___constant_swahw32(x) \
((__u32)( \
(((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \
(((__u32)(x) & (__u32)0xffff0000UL) >> 16) ))
#define ___constant_swahb32(x) \
((__u32)( \
(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \
(((__u32)(x) & (__u32)0xff00ff00UL) >> 8) ))
/*
* provide defaults when no architecture-specific optimization is detected
*/
#ifndef __arch__swahw32
# define __arch__swahw32(x) ___swahw32(x)
#endif
#ifndef __arch__swahb32
# define __arch__swahb32(x) ___swahb32(x)
#endif
#ifndef __arch__swahw32p
# define __arch__swahw32p(x) __swahw32(*(x))
#endif
#ifndef __arch__swahb32p
# define __arch__swahb32p(x) __swahb32(*(x))
#endif
#ifndef __arch__swahw32s
# define __arch__swahw32s(x) do { *(x) = __swahw32p((x)); } while (0)
#endif
#ifndef __arch__swahb32s
# define __arch__swahb32s(x) do { *(x) = __swahb32p((x)); } while (0)
#endif
/*
* Allow constant folding
*/
#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__)
# define __swahw32(x) \
(__builtin_constant_p((__u32)(x)) ? \
___swahw32((x)) : \
__fswahw32((x)))
# define __swahb32(x) \
(__builtin_constant_p((__u32)(x)) ? \
___swahb32((x)) : \
__fswahb32((x)))
#else
# define __swahw32(x) __fswahw32(x)
# define __swahb32(x) __fswahb32(x)
#endif /* OPTIMIZE */
__inline static__ __const__ __u32 __fswahw32(__u32 x)
{
return __arch__swahw32(x);
}
__inline static__ __u32 __swahw32p(__u32 *x)
{
return __arch__swahw32p(x);
}
__inline static__ void __swahw32s(__u32 *addr)
{
__arch__swahw32s(addr);
}
__inline static__ __const__ __u32 __fswahb32(__u32 x)
{
return __arch__swahb32(x);
}
__inline static__ __u32 __swahb32p(__u32 *x)
{
return __arch__swahb32p(x);
}
__inline static__ void __swahb32s(__u32 *addr)
{
__arch__swahb32s(addr);
}
#ifdef __BYTEORDER_HAS_U64__
/*
* Not supported yet
*/
#endif /* __BYTEORDER_HAS_U64__ */
#if defined(PLATFORM_LINUX)
#define swahw32 __swahw32
#define swahb32 __swahb32
#define swahw32p __swahw32p
#define swahb32p __swahb32p
#define swahw32s __swahw32s
#define swahb32s __swahb32s
#endif
#endif /* _LINUX_BYTEORDER_SWABB_H */

27
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CIRC_BUF_H_
#define __CIRC_BUF_H_ 1
#define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1))
#define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size))
#endif //_CIRC_BUF_H_

35
drivers/net/wireless/realtek/rtl8192cu/include/cmd_osdep.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CMD_OSDEP_H_
#define __CMD_OSDEP_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
extern sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv);
extern sint _rtw_init_evt_priv(struct evt_priv *pevtpriv);
extern void _rtw_free_evt_priv (struct evt_priv *pevtpriv);
extern void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv);
extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj);
extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_CONF_H__
#define __DRV_CONF_H__
#include "autoconf.h"
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
//Older Android kernel doesn't has CONFIG_ANDROID defined,
//add this to force CONFIG_ANDROID defined
#ifdef CONFIG_PLATFORM_ANDROID
#define CONFIG_ANDROID
#endif
#ifdef CONFIG_ANDROID
//Some Android build will restart the UI while non-printable ascii is passed
//between java and c/c++ layer (JNI). We force CONFIG_VALIDATE_SSID
//for Android here. If you are sure there is no risk on your system about this,
//mask this macro define to support non-printable ascii ssid.
//#define CONFIG_VALIDATE_SSID
//Android expect dbm as the rx signal strength unit
#define CONFIG_SIGNAL_DISPLAY_DBM
#endif
#if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE)
#warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically"
#undef CONFIG_RESUME_IN_WORKQUEUE
#endif
#if defined(CONFIG_ANDROID_POWER) && defined (CONFIG_RESUME_IN_WORKQUEUE)
#warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically"
#undef CONFIG_RESUME_IN_WORKQUEUE
#endif
#ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this...
#if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER)
#error "enable CONFIG_RESUME_IN_WORKQUEUE without CONFIG_WAKELOCK or CONFIG_ANDROID_POWER will suffer from the danger of wifi's unfunctionality..."
#error "If you still want to enable CONFIG_RESUME_IN_WORKQUEUE in this case, mask this preprossor checking and GOOD LUCK..."
#endif
#endif
//About USB VENDOR REQ
#if defined(CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX)
#warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC automatically"
#define CONFIG_USB_VENDOR_REQ_MUTEX
#endif
#if defined(CONFIG_VENDOR_REQ_RETRY) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX)
#warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_VENDOR_REQ_RETRY automatically"
#define CONFIG_USB_VENDOR_REQ_MUTEX
#endif
//#include <rtl871x_byteorder.h>
#endif // __DRV_CONF_H__

661
drivers/net/wireless/realtek/rtl8192cu/include/drv_types.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*-------------------------------------------------------------------------------
For type defines and data structure defines
--------------------------------------------------------------------------------*/
#ifndef __DRV_TYPES_H__
#define __DRV_TYPES_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <wlan_bssdef.h>
#ifdef PLATFORM_OS_XP
#include <drv_types_xp.h>
#endif
#ifdef PLATFORM_OS_CE
#include <drv_types_ce.h>
#endif
#ifdef PLATFORM_LINUX
#include <drv_types_linux.h>
#endif
enum _NIC_VERSION {
RTL8711_NIC,
RTL8712_NIC,
RTL8713_NIC,
RTL8716_NIC
};
enum{
UP_LINK,
DOWN_LINK,
};
typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER;
#ifdef CONFIG_80211N_HT
#include <rtw_ht.h>
#endif
#include <rtw_cmd.h>
#include <wlan_bssdef.h>
#include <rtw_security.h>
#include <rtw_xmit.h>
#include <rtw_recv.h>
#include <hal_intf.h>
#include <hal_com.h>
#include <rtw_qos.h>
#include <rtw_pwrctrl.h>
#include <rtw_io.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
#include <rtw_mlme.h>
#include <rtw_debug.h>
#include <rtw_rf.h>
#include <rtw_event.h>
#include <rtw_led.h>
#include <rtw_mlme_ext.h>
#include <rtw_p2p.h>
#include <rtw_tdls.h>
#include <rtw_ap.h>
#ifdef CONFIG_DRVEXT_MODULE
#include <drvext_api.h>
#endif
#ifdef CONFIG_MP_INCLUDED
#include <rtw_mp.h>
#endif
#ifdef CONFIG_BR_EXT
#include <rtw_br_ext.h>
#endif // CONFIG_BR_EXT
#ifdef CONFIG_IOCTL_CFG80211
#include "ioctl_cfg80211.h"
#endif //CONFIG_IOCTL_CFG80211
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_ENABLE_PS BIT(2)
#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct specific_device_id{
u32 flags;
u16 idVendor;
u16 idProduct;
};
struct registry_priv
{
u8 chip_version;
u8 rfintfs;
u8 lbkmode;
u8 hci;
NDIS_802_11_SSID ssid;
u8 network_mode; //infra, ad-hoc, auto
u8 channel;//ad-hoc support requirement
u8 wireless_mode;//A, B, G, auto
u8 scan_mode;//active, passive
u8 radio_enable;
u8 preamble;//long, short, auto
u8 vrtl_carrier_sense;//Enable, Disable, Auto
u8 vcs_type;//RTS/CTS, CTS-to-self
u16 rts_thresh;
u16 frag_thresh;
u8 adhoc_tx_pwr;
u8 soft_ap;
u8 power_mgnt;
u8 ips_mode;
u8 smart_ps;
u8 long_retry_lmt;
u8 short_retry_lmt;
u16 busy_thresh;
u8 ack_policy;
u8 mp_mode;
u8 software_encrypt;
u8 software_decrypt;
u8 acm_method;
//UAPSD
u8 wmm_enable;
u8 uapsd_enable;
u8 uapsd_max_sp;
u8 uapsd_acbk_en;
u8 uapsd_acbe_en;
u8 uapsd_acvi_en;
u8 uapsd_acvo_en;
WLAN_BSSID_EX dev_network;
#ifdef CONFIG_80211N_HT
u8 ht_enable;
u8 cbw40_enable;
u8 ampdu_enable;//for tx
u8 rx_stbc;
u8 ampdu_amsdu;//A-MPDU Supports A-MSDU is permitted
#endif
u8 lowrate_two_xmit;
u8 rf_config ;
u8 low_power ;
u8 wifi_spec;// !turbo_mode
u8 channel_plan;
#ifdef CONFIG_BT_COEXIST
u8 bt_iso;
u8 bt_sco;
u8 bt_ampdu;
#endif
BOOLEAN bAcceptAddbaReq;
u8 antdiv_cfg;
u8 usbss_enable;//0:disable,1:enable
u8 hwpdn_mode;//0:disable,1:enable,2:decide by EFUSE config
u8 hwpwrp_detect;//0:disable,1:enable
u8 hw_wps_pbc;//0:disable,1:enable
#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
char adaptor_info_caching_file_path[PATH_LENGTH_MAX];
#endif
#ifdef CONFIG_LAYER2_ROAMING
u8 max_roaming_times; // the max number driver will try to roaming
#endif
#ifdef CONFIG_IOL
bool force_iol; //enable iol without other concern
#endif
u8 special_rf_path; //0: 2T2R ,1: only turn on path A 1T1R, 2: only turn on path B 1T1R
u8 mac_phy_mode; //0:by efuse, 1:smsp, 2:dmdp, 3:dmsp.
#ifdef CONFIG_80211D
u8 enable80211d;
#endif
u8 ifname[16];
u8 if2name[16];
u8 notch_filter;
#ifdef CONFIG_MULTI_VIR_IFACES
u8 ext_iface_num;//primary/secondary iface is excluded
#endif
};
//For registry parameters
#define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv,field))
#define RGTRY_SZ(field) sizeof(((struct registry_priv*) 0)->field)
#define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX,field))
#define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field)
#define MAX_CONTINUAL_URB_ERR 4
#ifdef CONFIG_SDIO_HCI
#include <drv_types_sdio.h>
#define INTF_DATA SDIO_DATA
#endif
#define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->if1)
#define GET_IFACE_NUMS(padapter) (((_adapter *)padapter)->dvobj->iface_nums)
#define GET_ADAPTER(padapter, iface_id) (((_adapter *)padapter)->dvobj->padapters[iface_id])
enum _IFACE_ID {
IFACE_ID0, //maping to PRIMARY_ADAPTER
IFACE_ID1, //maping to SECONDARY_ADAPTER
IFACE_ID2,
IFACE_ID3,
IFACE_ID_MAX,
};
struct dvobj_priv
{
_adapter *if1; //PRIMARY_ADAPTER
_adapter *if2; //SECONDARY_ADAPTER
s32 processing_dev_remove;
//for local/global synchronization
_mutex hw_init_mutex;
_mutex h2c_fwcmd_mutex;
_mutex setch_mutex;
_mutex setbw_mutex;
unsigned char oper_channel; //saved channel info when call set_channel_bw
unsigned char oper_bwmode;
unsigned char oper_ch_offset;//PRIME_CHNL_OFFSET
u32 on_oper_ch_time;
//extend to support mulitu interface
//padapters[IFACE_ID0] == if1
//padapters[IFACE_ID1] == if2
_adapter *padapters[IFACE_ID_MAX];
u8 iface_nums; // total number of ifaces used runtime
//For 92D, DMDP have 2 interface.
u8 InterfaceNumber;
u8 NumInterfaces;
u8 DualMacMode;
u8 irq_alloc;
/*-------- below is for SDIO INTERFACE --------*/
#ifdef INTF_DATA
INTF_DATA intf_data;
#endif
/*-------- below is for USB INTERFACE --------*/
#ifdef CONFIG_USB_HCI
u8 nr_endpoint;
u8 ishighspeed;
u8 RtNumInPipes;
u8 RtNumOutPipes;
int ep_num[5]; //endpoint number
int RegUsbSS;
_sema usb_suspend_sema;
#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
_mutex usb_vendor_req_mutex;
#endif
#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
u8 * usb_alloc_vendor_req_buf;
u8 * usb_vendor_req_buf;
#endif
#ifdef PLATFORM_WINDOWS
//related device objects
PDEVICE_OBJECT pphysdevobj;//pPhysDevObj;
PDEVICE_OBJECT pfuncdevobj;//pFuncDevObj;
PDEVICE_OBJECT pnextdevobj;//pNextDevObj;
u8 nextdevstacksz;//unsigned char NextDeviceStackSize; //= (CHAR)CEdevice->pUsbDevObj->StackSize + 1;
//urb for control diescriptor request
#ifdef PLATFORM_OS_XP
struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb;
PUSB_CONFIGURATION_DESCRIPTOR pconfig_descriptor;//UsbConfigurationDescriptor;
#endif
#ifdef PLATFORM_OS_CE
WCHAR active_path[MAX_ACTIVE_REG_PATH]; // adapter regpath
USB_EXTENSION usb_extension;
_nic_hdl pipehdls_r8192c[0x10];
#endif
u32 config_descriptor_len;//ULONG UsbConfigurationDescriptorLength;
#endif//PLATFORM_WINDOWS
#ifdef PLATFORM_LINUX
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
#endif//PLATFORM_LINUX
#ifdef PLATFORM_FREEBSD
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
#endif//PLATFORM_FREEBSD
ATOMIC_T continual_urb_error;
#endif//CONFIG_USB_HCI
/*-------- below is for PCIE INTERFACE --------*/
#ifdef CONFIG_PCI_HCI
#ifdef PLATFORM_LINUX
struct pci_dev *ppcidev;
//PCI MEM map
unsigned long pci_mem_end; /* shared mem end */
unsigned long pci_mem_start; /* shared mem start */
//PCI IO map
unsigned long pci_base_addr; /* device I/O address */
//PciBridge
struct pci_priv pcipriv;
u16 irqline;
u8 irq_enabled;
RT_ISR_CONTENT isr_content;
_lock irq_th_lock;
//ASPM
u8 const_pci_aspm;
u8 const_amdpci_aspm;
u8 const_hwsw_rfoff_d3;
u8 const_support_pciaspm;
// pci-e bridge */
u8 const_hostpci_aspm_setting;
// pci-e device */
u8 const_devicepci_aspm_setting;
u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
u8 b_support_backdoor;
u8 bdma64;
#endif//PLATFORM_LINUX
#endif//CONFIG_PCI_HCI
};
#ifdef PLATFORM_LINUX
static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
{
/* todo: get interface type from dvobj and the return the dev accordingly */
#ifdef RTW_DVOBJ_CHIP_HW_TYPE
#endif
#ifdef CONFIG_USB_HCI
return &dvobj->pusbintf->dev;
#endif
#ifdef CONFIG_SDIO_HCI
return &dvobj->intf_data.func->dev;
#endif
#ifdef CONFIG_PCI_HCI
return &dvobj->ppcidev->dev;
#endif
}
#endif
enum _IFACE_TYPE {
IFACE_PORT0, //mapping to port0 for C/D series chips
IFACE_PORT1, //mapping to port1 for C/D series chip
MAX_IFACE_PORT,
};
enum _ADAPTER_TYPE {
PRIMARY_ADAPTER,
SECONDARY_ADAPTER,
MAX_ADAPTER = 0xFF,
};
typedef enum _DRIVER_STATE{
DRIVER_NORMAL = 0,
DRIVER_DISAPPEAR = 1,
DRIVER_REPLACE_DONGLE = 2,
}DRIVER_STATE;
#ifdef CONFIG_INTEL_PROXIM
struct proxim {
bool proxim_support;
bool proxim_on;
void *proximity_priv;
int (*proxim_rx)(_adapter *padapter,
union recv_frame *precv_frame);
u8 (*proxim_get_var)(_adapter* padapter, u8 type);
};
#endif //CONFIG_INTEL_PROXIM
#ifdef RTL8723A_SDIO_LOOPBACK
typedef struct loopbackdata
{
_sema sema;
_thread_hdl_ lbkthread;
u8 bstop;
u32 cnt;
u16 size;
u16 txsize;
u8 txbuf[0x8000];
u16 rxsize;
u8 rxbuf[0x8000];
u8 msg[100];
}LOOPBACKDATA, *PLOOPBACKDATA;
#endif
struct _ADAPTER{
int DriverState;// for disable driver using module, use dongle to replace module.
int pid[3];//process id from UI, 0:wps, 1:hostapd, 2:dhcpcd
int bDongle;//build-in module or external dongle
u16 chip_type;
u16 HardwareType;
u16 interface_type;//USB,SDIO,PCI
struct dvobj_priv *dvobj;
struct mlme_priv mlmepriv;
struct mlme_ext_priv mlmeextpriv;
struct cmd_priv cmdpriv;
struct evt_priv evtpriv;
//struct io_queue *pio_queue;
struct io_priv iopriv;
struct xmit_priv xmitpriv;
struct recv_priv recvpriv;
struct sta_priv stapriv;
struct security_priv securitypriv;
_lock security_key_mutex; // add for CONFIG_IEEE80211W, none 11w also can use
struct registry_priv registrypriv;
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
#ifdef CONFIG_MP_INCLUDED
struct mp_priv mppriv;
#endif
#ifdef CONFIG_DRVEXT_MODULE
struct drvext_priv drvextpriv;
#endif
#ifdef CONFIG_AP_MODE
struct hostapd_priv *phostapdpriv;
#endif
#ifdef CONFIG_IOCTL_CFG80211
#ifdef CONFIG_P2P
struct cfg80211_wifidirect_info cfg80211_wdinfo;
#endif //CONFIG_P2P
#endif //CONFIG_IOCTL_CFG80211
u32 setband;
#ifdef CONFIG_P2P
struct wifidirect_info wdinfo;
#endif //CONFIG_P2P
#ifdef CONFIG_TDLS
struct tdls_info tdlsinfo;
#endif //CONFIG_TDLS
#ifdef CONFIG_WFD
struct wifi_display_info wfd_info;
#endif //CONFIG_WFD
PVOID HalData;
u32 hal_data_sz;
struct hal_ops HalFunc;
#ifdef CONFIG_BT_COEXIST
//struct btcoexist_priv bt_coexist;
#endif
s32 bDriverStopped;
s32 bSurpriseRemoved;
s32 bCardDisableWOHSM;
u32 IsrContent;
u32 ImrContent;
u8 EepromAddressSize;
u8 hw_init_completed;
u8 bDriverIsGoingToUnload;
u8 init_adpt_in_progress;
u8 bHaltInProgress;
_thread_hdl_ cmdThread;
_thread_hdl_ evtThread;
_thread_hdl_ xmitThread;
_thread_hdl_ recvThread;
#ifndef PLATFORM_LINUX
NDIS_STATUS (*dvobj_init)(struct dvobj_priv *dvobj);
void (*dvobj_deinit)(struct dvobj_priv *dvobj);
#endif
void (*intf_start)(_adapter * adapter);
void (*intf_stop)(_adapter * adapter);
#ifdef PLATFORM_WINDOWS
_nic_hdl hndis_adapter;//hNdisAdapter(NDISMiniportAdapterHandle);
_nic_hdl hndis_config;//hNdisConfiguration;
NDIS_STRING fw_img;
u32 NdisPacketFilter;
u8 MCList[MAX_MCAST_LIST_NUM][6];
u32 MCAddrCount;
#endif //end of PLATFORM_WINDOWS
#ifdef PLATFORM_LINUX
_nic_hdl pnetdev;
// used by rtw_rereg_nd_name related function
struct rereg_nd_name_data {
_nic_hdl old_pnetdev;
char old_ifname[IFNAMSIZ];
u8 old_ips_mode;
u8 old_bRegUseLed;
} rereg_nd_name_priv;
int bup;
struct net_device_stats stats;
struct iw_statistics iwstats;
struct proc_dir_entry *dir_dev;// for proc directory
#ifdef CONFIG_IOCTL_CFG80211
struct wireless_dev *rtw_wdev;
#endif //CONFIG_IOCTL_CFG80211
#endif //end of PLATFORM_LINUX
#ifdef PLATFORM_FREEBSD
_nic_hdl pifp;
int bup;
_lock glock;
#endif //PLATFORM_FREEBSD
int net_closed;
u8 bFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
u8 bRxRSSIDisplay;
// Added by Albert 2012/07/26
// The driver will write the initial gain everytime when running in the DM_Write_DIG function.
u8 bForceWriteInitGain;
// Added by Albert 2012/10/26
// The driver will show up the desired channel number when this flag is 1.
u8 bNotifyChannelChange;
#ifdef CONFIG_P2P
// Added by Albert 2012/12/06
// The driver will show the current P2P status when the upper application reads it.
u8 bShowGetP2PState;
#endif
#ifdef CONFIG_AUTOSUSPEND
u8 bDisableAutosuspend;
#endif
//pbuddy_adapter is used only in two inteface case, (iface_nums=2 in struct dvobj_priv)
//PRIMARY_ADAPTER's buddy is SECONDARY_ADAPTER
//SECONDARY_ADAPTER's buddy is PRIMARY_ADAPTER
//for iface_id > SECONDARY_ADAPTER(IFACE_ID1), refer to padapters[iface_id] in struct dvobj_priv
//and their pbuddy_adapter is PRIMARY_ADAPTER.
//for PRIMARY_ADAPTER(IFACE_ID0) can directly refer to if1 in struct dvobj_priv
_adapter *pbuddy_adapter;
#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT)
u8 isprimary; //is primary adapter or not
//notes:
// if isprimary is true, the adapter_type value is 0, iface_id is IFACE_ID0 for PRIMARY_ADAPTER
// if isprimary is false, the adapter_type value is 1, iface_id is IFACE_ID1 for SECONDARY_ADAPTER
// refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff.
u8 adapter_type;//used only in two inteface case(PRIMARY_ADAPTER and SECONDARY_ADAPTER) .
u8 iface_type; //interface port type, it depends on HW port
#endif
//extend to support multi interface
//IFACE_ID0 is equals to PRIMARY_ADAPTER
//IFACE_ID1 is equals to SECONDARY_ADAPTER
u8 iface_id;
#ifdef CONFIG_DUALMAC_CONCURRENT
u8 DualMacConcurrent; // 1: DMSP 0:DMDP
#endif
#ifdef CONFIG_BR_EXT
_lock br_ext_lock;
//unsigned int macclone_completed;
struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
int pppoe_connection_in_progress;
unsigned char pppoe_addr[MACADDRLEN];
unsigned char scdb_mac[MACADDRLEN];
unsigned char scdb_ip[4];
struct nat25_network_db_entry *scdb_entry;
unsigned char br_mac[MACADDRLEN];
unsigned char br_ip[4];
struct br_ext_info ethBrExtInfo;
#endif // CONFIG_BR_EXT
#ifdef CONFIG_INTEL_PROXIM
/* intel Proximity, should be alloc mem
* in intel Proximity module and can only
* be used in intel Proximity mode */
struct proxim proximity;
#endif //CONFIG_INTEL_PROXIM
#ifdef RTL8723A_SDIO_LOOPBACK
PLOOPBACKDATA ploopback;
#endif
};
#define adapter_to_dvobj(adapter) (adapter->dvobj)
int rtw_handle_dualmac(_adapter *adapter, bool init);
__inline static u8 *myid(struct eeprom_priv *peepriv)
{
return (peepriv->mac_addr);
}
#endif //__DRV_TYPES_H__

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_CE_H__
#define __DRV_TYPES_CE_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <Sdcardddk.h>
#define MAX_ACTIVE_REG_PATH 256
#define MAX_MCAST_LIST_NUM 32
//for ioctl
#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer)
#define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h
#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h
#define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h
#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h
#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h
typedef struct _MP_REG_ENTRY
{
NDIS_STRING RegName; // variable name text
BOOLEAN bRequired; // 1 -> required, 0 -> optional
u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString
uint FieldOffset; // offset to MP_ADAPTER field
uint FieldSize; // size (in bytes) of the field
#ifdef UNDER_AMD64
u64 Default;
#else
u32 Default; // default value to use
#endif
u32 Min; // minimum value allowed
u32 Max; // maximum value allowed
} MP_REG_ENTRY, *PMP_REG_ENTRY;
#ifdef CONFIG_USB_HCI
typedef struct _USB_EXTENSION {
LPCUSB_FUNCS _lpUsbFuncs;
USB_HANDLE _hDevice;
PVOID pAdapter;
#if 0
USB_ENDPOINT_DESCRIPTOR _endpACLIn;
USB_ENDPOINT_DESCRIPTOR _endpACLOutHigh;
USB_ENDPOINT_DESCRIPTOR _endpACLOutNormal;
USB_PIPE pPipeIn;
USB_PIPE pPipeOutNormal;
USB_PIPE pPipeOutHigh;
#endif
} USB_EXTENSION, *PUSB_EXTENSION;
#endif
typedef struct _OCTET_STRING{
u8 *Octet;
u16 Length;
} OCTET_STRING, *POCTET_STRING;
#endif

24
drivers/net/wireless/realtek/rtl8192cu/include/drv_types_linux.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_LINUX_H__
#define __DRV_TYPES_LINUX_H__
#endif

69
drivers/net/wireless/realtek/rtl8192cu/include/drv_types_sdio.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_SDIO_H__
#define __DRV_TYPES_SDIO_H__
#include <drv_conf.h>
#include <basic_types.h>
// SDIO Header Files
#ifdef PLATFORM_LINUX
#include <linux/mmc/sdio_func.h>
#endif
#ifdef PLATFORM_OS_XP
#include <wdm.h>
#include <ntddsd.h>
#endif
#ifdef PLATFORM_OS_CE
#include <sdcardddk.h>
#endif
typedef struct sdio_data
{
u8 func_number;
u8 tx_block_mode;
u8 rx_block_mode;
u32 block_transfer_len;
#ifdef PLATFORM_LINUX
struct sdio_func *func;
#endif
#ifdef PLATFORM_OS_XP
PDEVICE_OBJECT pphysdevobj;
PDEVICE_OBJECT pfuncdevobj;
PDEVICE_OBJECT pnextdevobj;
SDBUS_INTERFACE_STANDARD sdbusinft;
u8 nextdevstacksz;
#endif
#ifdef PLATFORM_OS_CE
SD_DEVICE_HANDLE hDevice;
SD_CARD_RCA sd_rca;
SD_CARD_INTERFACE card_intf;
BOOLEAN enableIsarWithStatus;
WCHAR active_path[MAX_ACTIVE_REG_PATH];
SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap;
#endif
} SDIO_DATA, *PSDIO_DATA;
#endif

94
drivers/net/wireless/realtek/rtl8192cu/include/drv_types_xp.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_XP_H__
#define __DRV_TYPES_XP_H__
#include <drv_conf.h>
#include <osdep_service.h>
#define MAX_MCAST_LIST_NUM 32
//for ioctl
#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer)
#define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h
#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h
#define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h
#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h
#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h
#undef ON_VISTA
//added by Jackson
#ifndef ON_VISTA
//
// Bus driver versions
//
#define SDBUS_DRIVER_VERSION_1 0x100
#define SDBUS_DRIVER_VERSION_2 0x200
#define SDP_FUNCTION_TYPE 4
#define SDP_BUS_DRIVER_VERSION 5
#define SDP_BUS_WIDTH 6
#define SDP_BUS_CLOCK 7
#define SDP_BUS_INTERFACE_CONTROL 8
#define SDP_HOST_BLOCK_LENGTH 9
#define SDP_FUNCTION_BLOCK_LENGTH 10
#define SDP_FN0_BLOCK_LENGTH 11
#define SDP_FUNCTION_INT_ENABLE 12
#endif
typedef struct _MP_REG_ENTRY
{
NDIS_STRING RegName; // variable name text
BOOLEAN bRequired; // 1 -> required, 0 -> optional
u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString
uint FieldOffset; // offset to MP_ADAPTER field
uint FieldSize; // size (in bytes) of the field
#ifdef UNDER_AMD64
u64 Default;
#else
u32 Default; // default value to use
#endif
u32 Min; // minimum value allowed
u32 Max; // maximum value allowed
} MP_REG_ENTRY, *PMP_REG_ENTRY;
typedef struct _OCTET_STRING{
u8 *Octet;
u16 Length;
} OCTET_STRING, *POCTET_STRING;
#endif

41
drivers/net/wireless/realtek/rtl8192cu/include/ethernet.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*! \file */
#ifndef __INC_ETHERNET_H
#define __INC_ETHERNET_H
#define ETHERNET_ADDRESS_LENGTH 6 //!< Ethernet Address Length
#define ETHERNET_HEADER_SIZE 14 //!< Ethernet Header Length
#define LLC_HEADER_SIZE 6 //!< LLC Header Length
#define TYPE_LENGTH_FIELD_SIZE 2 //!< Type/Length Size
#define MINIMUM_ETHERNET_PACKET_SIZE 60 //!< Minimum Ethernet Packet Size
#define MAXIMUM_ETHERNET_PACKET_SIZE 1514 //!< Maximum Ethernet Packet Size
#define RT_ETH_IS_MULTICAST(_pAddr) ((((UCHAR *)(_pAddr))[0]&0x01)!=0) //!< Is Multicast Address?
#define RT_ETH_IS_BROADCAST(_pAddr) ( \
((UCHAR *)(_pAddr))[0]==0xff && \
((UCHAR *)(_pAddr))[1]==0xff && \
((UCHAR *)(_pAddr))[2]==0xff && \
((UCHAR *)(_pAddr))[3]==0xff && \
((UCHAR *)(_pAddr))[4]==0xff && \
((UCHAR *)(_pAddr))[5]==0xff ) //!< Is Broadcast Address?
#endif // #ifndef __INC_ETHERNET_H

35
drivers/net/wireless/realtek/rtl8192cu/include/h2clbk.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _H2CLBK_H_
#include <rtl8711_spec.h>
#include <TypeDef.h>
void _lbk_cmd(PADAPTER Adapter);
void _lbk_rsp(PADAPTER Adapter);
void _lbk_evt(IN PADAPTER Adapter);
void h2c_event_callback(unsigned char *dev, unsigned char *pbuf);

145
drivers/net/wireless/realtek/rtl8192cu/include/hal_com.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_COMMON_H__
#define __HAL_COMMON_H__
//CCK
#define RATE_1M BIT(0)
#define RATE_2M BIT(1)
#define RATE_5_5M BIT(2)
#define RATE_11M BIT(3)
//OFDM
#define RATE_6M BIT(4)
#define RATE_9M BIT(5)
#define RATE_12M BIT(6)
#define RATE_18M BIT(7)
#define RATE_24M BIT(8)
#define RATE_36M BIT(9)
#define RATE_48M BIT(10)
#define RATE_54M BIT(11)
//MCS 1 Spatial Stream
#define RATE_MCS0 BIT(12)
#define RATE_MCS1 BIT(13)
#define RATE_MCS2 BIT(14)
#define RATE_MCS3 BIT(15)
#define RATE_MCS4 BIT(16)
#define RATE_MCS5 BIT(17)
#define RATE_MCS6 BIT(18)
#define RATE_MCS7 BIT(19)
//MCS 2 Spatial Stream
#define RATE_MCS8 BIT(20)
#define RATE_MCS9 BIT(21)
#define RATE_MCS10 BIT(22)
#define RATE_MCS11 BIT(23)
#define RATE_MCS12 BIT(24)
#define RATE_MCS13 BIT(25)
#define RATE_MCS14 BIT(26)
#define RATE_MCS15 BIT(27)
// ALL CCK Rate
#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M
#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\
RATR_36M|RATR_48M|RATR_54M
#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\
RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7
#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11|\
RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
/*------------------------------ Tx Desc definition Macro ------------------------*/
//#pragma mark -- Tx Desc related definition. --
//----------------------------------------------------------------------------
//-----------------------------------------------------------
// Rate
//-----------------------------------------------------------
// CCK Rates, TxHT = 0
#define DESC_RATE1M 0x00
#define DESC_RATE2M 0x01
#define DESC_RATE5_5M 0x02
#define DESC_RATE11M 0x03
// OFDM Rates, TxHT = 0
#define DESC_RATE6M 0x04
#define DESC_RATE9M 0x05
#define DESC_RATE12M 0x06
#define DESC_RATE18M 0x07
#define DESC_RATE24M 0x08
#define DESC_RATE36M 0x09
#define DESC_RATE48M 0x0a
#define DESC_RATE54M 0x0b
// MCS Rates, TxHT = 1
#define DESC_RATEMCS0 0x0c
#define DESC_RATEMCS1 0x0d
#define DESC_RATEMCS2 0x0e
#define DESC_RATEMCS3 0x0f
#define DESC_RATEMCS4 0x10
#define DESC_RATEMCS5 0x11
#define DESC_RATEMCS6 0x12
#define DESC_RATEMCS7 0x13
#define DESC_RATEMCS8 0x14
#define DESC_RATEMCS9 0x15
#define DESC_RATEMCS10 0x16
#define DESC_RATEMCS11 0x17
#define DESC_RATEMCS12 0x18
#define DESC_RATEMCS13 0x19
#define DESC_RATEMCS14 0x1a
#define DESC_RATEMCS15 0x1b
#define DESC_RATEMCS15_SG 0x1c
#define DESC_RATEMCS32 0x20
//============================================================
// Global var
//============================================================
#define OFDM_TABLE_SIZE_92C 37
#define OFDM_TABLE_SIZE_92D 43
#define CCK_TABLE_SIZE 33
extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] ;
extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
#ifdef CONFIG_CHIP_VER_INTEGRATION
void dump_chip_info(HAL_VERSION ChipVersion);
#endif
u8 //return the final channel plan decision
hal_com_get_channel_plan(
IN PADAPTER padapter,
IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom)
IN u8 sw_channel_plan, //channel plan from SW (registry/module param)
IN u8 def_channel_plan, //channel plan used when the former two is invalid
IN BOOLEAN AutoLoadFail
);
void HalSetBrateCfg(
IN PADAPTER Adapter,
IN u8 *mBratesOS,
OUT u16 *pBrateCfg);
u8 MRateToHwRate(u8 rate);
void hal_init_macaddr(_adapter *adapter);
void c2h_evt_clear(_adapter *adapter);
s32 c2h_evt_read(_adapter *adapter, u8 *buf);
#endif //__HAL_COMMON_H__

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drivers/net/wireless/realtek/rtl8192cu/include/hal_intf.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_INTF_H__
#define __HAL_INTF_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef CONFIG_PCI_HCI
#include <pci_hal.h>
#endif
enum RTL871X_HCI_TYPE {
RTW_SDIO,
RTW_USB,
RTW_PCIE
};
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
RTL8712_8188S_8191S_8192S,
RTL8188C_8192C,
RTL8192D,
RTL8723A,
RTL8188E,
MAX_CHIP_TYPE
};
typedef enum _HW_VARIABLES{
HW_VAR_MEDIA_STATUS,
HW_VAR_MEDIA_STATUS1,
HW_VAR_SET_OPMODE,
HW_VAR_MAC_ADDR,
HW_VAR_BSSID,
HW_VAR_INIT_RTS_RATE,
HW_VAR_INIT_DATA_RATE,
HW_VAR_BASIC_RATE,
HW_VAR_TXPAUSE,
HW_VAR_BCN_FUNC,
HW_VAR_CORRECT_TSF,
HW_VAR_CHECK_BSSID,
HW_VAR_MLME_DISCONNECT,
HW_VAR_MLME_SITESURVEY,
HW_VAR_MLME_JOIN,
HW_VAR_ON_RCR_AM,
HW_VAR_OFF_RCR_AM,
HW_VAR_BEACON_INTERVAL,
HW_VAR_SLOT_TIME,
HW_VAR_RESP_SIFS,
HW_VAR_ACK_PREAMBLE,
HW_VAR_SEC_CFG,
HW_VAR_BCN_VALID,
HW_VAR_RF_TYPE,
HW_VAR_DM_FLAG,
HW_VAR_DM_FUNC_OP,
HW_VAR_DM_FUNC_SET,
HW_VAR_DM_FUNC_CLR,
HW_VAR_DM_INIT_PWDB,
HW_VAR_CAM_EMPTY_ENTRY,
HW_VAR_CAM_INVALID_ALL,
HW_VAR_CAM_WRITE,
HW_VAR_CAM_READ,
HW_VAR_AC_PARAM_VO,
HW_VAR_AC_PARAM_VI,
HW_VAR_AC_PARAM_BE,
HW_VAR_AC_PARAM_BK,
HW_VAR_ACM_CTRL,
HW_VAR_AMPDU_MIN_SPACE,
HW_VAR_AMPDU_FACTOR,
HW_VAR_RXDMA_AGG_PG_TH,
HW_VAR_SET_RPWM,
HW_VAR_H2C_FW_PWRMODE,
HW_VAR_H2C_FW_JOINBSSRPT,
HW_VAR_FWLPS_RF_ON,
HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
HW_VAR_TDLS_WRCR,
HW_VAR_TDLS_INIT_CH_SEN,
HW_VAR_TDLS_RS_RCR,
HW_VAR_TDLS_DONE_CH_SEN,
HW_VAR_INITIAL_GAIN,
HW_VAR_TRIGGER_GPIO_0,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
HW_VAR_ANTENNA_DIVERSITY_LINK,
HW_VAR_ANTENNA_DIVERSITY_SELECT,
HW_VAR_SWITCH_EPHY_WoWLAN,
HW_VAR_EFUSE_BYTES,
HW_VAR_FIFO_CLEARN_UP,
HW_VAR_CHECK_TXBUF,
HW_VAR_APFM_ON_MAC, //Auto FSM to Turn On, include clock, isolation, power control for MAC only
HW_VAR_WOWLAN,
HW_VAR_VID,
HW_VAR_PID,
HW_VAR_MBSSID_CAM_WRITE,
HW_VAR_MBSSID_CAM_CLEAR,
HW_VAR_RCR_MBSSID_EN,
HW_VAR_USB_RXAGG_PAGE_TO,
}HW_VARIABLES;
typedef enum _HAL_DEF_VARIABLE{
HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
HAL_DEF_IS_SUPPORT_ANT_DIV,
HAL_DEF_CURRENT_ANTENNA,
HAL_DEF_DRVINFO_SZ,
HAL_DEF_MAX_RECVBUF_SZ,
HAL_DEF_RX_PACKET_OFFSET,
HAL_DEF_DBG_DUMP_RXPKT,//for dbg
HAL_DEF_DBG_DM_FUNC,//for dbg
HAL_DEF_DUAL_MAC_MODE,
}HAL_DEF_VARIABLE;
typedef enum _HAL_INTF_PS_FUNC{
HAL_USB_SELECT_SUSPEND,
HAL_MAX_ID,
}HAL_INTF_PS_FUNC;
typedef s32 (*c2h_id_filter)(u8 id);
struct hal_ops {
u32 (*hal_init)(PADAPTER Adapter);
u32 (*hal_deinit)(PADAPTER Adapter);
void (*free_hal_data)(PADAPTER Adapter);
u32 (*inirp_init)(PADAPTER Adapter);
u32 (*inirp_deinit)(PADAPTER Adapter);
s32 (*init_xmit_priv)(PADAPTER Adapter);
void (*free_xmit_priv)(PADAPTER Adapter);
s32 (*init_recv_priv)(PADAPTER Adapter);
void (*free_recv_priv)(PADAPTER Adapter);
void (*InitSwLeds)(PADAPTER Adapter);
void (*DeInitSwLeds)(PADAPTER Adapter);
void (*dm_init)(PADAPTER Adapter);
void (*dm_deinit)(PADAPTER Adapter);
void (*read_chip_version)(PADAPTER Adapter);
void (*init_default_value)(PADAPTER Adapter);
void (*intf_chip_configure)(PADAPTER Adapter);
void (*read_adapter_info)(PADAPTER Adapter);
void (*enable_interrupt)(PADAPTER Adapter);
void (*disable_interrupt)(PADAPTER Adapter);
s32 (*interrupt_handler)(PADAPTER Adapter);
void (*set_bwmode_handler)(PADAPTER Adapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset);
void (*set_channel_handler)(PADAPTER Adapter, u8 channel);
void (*hal_dm_watchdog)(PADAPTER Adapter);
void (*SetHwRegHandler)(PADAPTER Adapter, u8 variable,u8* val);
void (*GetHwRegHandler)(PADAPTER Adapter, u8 variable,u8* val);
u8 (*GetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
u8 (*SetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
void (*UpdateRAMaskHandler)(PADAPTER Adapter, u32 mac_id);
void (*SetBeaconRelatedRegistersHandler)(PADAPTER Adapter);
void (*Add_RateATid)(PADAPTER Adapter, u32 bitmap, u8 arg);
#ifdef CONFIG_ANTENNA_DIVERSITY
u8 (*AntDivBeforeLinkHandler)(PADAPTER Adapter);
void (*AntDivCompareHandler)(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
#endif
u8 (*interface_ps_func)(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8* val);
s32 (*hal_xmit)(PADAPTER Adapter, struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(PADAPTER Adapter, struct xmit_frame *pmgntframe);
s32 (*hal_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe);
u32 (*read_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask);
void (*write_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask, u32 Data);
u32 (*read_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask);
void (*write_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
#ifdef CONFIG_HOSTAPD_MLME
s32 (*hostap_mgnt_xmit_entry)(PADAPTER Adapter, _pkt *pkt);
#endif
void (*EfusePowerSwitch)(PADAPTER pAdapter, u8 bWrite, u8 PwrState);
void (*ReadEFuse)(PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest);
void (*EFUSEGetEfuseDefinition)(PADAPTER pAdapter, u8 efuseType, u8 type, PVOID *pOut, BOOLEAN bPseudoTest);
u16 (*EfuseGetCurrentSize)(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest);
int (*Efuse_PgPacketRead)(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest);
int (*Efuse_PgPacketWrite)(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
u8 (*Efuse_WordEnableDataWrite)(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
#ifdef DBG_CONFIG_ERROR_DETECT
void (*sreset_init_value)(_adapter *padapter);
void (*sreset_reset_value)(_adapter *padapter);
void (*silentreset)(_adapter *padapter);
void (*sreset_xmit_status_check)(_adapter *padapter);
void (*sreset_linked_status_check) (_adapter *padapter);
u8 (*sreset_get_wifi_status)(_adapter *padapter);
bool (*sreset_inprogress)(_adapter *padapter);
#endif
#ifdef CONFIG_IOL
int (*IOL_exec_cmds_sync)(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms);
#endif
void (*hal_notch_filter)(_adapter * adapter, bool enable);
void (*hal_reset_security_engine)(_adapter * adapter);
s32 (*c2h_handler)(_adapter *padapter, struct c2h_evt_hdr *c2h_evt);
c2h_id_filter c2h_id_filter_ccx;
};
typedef enum _RT_EEPROM_TYPE{
EEPROM_93C46,
EEPROM_93C56,
EEPROM_BOOT_EFUSE,
}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
#define USB_HIGH_SPEED_BULK_SIZE 512
#define USB_FULL_SPEED_BULK_SIZE 64
#define RF_CHANGE_BY_INIT 0
#define RF_CHANGE_BY_IPS BIT28
#define RF_CHANGE_BY_PS BIT29
#define RF_CHANGE_BY_HW BIT30
#define RF_CHANGE_BY_SW BIT31
typedef enum _HARDWARE_TYPE{
HARDWARE_TYPE_RTL8180,
HARDWARE_TYPE_RTL8185,
HARDWARE_TYPE_RTL8187,
HARDWARE_TYPE_RTL8188,
HARDWARE_TYPE_RTL8190P,
HARDWARE_TYPE_RTL8192E,
HARDWARE_TYPE_RTL819xU,
HARDWARE_TYPE_RTL8192SE,
HARDWARE_TYPE_RTL8192SU,
HARDWARE_TYPE_RTL8192CE,
HARDWARE_TYPE_RTL8192CU,
HARDWARE_TYPE_RTL8192DE,
HARDWARE_TYPE_RTL8192DU,
HARDWARE_TYPE_RTL8723AE,
HARDWARE_TYPE_RTL8723AU,
HARDWARE_TYPE_RTL8723AS,
HARDWARE_TYPE_RTL8188EE,
HARDWARE_TYPE_RTL8188EU,
HARDWARE_TYPE_RTL8188ES,
HARDWARE_TYPE_MAX,
}HARDWARE_TYPE;
//
// RTL8192C Series
//
#define IS_HARDWARE_TYPE_8192CE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CE)
#define IS_HARDWARE_TYPE_8192CU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CU)
#define IS_HARDWARE_TYPE_8192C(_Adapter) \
(IS_HARDWARE_TYPE_8192CE(_Adapter) || IS_HARDWARE_TYPE_8192CU(_Adapter))
//
// RTL8192D Series
//
#define IS_HARDWARE_TYPE_8192DE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DE)
#define IS_HARDWARE_TYPE_8192DU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DU)
#define IS_HARDWARE_TYPE_8192D(_Adapter) \
(IS_HARDWARE_TYPE_8192DE(_Adapter) || IS_HARDWARE_TYPE_8192DU(_Adapter))
//
// RTL8723A Series
//
#define IS_HARDWARE_TYPE_8723AE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AE)
#define IS_HARDWARE_TYPE_8723AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AU)
#define IS_HARDWARE_TYPE_8723AS(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AS)
#define IS_HARDWARE_TYPE_8723A(_Adapter) \
(IS_HARDWARE_TYPE_8723AE(_Adapter) || IS_HARDWARE_TYPE_8723AU(_Adapter) || IS_HARDWARE_TYPE_8723AS(_Adapter))
//
// RTL8188E Series
//
#define IS_HARDWARE_TYPE_8188EE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188EE)
#define IS_HARDWARE_TYPE_8188EU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188EU)
#define IS_HARDWARE_TYPE_8188ES(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188ES)
#define IS_HARDWARE_TYPE_8188E(_Adapter) \
(IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter))
typedef struct eeprom_priv EEPROM_EFUSE_PRIV, *PEEPROM_EFUSE_PRIV;
#define GET_EEPROM_EFUSE_PRIV(priv) (&priv->eeprompriv)
#ifdef CONFIG_WOWLAN
typedef enum _wowlan_subcode{
WOWLAN_PATTERN_MATCH = 1,
WOWLAN_MAGIC_PACKET = 2,
WOWLAN_UNICAST = 3,
WOWLAN_SET_PATTERN = 4,
WOWLAN_DUMP_REG = 5,
WOWLAN_ENABLE = 6,
WOWLAN_DISABLE = 7,
WOWLAN_STATUS = 8,
WOWLAN_DEBUG_RELOAD_FW = 9,
WOWLAN_DEBUG_1 =10,
WOWLAN_DEBUG_2 =11
}wowlan_subcode;
struct wowlan_ioctl_param{
unsigned int subcode;
unsigned int subcode_value;
unsigned int wakeup_reason;
unsigned int len;
unsigned char pattern[0];
};
#define Rx_Pairwisekey BIT(0)
#define Rx_GTK BIT(1)
#define Rx_DisAssoc BIT(2)
#define Rx_DeAuth BIT(3)
#define FWDecisionDisconnect BIT(4)
#define Rx_MagicPkt BIT(5)
#define FinishBtFwPatch BIT(7)
#endif // CONFIG_WOWLAN
void rtw_hal_def_value_init(_adapter *padapter);
void rtw_hal_free_data(_adapter *padapter);
void rtw_hal_dm_init(_adapter *padapter);
void rtw_hal_dm_deinit(_adapter *padapter);
void rtw_hal_sw_led_init(_adapter *padapter);
void rtw_hal_sw_led_deinit(_adapter *padapter);
uint rtw_hal_init(_adapter *padapter);
uint rtw_hal_deinit(_adapter *padapter);
void rtw_hal_stop(_adapter *padapter);
void rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val);
void rtw_hal_get_hwreg(PADAPTER padapter, u8 variable, u8 *val);
void rtw_hal_chip_configure(_adapter *padapter);
void rtw_hal_read_chip_info(_adapter *padapter);
void rtw_hal_read_chip_version(_adapter *padapter);
u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
void rtw_hal_enable_interrupt(_adapter *padapter);
void rtw_hal_disable_interrupt(_adapter *padapter);
u32 rtw_hal_inirp_init(_adapter *padapter);
u32 rtw_hal_inirp_deinit(_adapter *padapter);
u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val);
s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
s32 rtw_hal_init_xmit_priv(_adapter *padapter);
void rtw_hal_free_xmit_priv(_adapter *padapter);
s32 rtw_hal_init_recv_priv(_adapter *padapter);
void rtw_hal_free_recv_priv(_adapter *padapter);
void rtw_hal_update_ra_mask(_adapter *padapter, u32 mac_id);
void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8 arg);
void rtw_hal_bcn_related_reg_setting(_adapter *padapter);
u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask);
void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask);
void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
s32 rtw_hal_interrupt_handler(_adapter *padapter);
void rtw_hal_set_bwmode(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset);
void rtw_hal_set_chan(_adapter *padapter, u8 channel);
void rtw_hal_dm_watchdog(_adapter *padapter);
#ifdef CONFIG_ANTENNA_DIVERSITY
u8 rtw_hal_antdiv_before_linked(_adapter *padapter);
void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
#endif
#ifdef CONFIG_HOSTAPD_MLME
s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
#endif
#ifdef DBG_CONFIG_ERROR_DETECT
void rtw_hal_sreset_init(_adapter *padapter);
void rtw_hal_sreset_reset(_adapter *padapter);
void rtw_hal_sreset_reset_value(_adapter *padapter);
void rtw_hal_sreset_xmit_status_check(_adapter *padapter);
void rtw_hal_sreset_linked_status_check(_adapter *padapter);
u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter);
bool rtw_hal_sreset_inprogress(_adapter *padapter);
#endif
#ifdef CONFIG_IOL
int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms);
#endif
void rtw_hal_notch_filter(_adapter * adapter, bool enable);
void rtw_hal_reset_security_engine(_adapter * adapter);
s32 rtw_hal_c2h_handler(_adapter *adapter, struct c2h_evt_hdr *c2h_evt);
c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter);
#endif //__HAL_INTF_H__

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drivers/net/wireless/realtek/rtl8192cu/include/ieee80211.h Normal file
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drivers/net/wireless/realtek/rtl8192cu/include/ieee80211_ext.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __IEEE80211_EXT_H
#define __IEEE80211_EXT_H
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#define WMM_OUI_TYPE 2
#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0
#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1
#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2
#define WMM_VERSION 1
#define WPA_PROTO_WPA BIT(0)
#define WPA_PROTO_RSN BIT(1)
#define WPA_KEY_MGMT_IEEE8021X BIT(0)
#define WPA_KEY_MGMT_PSK BIT(1)
#define WPA_KEY_MGMT_NONE BIT(2)
#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3)
#define WPA_KEY_MGMT_WPA_NONE BIT(4)
#define WPA_CAPABILITY_PREAUTH BIT(0)
#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6)
#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9)
#define PMKID_LEN 16
#ifdef PLATFORM_LINUX
struct wpa_ie_hdr {
u8 elem_id;
u8 len;
u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
u8 version[2]; /* little endian */
}__attribute__ ((packed));
struct rsn_ie_hdr {
u8 elem_id; /* WLAN_EID_RSN */
u8 len;
u8 version[2]; /* little endian */
}__attribute__ ((packed));
struct wme_ac_parameter {
#if defined(CONFIG_LITTLE_ENDIAN)
/* byte 1 */
u8 aifsn:4,
acm:1,
aci:2,
reserved:1;
/* byte 2 */
u8 eCWmin:4,
eCWmax:4;
#elif defined(CONFIG_BIG_ENDIAN)
/* byte 1 */
u8 reserved:1,
aci:2,
acm:1,
aifsn:4;
/* byte 2 */
u8 eCWmax:4,
eCWmin:4;
#else
#error "Please fix <endian.h>"
#endif
/* bytes 3 & 4 */
u16 txopLimit;
} __attribute__ ((packed));
struct wme_parameter_element {
/* required fields for WME version 1 */
u8 oui[3];
u8 oui_type;
u8 oui_subtype;
u8 version;
u8 acInfo;
u8 reserved;
struct wme_ac_parameter ac[4];
} __attribute__ ((packed));
#endif
#ifdef PLATFORM_WINDOWS
#pragma pack(1)
struct wpa_ie_hdr {
u8 elem_id;
u8 len;
u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
u8 version[2]; /* little endian */
};
struct rsn_ie_hdr {
u8 elem_id; /* WLAN_EID_RSN */
u8 len;
u8 version[2]; /* little endian */
};
#pragma pack()
#endif
#define WPA_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
} while (0)
#define WPA_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define WPA_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val))
//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val))
/* Action category code */
enum ieee80211_category {
WLAN_CATEGORY_SPECTRUM_MGMT = 0,
WLAN_CATEGORY_QOS = 1,
WLAN_CATEGORY_DLS = 2,
WLAN_CATEGORY_BACK = 3,
WLAN_CATEGORY_HT = 7,
WLAN_CATEGORY_WMM = 17,
};
/* SPECTRUM_MGMT action code */
enum ieee80211_spectrum_mgmt_actioncode {
WLAN_ACTION_SPCT_MSR_REQ = 0,
WLAN_ACTION_SPCT_MSR_RPRT = 1,
WLAN_ACTION_SPCT_TPC_REQ = 2,
WLAN_ACTION_SPCT_TPC_RPRT = 3,
WLAN_ACTION_SPCT_CHL_SWITCH = 4,
WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5,
};
/* BACK action code */
enum ieee80211_back_actioncode {
WLAN_ACTION_ADDBA_REQ = 0,
WLAN_ACTION_ADDBA_RESP = 1,
WLAN_ACTION_DELBA = 2,
};
/* HT features action code */
enum ieee80211_ht_actioncode {
WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
WLAN_ACTION_SM_PS = 1,
WLAN_ACTION_PSPM = 2,
WLAN_ACTION_PCO_PHASE = 3,
WLAN_ACTION_MIMO_CSI_MX = 4,
WLAN_ACTION_MIMO_NONCP_BF = 5,
WLAN_ACTION_MIMP_CP_BF = 6,
WLAN_ACTION_ASEL_INDICATES_FB = 7,
WLAN_ACTION_HI_INFO_EXCHG = 8,
};
/* BACK (block-ack) parties */
enum ieee80211_back_parties {
WLAN_BACK_RECIPIENT = 0,
WLAN_BACK_INITIATOR = 1,
WLAN_BACK_TIMER = 2,
};
#ifdef PLATFORM_LINUX
struct ieee80211_mgmt {
u16 frame_control;
u16 duration;
u8 da[6];
u8 sa[6];
u8 bssid[6];
u16 seq_ctrl;
union {
struct {
u16 auth_alg;
u16 auth_transaction;
u16 status_code;
/* possibly followed by Challenge text */
u8 variable[0];
} __attribute__ ((packed)) auth;
struct {
u16 reason_code;
} __attribute__ ((packed)) deauth;
struct {
u16 capab_info;
u16 listen_interval;
/* followed by SSID and Supported rates */
u8 variable[0];
} __attribute__ ((packed)) assoc_req;
struct {
u16 capab_info;
u16 status_code;
u16 aid;
/* followed by Supported rates */
u8 variable[0];
} __attribute__ ((packed)) assoc_resp, reassoc_resp;
struct {
u16 capab_info;
u16 listen_interval;
u8 current_ap[6];
/* followed by SSID and Supported rates */
u8 variable[0];
} __attribute__ ((packed)) reassoc_req;
struct {
u16 reason_code;
} __attribute__ ((packed)) disassoc;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params, TIM */
u8 variable[0];
} __attribute__ ((packed)) beacon;
struct {
/* only variable items: SSID, Supported rates */
u8 variable[0];
} __attribute__ ((packed)) probe_req;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params */
u8 variable[0];
} __attribute__ ((packed)) probe_resp;
struct {
u8 category;
union {
struct {
u8 action_code;
u8 dialog_token;
u8 status_code;
u8 variable[0];
} __attribute__ ((packed)) wme_action;
#if 0
struct{
u8 action_code;
u8 element_id;
u8 length;
struct ieee80211_channel_sw_ie sw_elem;
} __attribute__ ((packed)) chan_switch;
struct{
u8 action_code;
u8 dialog_token;
u8 element_id;
u8 length;
struct ieee80211_msrment_ie msr_elem;
} __attribute__ ((packed)) measurement;
#endif
struct{
u8 action_code;
u8 dialog_token;
u16 capab;
u16 timeout;
u16 start_seq_num;
} __attribute__ ((packed)) addba_req;
struct{
u8 action_code;
u8 dialog_token;
u16 status;
u16 capab;
u16 timeout;
} __attribute__ ((packed)) addba_resp;
struct{
u8 action_code;
u16 params;
u16 reason_code;
} __attribute__ ((packed)) delba;
struct{
u8 action_code;
/* capab_info for open and confirm,
* reason for close
*/
u16 aux;
/* Followed in plink_confirm by status
* code, AID and supported rates,
* and directly by supported rates in
* plink_open and plink_close
*/
u8 variable[0];
} __attribute__ ((packed)) plink_action;
struct{
u8 action_code;
u8 variable[0];
} __attribute__ ((packed)) mesh_action;
} __attribute__ ((packed)) u;
} __attribute__ ((packed)) action;
} __attribute__ ((packed)) u;
}__attribute__ ((packed));
#endif
#ifdef PLATFORM_WINDOWS
#pragma pack(1)
struct ieee80211_mgmt {
u16 frame_control;
u16 duration;
u8 da[6];
u8 sa[6];
u8 bssid[6];
u16 seq_ctrl;
union {
struct {
u16 auth_alg;
u16 auth_transaction;
u16 status_code;
/* possibly followed by Challenge text */
u8 variable[0];
} auth;
struct {
u16 reason_code;
} deauth;
struct {
u16 capab_info;
u16 listen_interval;
/* followed by SSID and Supported rates */
u8 variable[0];
} assoc_req;
struct {
u16 capab_info;
u16 status_code;
u16 aid;
/* followed by Supported rates */
u8 variable[0];
} assoc_resp, reassoc_resp;
struct {
u16 capab_info;
u16 listen_interval;
u8 current_ap[6];
/* followed by SSID and Supported rates */
u8 variable[0];
} reassoc_req;
struct {
u16 reason_code;
} disassoc;
#if 0
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params, TIM */
u8 variable[0];
} beacon;
struct {
/* only variable items: SSID, Supported rates */
u8 variable[0];
} probe_req;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params */
u8 variable[0];
} probe_resp;
#endif
struct {
u8 category;
union {
struct {
u8 action_code;
u8 dialog_token;
u8 status_code;
u8 variable[0];
} wme_action;
/*
struct{
u8 action_code;
u8 element_id;
u8 length;
struct ieee80211_channel_sw_ie sw_elem;
} chan_switch;
struct{
u8 action_code;
u8 dialog_token;
u8 element_id;
u8 length;
struct ieee80211_msrment_ie msr_elem;
} measurement;
*/
struct{
u8 action_code;
u8 dialog_token;
u16 capab;
u16 timeout;
u16 start_seq_num;
} addba_req;
struct{
u8 action_code;
u8 dialog_token;
u16 status;
u16 capab;
u16 timeout;
} addba_resp;
struct{
u8 action_code;
u16 params;
u16 reason_code;
} delba;
struct{
u8 action_code;
/* capab_info for open and confirm,
* reason for close
*/
u16 aux;
/* Followed in plink_confirm by status
* code, AID and supported rates,
* and directly by supported rates in
* plink_open and plink_close
*/
u8 variable[0];
} plink_action;
struct{
u8 action_code;
u8 variable[0];
} mesh_action;
} u;
} action;
} u;
} ;
#pragma pack()
#endif
/* mgmt header + 1 byte category code */
#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u)
#endif

112
drivers/net/wireless/realtek/rtl8192cu/include/if_ether.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_IF_ETHER_H
#define _LINUX_IF_ETHER_H
/*
* IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble
* and FCS/CRC (frame check sequence).
*/
#define ETH_ALEN 6 /* Octets in one ethernet addr */
#define ETH_HLEN 14 /* Total octets in header. */
#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */
#define ETH_DATA_LEN 1500 /* Max. octets in payload */
#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */
/*
* These are the defined Ethernet Protocol ID's.
*/
#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */
#define ETH_P_PUP 0x0200 /* Xerox PUP packet */
#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */
#define ETH_P_IP 0x0800 /* Internet Protocol packet */
#define ETH_P_X25 0x0805 /* CCITT X.25 */
#define ETH_P_ARP 0x0806 /* Address Resolution packet */
#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet [ NOT AN OFFICIALLY REGISTERED ID ] */
#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */
#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */
#define ETH_P_DEC 0x6000 /* DEC Assigned proto */
#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */
#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */
#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */
#define ETH_P_LAT 0x6004 /* DEC LAT */
#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */
#define ETH_P_CUST 0x6006 /* DEC Customer use */
#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */
#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */
#define ETH_P_ATALK 0x809B /* Appletalk DDP */
#define ETH_P_AARP 0x80F3 /* Appletalk AARP */
#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */
#define ETH_P_IPX 0x8137 /* IPX over DIX */
#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */
#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */
#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */
#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */
#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport
* over Ethernet
*/
/*
* Non DIX types. Won't clash for 1500 types.
*/
#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */
#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */
#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */
#define ETH_P_802_2 0x0004 /* 802.2 frames */
#define ETH_P_SNAP 0x0005 /* Internal only */
#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */
#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/
#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */
#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */
#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/
#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */
#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */
#define ETH_P_CONTROL 0x0016 /* Card specific control frames */
#define ETH_P_IRDA 0x0017 /* Linux-IrDA */
#define ETH_P_ECONET 0x0018 /* Acorn Econet */
/*
* This is an Ethernet frame header.
*/
struct ethhdr
{
unsigned char h_dest[ETH_ALEN]; /* destination eth addr */
unsigned char h_source[ETH_ALEN]; /* source ether addr */
unsigned short h_proto; /* packet type ID field */
};
struct _vlan {
unsigned short h_vlan_TCI; // Encapsulates priority and VLAN ID
unsigned short h_vlan_encapsulated_proto;
};
#define get_vlan_id(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI)) & 0xfff)
#define get_vlan_priority(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI))>>13)
#define get_vlan_encap_proto(pvlan) (ntohs((unsigned short )pvlan->h_vlan_encapsulated_proto))
#endif /* _LINUX_IF_ETHER_H */

179
drivers/net/wireless/realtek/rtl8192cu/include/ioctl_cfg80211.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __IOCTL_CFG80211_H__
#define __IOCTL_CFG80211_H__
#if defined(CONFIG_IOCTL_CFG80211) && !defined(CONFIG_CFG80211) && !defined(CONFIG_CFG80211_MODULE)
#error "Can't define CONFIG_IOCTL_CFG80211 because neither CONFIG_CFG80211 nor CONFIG_CFG80211_MODULE is defined in kernel"
#endif
#if defined(CONFIG_IOCTL_CFG80211) && LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
#error "We haven't verify our cfg80211 solution below kernel version 2.6.35"
#endif
#if defined(RTW_USE_CFG80211_STA_EVENT)
#undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER
#endif
struct rtw_wdev_invit_info {
u8 state; /* 0: req, 1:rep */
u8 peer_mac[ETH_ALEN];
u8 active;
u8 token;
u8 flags;
u8 status;
u8 req_op_ch;
u8 rsp_op_ch;
};
#define rtw_wdev_invit_info_init(invit_info) \
do { \
(invit_info)->state = 0xff; \
_rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \
(invit_info)->active = 0xff; \
(invit_info)->token = 0; \
(invit_info)->flags = 0x00; \
(invit_info)->status = 0xff; \
(invit_info)->req_op_ch = 0; \
(invit_info)->rsp_op_ch = 0; \
} while (0)
struct rtw_wdev_nego_info {
u8 state; /* 0: req, 1:rep, 3:conf */
u8 peer_mac[ETH_ALEN];
u8 active;
u8 token;
u8 status;
u8 req_intent;
u8 req_op_ch;
u8 req_listen_ch;
u8 rsp_intent;
u8 rsp_op_ch;
u8 conf_op_ch;
};
#define rtw_wdev_nego_info_init(nego_info) \
do { \
(nego_info)->state = 0xff; \
_rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \
(nego_info)->active = 0xff; \
(nego_info)->token = 0; \
(nego_info)->status = 0xff; \
(nego_info)->req_intent = 0xff; \
(nego_info)->req_op_ch = 0; \
(nego_info)->req_listen_ch = 0; \
(nego_info)->rsp_intent = 0xff; \
(nego_info)->rsp_op_ch = 0; \
(nego_info)->conf_op_ch = 0; \
} while (0)
struct rtw_wdev_priv
{
struct wireless_dev *rtw_wdev;
_adapter *padapter;
struct cfg80211_scan_request *scan_request;
_lock scan_req_lock;
struct net_device *pmon_ndev;//for monitor interface
char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface
u8 p2p_enabled;
u8 provdisc_req_issued;
struct rtw_wdev_invit_info invit_info;
struct rtw_wdev_nego_info nego_info;
u8 bandroid_scan;
bool block;
bool power_mgmt;
#ifdef CONFIG_CONCURRENT_MODE
ATOMIC_T ro_ch_to;
ATOMIC_T switch_ch_to;
#endif
};
#define wdev_to_priv(w) ((struct rtw_wdev_priv *)(wdev_priv(w)))
#define wiphy_to_adapter(x) (_adapter *)(((struct rtw_wdev_priv*)wiphy_priv(x))->padapter)
#define wiphy_to_wdev(x) (struct wireless_dev *)(((struct rtw_wdev_priv*)wiphy_priv(x))->rtw_wdev)
int rtw_wdev_alloc(_adapter *padapter, struct device *dev);
void rtw_wdev_free(struct wireless_dev *wdev);
void rtw_wdev_unregister(struct wireless_dev *wdev);
void rtw_cfg80211_init_wiphy(_adapter *padapter);
void rtw_cfg80211_surveydone_event_callback(_adapter *padapter);
int rtw_cfg80211_check_bss(_adapter *padapter);
void rtw_cfg80211_indicate_connect(_adapter *padapter);
void rtw_cfg80211_indicate_disconnect(_adapter *padapter);
void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted);
#ifdef CONFIG_AP_MODE
void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason);
#endif //CONFIG_AP_MODE
void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len);
void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg);
int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type);
bool rtw_cfg80211_pwr_mgmt(_adapter *adapter);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE)
#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp)
#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0))
#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp)
#else
#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp)
#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE)
#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len)
#else
#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len)
#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0))
#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->pnetdev, cookie, buf, len, ack, gfp)
#else
#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, len, ack, gfp)
#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0))
#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->pnetdev, cookie, chan, channel_type, duration, gfp)
#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->pnetdev, cookie, chan, chan_type, gfp)
#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0))
#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, channel_type, duration, gfp)
#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, chan_type, gfp)
#else
#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, duration, gfp)
#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, gfp)
#endif
#endif //__IOCTL_CFG80211_H__

141
drivers/net/wireless/realtek/rtl8192cu/include/ip.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_IP_H
#define _LINUX_IP_H
#include <rtw_byteorder.h>
/* SOL_IP socket options */
#define IPTOS_TOS_MASK 0x1E
#define IPTOS_TOS(tos) ((tos)&IPTOS_TOS_MASK)
#define IPTOS_LOWDELAY 0x10
#define IPTOS_THROUGHPUT 0x08
#define IPTOS_RELIABILITY 0x04
#define IPTOS_MINCOST 0x02
#define IPTOS_PREC_MASK 0xE0
#define IPTOS_PREC(tos) ((tos)&IPTOS_PREC_MASK)
#define IPTOS_PREC_NETCONTROL 0xe0
#define IPTOS_PREC_INTERNETCONTROL 0xc0
#define IPTOS_PREC_CRITIC_ECP 0xa0
#define IPTOS_PREC_FLASHOVERRIDE 0x80
#define IPTOS_PREC_FLASH 0x60
#define IPTOS_PREC_IMMEDIATE 0x40
#define IPTOS_PREC_PRIORITY 0x20
#define IPTOS_PREC_ROUTINE 0x00
/* IP options */
#define IPOPT_COPY 0x80
#define IPOPT_CLASS_MASK 0x60
#define IPOPT_NUMBER_MASK 0x1f
#define IPOPT_COPIED(o) ((o)&IPOPT_COPY)
#define IPOPT_CLASS(o) ((o)&IPOPT_CLASS_MASK)
#define IPOPT_NUMBER(o) ((o)&IPOPT_NUMBER_MASK)
#define IPOPT_CONTROL 0x00
#define IPOPT_RESERVED1 0x20
#define IPOPT_MEASUREMENT 0x40
#define IPOPT_RESERVED2 0x60
#define IPOPT_END (0 |IPOPT_CONTROL)
#define IPOPT_NOOP (1 |IPOPT_CONTROL)
#define IPOPT_SEC (2 |IPOPT_CONTROL|IPOPT_COPY)
#define IPOPT_LSRR (3 |IPOPT_CONTROL|IPOPT_COPY)
#define IPOPT_TIMESTAMP (4 |IPOPT_MEASUREMENT)
#define IPOPT_RR (7 |IPOPT_CONTROL)
#define IPOPT_SID (8 |IPOPT_CONTROL|IPOPT_COPY)
#define IPOPT_SSRR (9 |IPOPT_CONTROL|IPOPT_COPY)
#define IPOPT_RA (20|IPOPT_CONTROL|IPOPT_COPY)
#define IPVERSION 4
#define MAXTTL 255
#define IPDEFTTL 64
/* struct timestamp, struct route and MAX_ROUTES are removed.
REASONS: it is clear that nobody used them because:
- MAX_ROUTES value was wrong.
- "struct route" was wrong.
- "struct timestamp" had fatally misaligned bitfields and was completely unusable.
*/
#define IPOPT_OPTVAL 0
#define IPOPT_OLEN 1
#define IPOPT_OFFSET 2
#define IPOPT_MINOFF 4
#define MAX_IPOPTLEN 40
#define IPOPT_NOP IPOPT_NOOP
#define IPOPT_EOL IPOPT_END
#define IPOPT_TS IPOPT_TIMESTAMP
#define IPOPT_TS_TSONLY 0 /* timestamps only */
#define IPOPT_TS_TSANDADDR 1 /* timestamps and addresses */
#define IPOPT_TS_PRESPEC 3 /* specified modules only */
#ifdef PLATFORM_LINUX
struct ip_options {
__u32 faddr; /* Saved first hop address */
unsigned char optlen;
unsigned char srr;
unsigned char rr;
unsigned char ts;
unsigned char is_setbyuser:1, /* Set by setsockopt? */
is_data:1, /* Options in __data, rather than skb */
is_strictroute:1, /* Strict source route */
srr_is_hit:1, /* Packet destination addr was our one */
is_changed:1, /* IP checksum more not valid */
rr_needaddr:1, /* Need to record addr of outgoing dev */
ts_needtime:1, /* Need to record timestamp */
ts_needaddr:1; /* Need to record addr of outgoing dev */
unsigned char router_alert;
unsigned char __pad1;
unsigned char __pad2;
unsigned char __data[0];
};
#define optlength(opt) (sizeof(struct ip_options) + opt->optlen)
#endif
struct iphdr {
#if defined(__LITTLE_ENDIAN_BITFIELD)
__u8 ihl:4,
version:4;
#elif defined (__BIG_ENDIAN_BITFIELD)
__u8 version:4,
ihl:4;
#else
#error "Please fix <asm/byteorder.h>"
#endif
__u8 tos;
__u16 tot_len;
__u16 id;
__u16 frag_off;
__u8 ttl;
__u8 protocol;
__u16 check;
__u32 saddr;
__u32 daddr;
/*The options start here. */
};
#endif /* _LINUX_IP_H */

90
drivers/net/wireless/realtek/rtl8192cu/include/linux/wireless.h Normal file
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@@ -0,0 +1,90 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_WIRELESS_H
#define _LINUX_WIRELESS_H
/***************************** INCLUDES *****************************/
#if 0
#include <linux/types.h> /* for __u* and __s* typedefs */
#include <linux/socket.h> /* for "struct sockaddr" et al */
#include <linux/if.h> /* for IFNAMSIZ and co... */
#else
#define __user
//typedef uint16_t __u16;
#include <sys/socket.h> /* for "struct sockaddr" et al */
#include <net/if.h> /* for IFNAMSIZ and co... */
#endif
/****************************** TYPES ******************************/
/* --------------------------- SUBTYPES --------------------------- */
/*
* For all data larger than 16 octets, we need to use a
* pointer to memory allocated in user space.
*/
struct iw_point
{
void __user *pointer; /* Pointer to the data (in user space) */
__u16 length; /* number of fields or size in bytes */
__u16 flags; /* Optional params */
};
/* ------------------------ IOCTL REQUEST ------------------------ */
/*
* This structure defines the payload of an ioctl, and is used
* below.
*
* Note that this structure should fit on the memory footprint
* of iwreq (which is the same as ifreq), which mean a max size of
* 16 octets = 128 bits. Warning, pointers might be 64 bits wide...
* You should check this when increasing the structures defined
* above in this file...
*/
union iwreq_data
{
/* Config - generic */
char name[IFNAMSIZ];
/* Name : used to verify the presence of wireless extensions.
* Name of the protocol/provider... */
struct iw_point data; /* Other large parameters */
};
/*
* The structure to exchange data for ioctl.
* This structure is the same as 'struct ifreq', but (re)defined for
* convenience...
* Do I need to remind you about structure size (32 octets) ?
*/
struct iwreq
{
union
{
char ifrn_name[IFNAMSIZ]; /* if name, e.g. "eth0" */
} ifr_ifrn;
/* Data part (defined just above) */
union iwreq_data u;
};
#endif /* _LINUX_WIRELESS_H */

39
drivers/net/wireless/realtek/rtl8192cu/include/mlme_osdep.h Normal file
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@@ -0,0 +1,39 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __MLME_OSDEP_H_
#define __MLME_OSDEP_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#if defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL)
extern int time_after(u32 now, u32 old);
#endif
extern void rtw_init_mlme_timer(_adapter *padapter);
extern void rtw_os_indicate_disconnect( _adapter *adapter );
extern void rtw_os_indicate_connect( _adapter *adapter );
void rtw_os_indicate_scan_done( _adapter *padapter, bool aborted);
extern void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie);
void rtw_reset_securitypriv( _adapter *adapter );
#endif //_MLME_OSDEP_H_

353
drivers/net/wireless/realtek/rtl8192cu/include/mp_custom_oid.h Normal file
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@@ -0,0 +1,353 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CUSTOM_OID_H
#define __CUSTOM_OID_H
// by Owen
// 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit
// 0xFF818500 - 0xFF81850F RTL8185 Setup Utility
// 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility
//
// by Owen for Production Kit
// For Production Kit with Agilent Equipments
// in order to make our custom oids hopefully somewhat unique
// we will use 0xFF (indicating implementation specific OID)
// 81(first byte of non zero Realtek unique identifier)
// 80 (second byte of non zero Realtek unique identifier)
// XX (the custom OID number - providing 255 possible custom oids)
#define OID_RT_PRO_RESET_DUT 0xFF818000
#define OID_RT_PRO_SET_DATA_RATE 0xFF818001
#define OID_RT_PRO_START_TEST 0xFF818002
#define OID_RT_PRO_STOP_TEST 0xFF818003
#define OID_RT_PRO_SET_PREAMBLE 0xFF818004
#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005
#define OID_RT_PRO_SET_FILTER_BB 0xFF818006
#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007
#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008
#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009
#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A
#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D
#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E
#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F
#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010
#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011
#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012
#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013
#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014
#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015
#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016
#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017
#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018
#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019
#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A
#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B
#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C
#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D
#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E
#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F
#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020
#define OID_RT_PRO_WRITE_EEPROM 0xFF818021
#define OID_RT_PRO_READ_EEPROM 0xFF818022
#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023
#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024
#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025
#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026
#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027
#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028
#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029
#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A
#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C
// added by Owen on 04/08/03 for Cameo's request
#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D
#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E
#define OID_RT_PRO_SET_MODULATION 0xFF81802F
//
//Sean
#define OID_RT_DRIVER_OPTION 0xFF818080
#define OID_RT_RF_OFF 0xFF818081
#define OID_RT_AUTH_STATUS 0xFF818082
//========================================================================
#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B
#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C
#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B
#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043
//========================================================================
// by Owen for RTL8185 Phy Status Report Utility
#define OID_RT_UTILITY_FALSE_ALARM_COUNTERS 0xFF818580
#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581
#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582
#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583
#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584
#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS 0xFF818585
#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586
//
// by Owen on 03/09/19-03/09/22 for RTL8185
#define OID_RT_WIRELESS_MODE 0xFF818500
#define OID_RT_SUPPORTED_RATES 0xFF818501
#define OID_RT_DESIRED_RATES 0xFF818502
#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503
//
#define OID_RT_GET_CONNECT_STATE 0xFF030001
#define OID_RT_RESCAN 0xFF030002
#define OID_RT_SET_KEY_LENGTH 0xFF030003
#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004
#define OID_RT_SET_CHANNEL 0xFF010182
#define OID_RT_SET_SNIFFER_MODE 0xFF010183
#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184
#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185
#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186
#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187
#define OID_RT_GET_TX_RETRY 0xFF010188
#define OID_RT_GET_RX_RETRY 0xFF010189
#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A//S
#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B//S
#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190
#define OID_RT_GET_TX_BEACON_OK 0xFF010191
#define OID_RT_GET_TX_BEACON_ERR 0xFF010192
#define OID_RT_GET_RX_ICV_ERR 0xFF010193
#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194
#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195
#define OID_RT_GET_PREAMBLE_MODE 0xFF010196
#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197
#define OID_RT_GET_AP_IP 0xFF010198
#define OID_RT_GET_CHANNELPLAN 0xFF010199
#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A
#define OID_RT_SET_BCN_INTVL 0xFF01019B
#define OID_RT_GET_RF_VENDER 0xFF01019C
#define OID_RT_DEDICATE_PROBE 0xFF01019D
#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E
#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F
#define OID_RT_GET_CCA_ERR 0xFF0101A0
#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1
#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2
#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3
#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4
// by Owen on 03/31/03 for Cameo's request
#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5
//
#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5
#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6
#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7
#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8
#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9
#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA
#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB
#define OID_RT_GET_CHANNEL 0xFF0101AC
#define OID_RT_SET_CHANNELPLAN 0xFF0101AD
#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE
#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF
#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0
#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1
#define OID_RT_GET_IS_ROAMING 0xFF0101B2
#define OID_RT_GET_IS_PRIVACY 0xFF0101B3
#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4
#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5
#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6
#define OID_RT_RESET_LOG 0xFF0101B7
#define OID_RT_GET_LOG 0xFF0101B8
#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9
#define OID_RT_GET_HEADER_FAIL 0xFF0101BA
#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB
#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC
#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD
#define OID_RT_GET_TX_INFO 0xFF0101BE
#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF
#define OID_RT_RF_READ_WRITE 0xFF0101C0
// For Netgear request. 2005.01.13, by rcnjko.
#define OID_RT_FORCED_DATA_RATE 0xFF0101C1
#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2
// For Netgear request. 2005.02.17, by rcnjko.
#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3
// For AZ project. 2005.06.27, by rcnjko.
#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4
// Vincent 8185MP
#define OID_RT_PRO_RX_FILTER 0xFF0111C0
//Andy TEST
//#define OID_RT_PRO_WRITE_REGISTRY 0xFF0111C1
//#define OID_RT_PRO_READ_REGISTRY 0xFF0111C2
#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1
#define OID_CE_USB_READ_REGISTRY 0xFF0111C2
#define OID_RT_PRO_SET_INITIAL_GAIN 0xFF0111C3
#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4
#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5
#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6
#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7
#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8
#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9
#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA
// AP OID
#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300
#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301
#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302
#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303
#define OID_RT_AP_SUPPORTED 0xFF010304 // Determine if driver supports AP mode. 2004.08.27, by rcnjko.
#define OID_RT_AP_SET_PASSPHRASE 0xFF010305 // Set WPA-PSK passphrase into authenticator. 2005.07.08, byrcnjko.
// 8187MP. 2004.09.06, by rcnjko.
#define OID_RT_PRO8187_WI_POLL 0xFF818780
#define OID_RT_PRO_WRITE_BB_REG 0xFF818781
#define OID_RT_PRO_READ_BB_REG 0xFF818782
#define OID_RT_PRO_WRITE_RF_REG 0xFF818783
#define OID_RT_PRO_READ_RF_REG 0xFF818784
// Meeting House. added by Annie, 2005-07-20.
#define OID_RT_MH_VENDER_ID 0xFFEDC100
//8711 MP OID added 20051230.
#define OID_RT_PRO8711_JOIN_BSS 0xFF871100//S
#define OID_RT_PRO_READ_REGISTER 0xFF871101 //Q
#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 //S
#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 //Q
#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 //S
#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 //S
#define OID_RT_PRO_READ16_EEPROM 0xFF871106 //Q
#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 //S
#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 //S
#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 //Q
#define OID_RT_PRO8711_WI_POLL 0xFF87110A //Q
#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B //Q
#define OID_RT_RD_ATTRIB_MEM 0xFF87110C//Q
#define OID_RT_WR_ATTRIB_MEM 0xFF87110D//S
//Method 2 for H2C/C2H
#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 //S
#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 //Q
#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 //S
#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 //Q
#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114//Q
#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 //Q, S
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 //S
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 //Q,S
#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 //Q
#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 //Q
#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A //S
#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B //Q
#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C //S
#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D //Q
#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E //S
#define OID_RT_POLL_RX_STATUS 0xFF87111F //Q
#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 //Q,S
#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121//S
#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122//S
#define OID_RT_PRO_READ_TSSI 0xFF871123//S
#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124//S
#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 //Q
#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 //S
//Method 2 , using workitem
#define OID_RT_SET_READ_REG 0xFF871181 //S
#define OID_RT_SET_WRITE_REG 0xFF871182 //S
#define OID_RT_SET_BURST_READ_REG 0xFF871183 //S
#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 //S
#define OID_RT_SET_WRITE_TXCMD 0xFF871185 //S
#define OID_RT_SET_READ16_EEPROM 0xFF871186 //S
#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 //S
#define OID_RT_QRY_POLL_WKITEM 0xFF871188 //Q
//For SDIO INTERFACE only
#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 //Q, S
#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1
//For USB INTERFACE only
#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 //Q, S
#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 //S
#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 //S
#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 //Q
#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 //Q
#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB //S
#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC //S
#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE
#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 //Q, S
#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 //S
#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 //S
#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 //Q
#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 //Q, S
#define OID_RT_PRO_READ_EFUSE 0xFF871205 //Q
#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 //S
#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 //Q, S
#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 //Q
#define OID_RT_SET_BANDWIDTH 0xFF871209 //S
#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A //S
#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B //S
#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C //Q
#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D //S
#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E //S
#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F //S
#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 //Q
#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 //S
#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 //Q
#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 //Q
#define OID_RT_SET_POWER_DOWN 0xFF871214 //S
#define OID_RT_GET_POWER_MODE 0xFF871215 //Q
#define OID_RT_PRO_EFUSE 0xFF871216 //Q, S
#define OID_RT_PRO_EFUSE_MAP 0xFF871217 //Q, S
#endif //#ifndef __CUSTOM_OID_H

46
drivers/net/wireless/realtek/rtl8192cu/include/nic_spec.h Normal file
View File

@@ -0,0 +1,46 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __NIC_SPEC_H__
#define __NIC_SPEC_H__
#include <drv_conf.h>
#define RTL8711_MCTRL_ (0x20000)
#define RTL8711_UART_ (0x30000)
#define RTL8711_TIMER_ (0x40000)
#define RTL8711_FINT_ (0x50000)
#define RTL8711_HINT_ (0x50000)
#define RTL8711_GPIO_ (0x60000)
#define RTL8711_WLANCTRL_ (0x200000)
#define RTL8711_WLANFF_ (0xe00000)
#define RTL8711_HCICTRL_ (0x600000)
#define RTL8711_SYSCFG_ (0x620000)
#define RTL8711_SYSCTRL_ (0x620000)
#define RTL8711_MCCTRL_ (0x020000)
#include <rtl8711_regdef.h>
#include <rtl8711_bitdef.h>
#endif // __RTL8711_SPEC_H__

170
drivers/net/wireless/realtek/rtl8192cu/include/osdep_ce_service.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __OSDEP_CE_SERVICE_H_
#define __OSDEP_CE_SERVICE_H_
#include <ndis.h>
#include <ntddndis.h>
#ifdef CONFIG_SDIO_HCI
#include "SDCardDDK.h"
#endif
#ifdef CONFIG_USB_HCI
#include <usbdi.h>
#endif
typedef HANDLE _sema;
typedef LIST_ENTRY _list;
typedef NDIS_STATUS _OS_STATUS;
typedef NDIS_SPIN_LOCK _lock;
typedef HANDLE _rwlock; //Mutex
typedef u32 _irqL;
typedef NDIS_HANDLE _nic_hdl;
typedef NDIS_MINIPORT_TIMER _timer;
struct __queue {
LIST_ENTRY queue;
_lock lock;
};
typedef NDIS_PACKET _pkt;
typedef NDIS_BUFFER _buffer;
typedef struct __queue _queue;
typedef HANDLE _thread_hdl_;
typedef DWORD thread_return;
typedef void* thread_context;
typedef NDIS_WORK_ITEM _workitem;
#define thread_exit() ExitThread(STATUS_SUCCESS); return 0;
#define SEMA_UPBND (0x7FFFFFFF) //8192
__inline static _list *get_prev(_list *list)
{
return list->Blink;
}
__inline static _list *get_next(_list *list)
{
return list->Flink;
}
__inline static _list *get_list_head(_queue *queue)
{
return (&(queue->queue));
}
#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member)
__inline static void _enter_critical(_lock *plock, _irqL *pirqL)
{
NdisAcquireSpinLock(plock);
}
__inline static void _exit_critical(_lock *plock, _irqL *pirqL)
{
NdisReleaseSpinLock(plock);
}
__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL)
{
NdisDprAcquireSpinLock(plock);
}
__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL)
{
NdisDprReleaseSpinLock(plock);
}
__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
{
WaitForSingleObject(*prwlock, INFINITE );
}
__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
{
ReleaseMutex(*prwlock);
}
__inline static void rtw_list_delete(_list *plist)
{
RemoveEntryList(plist);
InitializeListHead(plist);
}
__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx)
{
NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);
}
__inline static void _set_timer(_timer *ptimer,u32 delay_time)
{
NdisMSetTimer(ptimer,delay_time);
}
__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
{
NdisMCancelTimer(ptimer,bcancelled);
}
__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)
{
NdisInitializeWorkItem(pwork, pfunc, cntx);
}
__inline static void _set_workitem(_workitem *pwork)
{
NdisScheduleWorkItem(pwork);
}
#define ATOMIC_INIT(i) { (i) }
//
// Global Mutex: can only be used at PASSIVE level.
//
#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
{ \
while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\
{ \
NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
NdisMSleep(10000); \
} \
}
#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
{ \
NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
}
#endif

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drivers/net/wireless/realtek/rtl8192cu/include/osdep_intf.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __OSDEP_INTF_H_
#define __OSDEP_INTF_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
struct intf_priv {
u8 *intf_dev;
u32 max_iosz; //USB2.0: 128, USB1.1: 64, SDIO:64
u32 max_xmitsz; //USB2.0: unlimited, SDIO:512
u32 max_recvsz; //USB2.0: unlimited, SDIO:512
volatile u8 *io_rwmem;
volatile u8 *allocated_io_rwmem;
u32 io_wsz; //unit: 4bytes
u32 io_rsz;//unit: 4bytes
u8 intf_status;
void (*_bus_io)(u8 *priv);
/*
Under Sync. IRP (SDIO/USB)
A protection mechanism is necessary for the io_rwmem(read/write protocol)
Under Async. IRP (SDIO/USB)
The protection mechanism is through the pending queue.
*/
_mutex ioctl_mutex;
#ifdef PLATFORM_LINUX
#ifdef CONFIG_USB_HCI
// when in USB, IO is through interrupt in/out endpoints
struct usb_device *udev;
PURB piorw_urb;
u8 io_irp_cnt;
u8 bio_irp_pending;
_sema io_retevt;
_timer io_timer;
u8 bio_irp_timeout;
u8 bio_timer_cancel;
#endif
#endif
#ifdef PLATFORM_OS_XP
#ifdef CONFIG_SDIO_HCI
// below is for io_rwmem...
PMDL pmdl;
PSDBUS_REQUEST_PACKET sdrp;
PSDBUS_REQUEST_PACKET recv_sdrp;
PSDBUS_REQUEST_PACKET xmit_sdrp;
PIRP piorw_irp;
#endif
#ifdef CONFIG_USB_HCI
PURB piorw_urb;
PIRP piorw_irp;
u8 io_irp_cnt;
u8 bio_irp_pending;
_sema io_retevt;
#endif
#endif
};
#ifdef CONFIG_R871X_TEST
int rtw_start_pseudo_adhoc(_adapter *padapter);
int rtw_stop_pseudo_adhoc(_adapter *padapter);
#endif
struct dvobj_priv *devobj_init(void);
void devobj_deinit(struct dvobj_priv *pdvobj);
u8 rtw_init_drv_sw(_adapter *padapter);
u8 rtw_free_drv_sw(_adapter *padapter);
u8 rtw_reset_drv_sw(_adapter *padapter);
u32 rtw_start_drv_threads(_adapter *padapter);
void rtw_stop_drv_threads (_adapter *padapter);
void rtw_cancel_all_timer(_adapter *padapter);
#ifdef PLATFORM_LINUX
int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname);
struct net_device *rtw_init_netdev(_adapter *padapter);
void rtw_unregister_netdevs(struct dvobj_priv *dvobj);
#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35))
u16 rtw_recv_select_queue(struct sk_buff *skb);
#endif //LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)
#ifdef CONFIG_PROC_DEBUG
void rtw_proc_init_one(struct net_device *dev);
void rtw_proc_remove_one(struct net_device *dev);
#else //!CONFIG_PROC_DEBUG
static void rtw_proc_init_one(struct net_device *dev){}
static void rtw_proc_remove_one(struct net_device *dev){}
#endif //!CONFIG_PROC_DEBUG
#endif //PLATFORM_LINUX
#ifdef PLATFORM_FREEBSD
extern int rtw_ioctl(struct ifnet * ifp, u_long cmd, caddr_t data);
#endif
void rtw_ips_dev_unload(_adapter *padapter);
#ifdef CONFIG_IPS
int rtw_ips_pwr_up(_adapter *padapter);
void rtw_ips_pwr_down(_adapter *padapter);
#endif
#ifdef CONFIG_CONCURRENT_MODE
struct _io_ops;
_adapter *rtw_drv_if2_init(_adapter *primary_padapter, void (*set_intf_ops)(struct _io_ops *pops));
void rtw_drv_if2_free(_adapter *if2);
void rtw_drv_if2_stop(_adapter *if2);
#ifdef CONFIG_MULTI_VIR_IFACES
struct dvobj_priv;
_adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, void (*set_intf_ops)(struct _io_ops *pops));
void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj);
void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj);
#endif //CONFIG_MULTI_VIR_IFACES
#endif
int rtw_drv_register_netdev(_adapter *padapter);
void rtw_ndev_destructor(_nic_hdl ndev);
#endif //_OSDEP_INTF_H_

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drivers/net/wireless/realtek/rtl8192cu/include/osdep_service.h Normal file
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167
drivers/net/wireless/realtek/rtl8192cu/include/pci_hal.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_HAL_H__
#define __PCI_HAL_H__
#define INTEL_VENDOR_ID 0x8086
#define SIS_VENDOR_ID 0x1039
#define ATI_VENDOR_ID 0x1002
#define ATI_DEVICE_ID 0x7914
#define AMD_VENDOR_ID 0x1022
#define PCI_MAX_BRIDGE_NUMBER 255
#define PCI_MAX_DEVICES 32
#define PCI_MAX_FUNCTION 8
#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address
#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data
#define PCI_CLASS_BRIDGE_DEV 0x06
#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04
#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10
#define U1DONTCARE 0xFF
#define U2DONTCARE 0xFFFF
#define U4DONTCARE 0xFFFFFFFF
#define PCI_VENDER_ID_REALTEK 0x10ec
#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b
#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b
#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b
#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190
#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E
#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E
#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE
#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE
#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab
#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE
#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron
#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga
#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga
#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga
#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga
#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 //8192ce
#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 //8192ce
#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 //8192ce
#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 //8192ce
#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 //8192ce
#define HAL_HW_PCI_8192DE_DEVICE_ID 0x8193 //8192de
#define HAL_HW_PCI_002B_DEVICE_ID 0x002B //8192de, provided by HW SD
#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers
enum pci_bridge_vendor {
PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001
PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010
PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100
PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000
PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000
PCI_BRIDGE_VENDOR_MAX ,//= 0x80
} ;
struct rt_pci_capabilities_header {
u8 capability_id;
u8 next;
};
struct pci_priv{
u8 linkctrl_reg;
u8 busnumber;
u8 devnumber;
u8 funcnumber;
u8 pcibridge_busnum;
u8 pcibridge_devnum;
u8 pcibridge_funcnum;
u8 pcibridge_vendor;
u16 pcibridge_vendorid;
u16 pcibridge_deviceid;
u8 pcibridge_pciehdr_offset;
u8 pcibridge_linkctrlreg;
u8 amd_l1_patch;
};
typedef struct _RT_ISR_CONTENT
{
union{
u32 IntArray[2];
u32 IntReg4Byte;
u16 IntReg2Byte;
};
}RT_ISR_CONTENT, *PRT_ISR_CONTENT;
//#define RegAddr(addr) (addr + 0xB2000000UL)
//some platform macros will def here
static inline void NdisRawWritePortUlong(u32 port, u32 val)
{
outl(val, port);
//writel(val, (u8 *)RegAddr(port));
}
static inline void NdisRawWritePortUchar(u32 port, u8 val)
{
outb(val, port);
//writeb(val, (u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUchar(u32 port, u8 *pval)
{
*pval = inb(port);
//*pval = readb((u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUshort(u32 port, u16 *pval)
{
*pval = inw(port);
//*pval = readw((u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUlong(u32 port, u32 *pval)
{
*pval = inl(port);
//*pval = readl((u8 *)RegAddr(port));
}
#ifdef CONFIG_RTL8192C
void rtl8192ce_set_hal_ops(_adapter * padapter);
#endif
#ifdef CONFIG_RTL8192D
void rtl8192de_set_hal_ops(_adapter * padapter);
#endif
#endif //__PCIE_HAL_H__

60
drivers/net/wireless/realtek/rtl8192cu/include/pci_ops.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_OPS_H_
#define __PCI_OPS_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#ifdef CONFIG_RTL8192C
u32 rtl8192ce_init_desc_ring(_adapter * padapter);
u32 rtl8192ce_free_desc_ring(_adapter * padapter);
void rtl8192ce_reset_desc_ring(_adapter * padapter);
#ifdef CONFIG_64BIT_DMA
u8 PlatformEnable92CEDMA64(PADAPTER Adapter);
#endif
int rtl8192ce_interrupt(PADAPTER Adapter);
void rtl8192ce_xmit_tasklet(void *priv);
void rtl8192ce_recv_tasklet(void *priv);
void rtl8192ce_prepare_bcn_tasklet(void *priv);
void rtl8192ce_set_intf_ops(struct _io_ops *pops);
#define pci_set_intf_ops rtl8192ce_set_intf_ops
#endif
#ifdef CONFIG_RTL8192D
u32 rtl8192de_init_desc_ring(_adapter * padapter);
u32 rtl8192de_free_desc_ring(_adapter * padapter);
void rtl8192de_reset_desc_ring(_adapter * padapter);
#ifdef CONFIG_64BIT_DMA
u8 PlatformEnable92DEDMA64(PADAPTER Adapter);
#endif
int rtl8192de_interrupt(PADAPTER Adapter);
void rtl8192de_xmit_tasklet(void *priv);
void rtl8192de_recv_tasklet(void *priv);
void rtl8192de_prepare_bcn_tasklet(void *priv);
void rtl8192de_set_intf_ops(struct _io_ops *pops);
#define pci_set_intf_ops rtl8192de_set_intf_ops
u32 MpReadPCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u8 Direct);
void MpWritePCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u32 Value, IN u8 Direct);
#endif
#endif

32
drivers/net/wireless/realtek/rtl8192cu/include/pci_osintf.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_OSINTF_H
#define __PCI_OSINTF_H
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
void rtw_pci_disable_aspm(_adapter *padapter);
void rtw_pci_enable_aspm(_adapter *padapter);
#endif

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