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Main bcm2708/bcm2709 linux port
Signed-off-by: popcornmix <popcornmix@gmail.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> bcm2709: Drop platform smp and timer init code irq-bcm2836 handles this through these functions: bcm2835_init_local_timer_frequency() bcm2836_arm_irqchip_smp_init() Signed-off-by: Noralf Trønnes <noralf@tronnes.org> bcm270x: Use watchdog for reboot/poweroff The watchdog driver already has support for reboot/poweroff. Make use of this and remove the code from the platform files. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> board_bcm2835: Remove coherent dma pool increase - API has gone
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@@ -165,6 +165,7 @@ config ARCH_BCM2835
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select PINCTRL
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select PINCTRL_BCM2835
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select MFD_CORE
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select MFD_SYSCON if ARCH_MULTI_V7
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help
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This enables support for the Broadcom BCM2711 and BCM283x SoCs.
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This SoC is used in the Raspberry Pi and Roku 2 devices.
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@@ -70,10 +70,19 @@ ENDPROC(cpu_v6_reset)
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*
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* IRQs are already disabled.
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*/
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/* See jira SW-5991 for details of this workaround */
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ENTRY(cpu_v6_do_idle)
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mov r1, #0
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mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
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mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt
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.align 5
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mov r1, #2
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1: subs r1, #1
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nop
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mcreq p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
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mcreq p15, 0, r1, c7, c0, 4 @ wait for interrupt
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nop
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nop
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nop
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bne 1b
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ret lr
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ENTRY(cpu_v6_dcache_clean_area)
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@@ -43,7 +43,9 @@
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#include <linux/irqdomain.h>
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#include <asm/exception.h>
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#ifndef CONFIG_ARM64
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#include <asm/mach/irq.h>
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#endif
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/* Put the bank and irq (32 bits) into the hwirq */
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#define MAKE_HWIRQ(b, n) (((b) << 5) | (n))
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@@ -72,6 +74,7 @@
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#define NR_BANKS 3
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#define IRQS_PER_BANK 32
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#define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0)
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#undef FIQ_START
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#define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0))
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static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
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@@ -253,10 +256,12 @@ static int __init armctrl_of_init(struct device_node *node,
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MAKE_HWIRQ(b, i) + NUMBER_IRQS);
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BUG_ON(irq <= 0);
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irq_set_chip(irq, &armctrl_chip);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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irq_set_probe(irq);
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}
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}
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#ifndef CONFIG_ARM64
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init_FIQ(FIQ_START);
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#endif
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return 0;
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}
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@@ -45,12 +45,15 @@
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#define MAIL1_WRT (ARM_0_MAIL1 + 0x00)
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#define MAIL1_STA (ARM_0_MAIL1 + 0x18)
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/* On ARCH_BCM270x these come through <linux/interrupt.h> (arm_control.h ) */
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#ifndef ARM_MS_FULL
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/* Status register: FIFO state. */
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#define ARM_MS_FULL BIT(31)
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#define ARM_MS_EMPTY BIT(30)
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/* Configuration register: Enable interrupts. */
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#define ARM_MC_IHAVEDATAIRQEN BIT(0)
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#endif
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struct bcm2835_mbox {
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void __iomem *regs;
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@@ -145,7 +148,7 @@ static int bcm2835_mbox_probe(struct platform_device *pdev)
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return -ENOMEM;
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spin_lock_init(&mbox->lock);
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ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
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ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
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bcm2835_mbox_irq, 0, dev_name(dev), mbox);
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if (ret) {
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dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
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@@ -195,7 +198,18 @@ static struct platform_driver bcm2835_mbox_driver = {
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},
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.probe = bcm2835_mbox_probe,
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};
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module_platform_driver(bcm2835_mbox_driver);
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static int __init bcm2835_mbox_init(void)
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{
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return platform_driver_register(&bcm2835_mbox_driver);
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}
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arch_initcall(bcm2835_mbox_init);
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static void __init bcm2835_mbox_exit(void)
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{
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platform_driver_unregister(&bcm2835_mbox_driver);
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}
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module_exit(bcm2835_mbox_exit);
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MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
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MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");
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