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ARM: tegra: select required CPU and L2 errata options
commit f35b431dde upstream.
The ARM IP revisions in Tegra are:
Tegra20: CPU r1p1, PL310 r2p0
Tegra30: CPU A01=r2p7/>=A02=r2p9, NEON r2p3-50, PL310 r3p1-50
Based on work by Olof Johansson, although the actual list of errata is
somewhat different here, since I added a bunch more and removed one PL310
erratum that doesn't seem applicable.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
d27e4c282e
commit
83e4194644
@@ -13,6 +13,13 @@ config ARCH_TEGRA_2x_SOC
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select USB_ARCH_HAS_EHCI if USB_SUPPORT
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select USB_ULPI if USB_SUPPORT
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select USB_ULPI_VIEWPORT if USB_SUPPORT
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select ARM_ERRATA_720789
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select ARM_ERRATA_742230
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select ARM_ERRATA_751472
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select ARM_ERRATA_754327
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select ARM_ERRATA_764369
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select PL310_ERRATA_727915 if CACHE_L2X0
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select PL310_ERRATA_769419 if CACHE_L2X0
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help
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Support for NVIDIA Tegra AP20 and T20 processors, based on the
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ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
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@@ -54,6 +61,11 @@ config MACH_SEABOARD
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config MACH_TEGRA_DT
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bool "Generic Tegra board (FDT support)"
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select USE_OF
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select ARM_ERRATA_743622
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select ARM_ERRATA_751472
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select ARM_ERRATA_754322
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select ARM_ERRATA_764369
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select PL310_ERRATA_769419 if CACHE_L2X0
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help
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Support for generic nVidia Tegra boards using Flattened Device Tree
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