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mmc: sdhci: extend maximum ADMA transfer length to 4MiB

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This gains about 8-12% sequential write speed with the fastest SD/eMMC
cards, and Class A1/A2 card sequential performance is only assured with
a 4MiB write length.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
This commit is contained in:
Jonathan Bell
2024-06-04 13:45:37 +01:00
committed by Dom Cobley
parent 5669c6ad87
commit 87780dcbdb
1 changed files with 10 additions and 5 deletions
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15
drivers/mmc/host/sdhci.c
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@@ -1084,7 +1084,7 @@ void sdhci_initialize_data(struct sdhci_host *host, struct mmc_data *data)
WARN_ON(host->data);
/* Sanity checks */
BUG_ON(data->blksz * data->blocks > 524288);
BUG_ON(data->blksz * data->blocks > host->mmc->max_req_size);
BUG_ON(data->blksz > host->mmc->max_blk_size);
BUG_ON(data->blocks > 65535);
@@ -4762,11 +4762,16 @@ int sdhci_setup_host(struct sdhci_host *host)
spin_lock_init(&host->lock);
/*
* Maximum number of sectors in one transfer. Limited by SDMA boundary
* size (512KiB). Note some tuning modes impose a 4MiB limit, but this
* is less anyway.
* Maximum number of sectors in one transfer.
* 4MiB is preferred for multi-descriptor DMA as a) card sequential
* write speeds are only guaranteed with a 4MiB write length and
* b) most tuning modes require a 4MiB limit.
* SDMA has a 512KiB boundary size.
*/
mmc->max_req_size = 524288;
if (host->flags & SDHCI_USE_ADMA)
mmc->max_req_size = SZ_4M;
else
mmc->max_req_size = SZ_512K;
/*
* Maximum number of segments. Depends on if the hardware