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ARM: dts: imx6dl-plym2m: configure ethernet reference clock parent

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On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Oleksij Rempel
2023-01-31 09:46:31 +01:00
committed by Shawn Guo
parent 5417c655b9
commit 887185649c
1 changed files with 8 additions and 4 deletions
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12
arch/arm/boot/dts/imx6dl-plym2m.dts
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@@ -84,6 +84,7 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "enet_ref_pad";
};
reg_3v3: regulator-3v3 {
@@ -173,6 +174,13 @@
status = "okay";
};
&clks {
clocks = <&clk50m_phy>;
clock-names = "enet_ref_pad";
assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
assigned-clock-parents = <&clk50m_phy>;
};
&ecspi1 {
cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@@ -254,10 +262,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clk50m_phy>;
clock-names = "ipg", "ahb", "ptp";
phy-handle = <&rgmii_phy>;
status = "okay";