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ARM: LPC32xx: Fix interrupt controller init
commit 35dd0a75d4 upstream.
This patch fixes the initialization of the interrupt controller of the LPC32xx
by correctly setting up SIC1 and SIC2 instead of (wrongly) using the same value
as for the Main Interrupt Controller (MIC).
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
bd4789a33a
commit
aef5ebd137
@@ -389,13 +389,15 @@ void __init lpc32xx_init_irq(void)
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/* Setup SIC1 */
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__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
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__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
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__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
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__raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
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__raw_writel(SIC1_ATR_DEFAULT,
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LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
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/* Setup SIC2 */
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__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
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__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
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__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
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__raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
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__raw_writel(SIC2_ATR_DEFAULT,
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LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
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/* Configure supported IRQ's */
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for (i = 0; i < NR_IRQS; i++) {
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