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Merge tag 'v6.18-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Regulator/supply fixes for a number of boards, removed too fast cpu OPPs from rk3576 (not supported in newer vendor TF-A and never supported in upstream TF-A). As well as some DTS validation fixes and one pinctrl fix for the odroid-m1. * tag 'v6.18-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: fix PCIe 3.3V regulator voltage on orangepi-5 arm64: dts: rockchip: disable HS400 on RK3588 Tiger arm64: dts: rockchip: drop reset from rk3576 i2c9 node arm64: dts: rockchip: Fix USB power enable pin for BTT CB2 and Pi2 arm64: dts: rockchip: Fix vccio4-supply on rk3566-pinetab2 arm64: dts: rockchip: include rk3399-base instead of rk3399 in rk3399-op1 arm64: dts: rockchip: Fix indentation on rk3399 haikou demo dtso arm64: dts: rockchip: Make RK3588 GPU OPP table naming less generic arm64: dts: rockchip: Drop 'rockchip,grf' prop from tsadc on rk3328 arm64: dts: rockchip: Remove non-functioning CPU OPPs from RK3576 arm64: dts: rockchip: Fix PCIe power enable pin for BigTreeTech CB2 and Pi2 arm64: dts: rockchip: Set correct pinctrl for I2S1 8ch TX on odroid-m1 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -598,7 +598,6 @@
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pinctrl-2 = <&otp_pin>;
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resets = <&cru SRST_TSADC>;
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reset-names = "tsadc-apb";
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rockchip,grf = <&grf>;
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rockchip,hw-tshut-temp = <100000>;
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#thermal-sensor-cells = <1>;
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status = "disabled";
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@@ -3,7 +3,7 @@
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* Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#include "rk3399.dtsi"
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#include "rk3399-base.dtsi"
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/ {
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cluster0_opp: opp-table-0 {
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@@ -45,11 +45,11 @@
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cam_dovdd_1v8: regulator-cam-dovdd-1v8 {
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compatible = "regulator-fixed";
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gpio = <&pca9670 3 GPIO_ACTIVE_LOW>;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-name = "cam-dovdd-1v8";
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vin-supply = <&vcc1v8_video>;
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gpio = <&pca9670 3 GPIO_ACTIVE_LOW>;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-name = "cam-dovdd-1v8";
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vin-supply = <&vcc1v8_video>;
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};
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cam_dvdd_1v2: regulator-cam-dvdd-1v2 {
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@@ -120,7 +120,7 @@
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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enable-active-high;
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gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
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gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_drv>;
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regulator-always-on;
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@@ -187,7 +187,7 @@
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vcc5v0_usb2b: regulator-vcc5v0-usb2b {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_usb2b_en>;
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regulator-name = "vcc5v0_usb2b";
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@@ -199,7 +199,7 @@
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vcc5v0_usb2t: regulator-vcc5v0-usb2t {
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compatible = "regulator-fixed";
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enable-active-high;
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gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
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gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_usb2t_en>;
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regulator-name = "vcc5v0_usb2t";
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@@ -789,7 +789,7 @@
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vccio1-supply = <&vccio_acodec>;
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vccio2-supply = <&vcc_1v8>;
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vccio3-supply = <&vccio_sd>;
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vccio4-supply = <&vcc_1v8>;
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vccio4-supply = <&vcca1v8_pmu>;
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vccio5-supply = <&vcc_1v8>;
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vccio6-supply = <&vcc1v8_dvp>;
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vccio7-supply = <&vcc_3v3>;
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@@ -482,6 +482,8 @@
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};
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&i2s1_8ch {
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
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rockchip,trcm-sync-tx-only;
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status = "okay";
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};
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@@ -276,12 +276,6 @@
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opp-microvolt = <900000 900000 950000>;
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clock-latency-ns = <40000>;
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};
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opp-2208000000 {
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opp-hz = /bits/ 64 <2208000000>;
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opp-microvolt = <950000 950000 950000>;
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clock-latency-ns = <40000>;
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};
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};
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cluster1_opp_table: opp-table-cluster1 {
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@@ -348,12 +342,6 @@
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opp-microvolt = <925000 925000 950000>;
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clock-latency-ns = <40000>;
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};
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opp-2304000000 {
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opp-hz = /bits/ 64 <2304000000>;
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opp-microvolt = <950000 950000 950000>;
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clock-latency-ns = <40000>;
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};
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};
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gpu_opp_table: opp-table-gpu {
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@@ -2561,8 +2549,6 @@
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c9m0_xfer>;
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resets = <&cru SRST_I2C9>, <&cru SRST_P_I2C9>;
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reset-names = "i2c", "apb";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@@ -115,7 +115,7 @@
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};
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};
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gpu_opp_table: opp-table {
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gpu_opp_table: opp-table-gpu {
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compatible = "operating-points-v2";
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opp-300000000 {
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@@ -382,14 +382,12 @@
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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mmc-pwrseq = <&emmc_pwrseq>;
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no-sdio;
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no-sd;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>;
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pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk>;
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vmmc-supply = <&vcc_3v3_s3>;
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vqmmc-supply = <&vcc_1v8_s3>;
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status = "okay";
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@@ -66,7 +66,7 @@
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};
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};
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gpu_opp_table: opp-table {
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gpu_opp_table: opp-table-gpu {
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compatible = "operating-points-v2";
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opp-300000000 {
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@@ -14,8 +14,8 @@
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gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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regulator-name = "vcc3v3_pcie20";
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <50000>;
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vin-supply = <&vcc5v0_sys>;
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};
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