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BCM270x: dma: Remove driver
Remove dma.c driver which is now merged with bcm2708-dmaengine. Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
This commit is contained in:
Noralf Trønnes
committed by
popcornmix
popcornmix
parent
eb5eb47acf
commit
c4c93b3ca7
@@ -1,409 +0,0 @@
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/*
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* linux/arch/arm/mach-bcm2708/dma.c
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*
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* Copyright (C) 2010 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/slab.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/scatterlist.h>
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#include <mach/dma.h>
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#include <mach/irqs.h>
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/*****************************************************************************\
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* *
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* Configuration *
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* *
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\*****************************************************************************/
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#define CACHE_LINE_MASK 31
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#define DRIVER_NAME BCM_DMAMAN_DRIVER_NAME
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#define DEFAULT_DMACHAN_BITMAP 0x10 /* channel 4 only */
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/* valid only for channels 0 - 14, 15 has its own base address */
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#define BCM2708_DMA_CHAN(n) ((n)<<8) /* base address */
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#define BCM2708_DMA_CHANIO(dma_base, n) \
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((void __iomem *)((char *)(dma_base)+BCM2708_DMA_CHAN(n)))
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/*****************************************************************************\
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* *
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* DMA Auxilliary Functions *
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* *
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\*****************************************************************************/
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/* A DMA buffer on an arbitrary boundary may separate a cache line into a
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section inside the DMA buffer and another section outside it.
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Even if we flush DMA buffers from the cache there is always the chance that
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during a DMA someone will access the part of a cache line that is outside
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the DMA buffer - which will then bring in unwelcome data.
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Without being able to dictate our own buffer pools we must insist that
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DMA buffers consist of a whole number of cache lines.
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*/
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extern int
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bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len)
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{
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int i;
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for (i = 0; i < sg_len; i++) {
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if (sg_ptr[i].offset & CACHE_LINE_MASK ||
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sg_ptr[i].length & CACHE_LINE_MASK)
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return 0;
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}
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return 1;
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}
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EXPORT_SYMBOL_GPL(bcm_sg_suitable_for_dma);
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extern void
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bcm_dma_start(void __iomem *dma_chan_base, dma_addr_t control_block)
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{
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dsb(); /* ARM data synchronization (push) operation */
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writel(control_block, dma_chan_base + BCM2708_DMA_ADDR);
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writel(BCM2708_DMA_ACTIVE, dma_chan_base + BCM2708_DMA_CS);
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}
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extern void bcm_dma_wait_idle(void __iomem *dma_chan_base)
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{
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dsb();
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/* ugly busy wait only option for now */
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while (readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE)
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cpu_relax();
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}
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EXPORT_SYMBOL_GPL(bcm_dma_start);
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extern bool bcm_dma_is_busy(void __iomem *dma_chan_base)
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{
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dsb();
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return readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE;
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}
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EXPORT_SYMBOL_GPL(bcm_dma_is_busy);
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/* Complete an ongoing DMA (assuming its results are to be ignored)
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Does nothing if there is no DMA in progress.
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This routine waits for the current AXI transfer to complete before
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terminating the current DMA. If the current transfer is hung on a DREQ used
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by an uncooperative peripheral the AXI transfer may never complete. In this
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case the routine times out and return a non-zero error code.
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Use of this routine doesn't guarantee that the ongoing or aborted DMA
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does not produce an interrupt.
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*/
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extern int
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bcm_dma_abort(void __iomem *dma_chan_base)
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{
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unsigned long int cs;
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int rc = 0;
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cs = readl(dma_chan_base + BCM2708_DMA_CS);
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if (BCM2708_DMA_ACTIVE & cs) {
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long int timeout = 10000;
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/* write 0 to the active bit - pause the DMA */
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writel(0, dma_chan_base + BCM2708_DMA_CS);
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/* wait for any current AXI transfer to complete */
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while (0 != (cs & BCM2708_DMA_ISPAUSED) && --timeout >= 0)
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cs = readl(dma_chan_base + BCM2708_DMA_CS);
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if (0 != (cs & BCM2708_DMA_ISPAUSED)) {
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/* we'll un-pause when we set of our next DMA */
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rc = -ETIMEDOUT;
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} else if (BCM2708_DMA_ACTIVE & cs) {
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/* terminate the control block chain */
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writel(0, dma_chan_base + BCM2708_DMA_NEXTCB);
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/* abort the whole DMA */
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writel(BCM2708_DMA_ABORT | BCM2708_DMA_ACTIVE,
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dma_chan_base + BCM2708_DMA_CS);
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}
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}
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return rc;
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}
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EXPORT_SYMBOL_GPL(bcm_dma_abort);
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/***************************************************************************** \
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* *
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* DMA Manager Device Methods *
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* *
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\*****************************************************************************/
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struct vc_dmaman {
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void __iomem *dma_base;
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u32 chan_available; /* bitmap of available channels */
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u32 has_feature[BCM_DMA_FEATURE_COUNT]; /* bitmap of feature presence */
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};
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static void vc_dmaman_init(struct vc_dmaman *dmaman, void __iomem *dma_base,
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u32 chans_available)
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{
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dmaman->dma_base = dma_base;
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dmaman->chan_available = chans_available;
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dmaman->has_feature[BCM_DMA_FEATURE_FAST_ORD] = 0x0c; /* chans 2 & 3 */
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dmaman->has_feature[BCM_DMA_FEATURE_BULK_ORD] = 0x01; /* chan 0 */
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dmaman->has_feature[BCM_DMA_FEATURE_NORMAL_ORD] = 0xfe; /* chans 1 to 7 */
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dmaman->has_feature[BCM_DMA_FEATURE_LITE_ORD] = 0x7f00; /* chans 8 to 14 */
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}
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static int vc_dmaman_chan_alloc(struct vc_dmaman *dmaman,
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unsigned preferred_feature_set)
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{
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u32 chans;
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int feature;
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chans = dmaman->chan_available;
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for (feature = 0; feature < BCM_DMA_FEATURE_COUNT; feature++)
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/* select the subset of available channels with the desired
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feature so long as some of the candidate channels have that
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feature */
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if ((preferred_feature_set & (1 << feature)) &&
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(chans & dmaman->has_feature[feature]))
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chans &= dmaman->has_feature[feature];
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if (chans) {
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int chan = 0;
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/* return the ordinal of the first channel in the bitmap */
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while (chans != 0 && (chans & 1) == 0) {
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chans >>= 1;
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chan++;
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}
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/* claim the channel */
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dmaman->chan_available &= ~(1 << chan);
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return chan;
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} else
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return -ENOMEM;
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}
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static int vc_dmaman_chan_free(struct vc_dmaman *dmaman, int chan)
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{
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if (chan < 0)
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return -EINVAL;
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else if ((1 << chan) & dmaman->chan_available)
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return -EIDRM;
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else {
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dmaman->chan_available |= (1 << chan);
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return 0;
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}
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}
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/*****************************************************************************\
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* *
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* DMA IRQs *
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* *
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\*****************************************************************************/
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static unsigned char bcm_dma_irqs[] = {
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IRQ_DMA0,
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IRQ_DMA1,
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IRQ_DMA2,
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IRQ_DMA3,
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IRQ_DMA4,
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IRQ_DMA5,
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IRQ_DMA6,
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IRQ_DMA7,
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IRQ_DMA8,
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IRQ_DMA9,
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IRQ_DMA10,
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IRQ_DMA11,
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IRQ_DMA12
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};
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/***************************************************************************** \
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* *
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* DMA Manager Monitor *
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* *
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\*****************************************************************************/
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static struct device *dmaman_dev; /* we assume there's only one! */
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extern int bcm_dma_chan_alloc(unsigned preferred_feature_set,
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void __iomem **out_dma_base, int *out_dma_irq)
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{
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if (!dmaman_dev)
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return -ENODEV;
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else {
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struct vc_dmaman *dmaman = dev_get_drvdata(dmaman_dev);
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int rc;
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device_lock(dmaman_dev);
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rc = vc_dmaman_chan_alloc(dmaman, preferred_feature_set);
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if (rc >= 0) {
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*out_dma_base = BCM2708_DMA_CHANIO(dmaman->dma_base,
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rc);
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*out_dma_irq = bcm_dma_irqs[rc];
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}
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device_unlock(dmaman_dev);
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return rc;
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}
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}
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EXPORT_SYMBOL_GPL(bcm_dma_chan_alloc);
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extern int bcm_dma_chan_free(int channel)
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{
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if (dmaman_dev) {
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struct vc_dmaman *dmaman = dev_get_drvdata(dmaman_dev);
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int rc;
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device_lock(dmaman_dev);
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rc = vc_dmaman_chan_free(dmaman, channel);
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device_unlock(dmaman_dev);
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return rc;
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} else
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return -ENODEV;
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}
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EXPORT_SYMBOL_GPL(bcm_dma_chan_free);
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static int dev_dmaman_register(const char *dev_name, struct device *dev)
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{
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int rc = dmaman_dev ? -EINVAL : 0;
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dmaman_dev = dev;
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return rc;
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}
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static void dev_dmaman_deregister(const char *dev_name, struct device *dev)
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{
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dmaman_dev = NULL;
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}
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/*****************************************************************************\
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* *
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* DMA Device *
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* *
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\*****************************************************************************/
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static int dmachans = -1; /* module parameter */
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static int bcm_dmaman_probe(struct platform_device *pdev)
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{
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int ret = 0;
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struct vc_dmaman *dmaman;
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struct resource *dma_res = NULL;
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void __iomem *dma_base = NULL;
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int have_dma_region = 0;
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dmaman = kzalloc(sizeof(*dmaman), GFP_KERNEL);
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if (NULL == dmaman) {
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printk(KERN_ERR DRIVER_NAME ": failed to allocate "
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"DMA management memory\n");
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ret = -ENOMEM;
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} else {
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dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (dma_res == NULL) {
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printk(KERN_ERR DRIVER_NAME ": failed to obtain memory "
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"resource\n");
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ret = -ENODEV;
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} else if (!request_mem_region(dma_res->start,
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resource_size(dma_res),
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DRIVER_NAME)) {
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dev_err(&pdev->dev, "cannot obtain DMA region\n");
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ret = -EBUSY;
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} else {
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have_dma_region = 1;
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dma_base = ioremap(dma_res->start,
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resource_size(dma_res));
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if (!dma_base) {
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dev_err(&pdev->dev, "cannot map DMA region\n");
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ret = -ENOMEM;
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} else {
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/* use module parameter if one was provided */
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if (dmachans > 0)
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vc_dmaman_init(dmaman, dma_base,
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dmachans);
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else
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vc_dmaman_init(dmaman, dma_base,
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DEFAULT_DMACHAN_BITMAP);
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platform_set_drvdata(pdev, dmaman);
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dev_dmaman_register(DRIVER_NAME, &pdev->dev);
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printk(KERN_INFO DRIVER_NAME ": DMA manager "
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"at %p\n", dma_base);
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}
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}
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}
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if (ret != 0) {
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if (dma_base)
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iounmap(dma_base);
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if (dma_res && have_dma_region)
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release_mem_region(dma_res->start,
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resource_size(dma_res));
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if (dmaman)
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kfree(dmaman);
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}
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return ret;
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}
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static int bcm_dmaman_remove(struct platform_device *pdev)
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{
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struct vc_dmaman *dmaman = platform_get_drvdata(pdev);
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platform_set_drvdata(pdev, NULL);
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dev_dmaman_deregister(DRIVER_NAME, &pdev->dev);
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kfree(dmaman);
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return 0;
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}
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static struct platform_driver bcm_dmaman_driver = {
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.probe = bcm_dmaman_probe,
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.remove = bcm_dmaman_remove,
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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},
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};
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/*****************************************************************************\
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* *
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* Driver init/exit *
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* *
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\*****************************************************************************/
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static int __init bcm_dmaman_drv_init(void)
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{
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int ret;
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ret = platform_driver_register(&bcm_dmaman_driver);
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if (ret != 0) {
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printk(KERN_ERR DRIVER_NAME ": failed to register "
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"on platform\n");
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}
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return ret;
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}
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static void __exit bcm_dmaman_drv_exit(void)
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{
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platform_driver_unregister(&bcm_dmaman_driver);
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}
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module_init(bcm_dmaman_drv_init);
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module_exit(bcm_dmaman_drv_exit);
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module_param(dmachans, int, 0644);
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MODULE_AUTHOR("Gray Girling <grayg@broadcom.com>");
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MODULE_DESCRIPTION("DMA channel manager driver");
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MODULE_LICENSE("GPL");
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MODULE_PARM_DESC(dmachans, "Bitmap of DMA channels available to the ARM");
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@@ -1,409 +0,0 @@
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/*
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* linux/arch/arm/mach-bcm2708/dma.c
|
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*
|
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* Copyright (C) 2010 Broadcom
|
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*
|
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
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*/
|
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#include <linux/slab.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/scatterlist.h>
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#include <mach/dma.h>
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#include <mach/irqs.h>
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/*****************************************************************************\
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* *
|
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* Configuration *
|
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* *
|
||||
\*****************************************************************************/
|
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#define CACHE_LINE_MASK 31
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#define DRIVER_NAME BCM_DMAMAN_DRIVER_NAME
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#define DEFAULT_DMACHAN_BITMAP 0x10 /* channel 4 only */
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/* valid only for channels 0 - 14, 15 has its own base address */
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#define BCM2708_DMA_CHAN(n) ((n)<<8) /* base address */
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#define BCM2708_DMA_CHANIO(dma_base, n) \
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((void __iomem *)((char *)(dma_base)+BCM2708_DMA_CHAN(n)))
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|
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|
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/*****************************************************************************\
|
||||
* *
|
||||
* DMA Auxilliary Functions *
|
||||
* *
|
||||
\*****************************************************************************/
|
||||
|
||||
/* A DMA buffer on an arbitrary boundary may separate a cache line into a
|
||||
section inside the DMA buffer and another section outside it.
|
||||
Even if we flush DMA buffers from the cache there is always the chance that
|
||||
during a DMA someone will access the part of a cache line that is outside
|
||||
the DMA buffer - which will then bring in unwelcome data.
|
||||
Without being able to dictate our own buffer pools we must insist that
|
||||
DMA buffers consist of a whole number of cache lines.
|
||||
*/
|
||||
|
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extern int
|
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bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len)
|
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{
|
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int i;
|
||||
|
||||
for (i = 0; i < sg_len; i++) {
|
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if (sg_ptr[i].offset & CACHE_LINE_MASK ||
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sg_ptr[i].length & CACHE_LINE_MASK)
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return 0;
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}
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return 1;
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}
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EXPORT_SYMBOL_GPL(bcm_sg_suitable_for_dma);
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extern void
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bcm_dma_start(void __iomem *dma_chan_base, dma_addr_t control_block)
|
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{
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dsb(); /* ARM data synchronization (push) operation */
|
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|
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writel(control_block, dma_chan_base + BCM2708_DMA_ADDR);
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writel(BCM2708_DMA_ACTIVE, dma_chan_base + BCM2708_DMA_CS);
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}
|
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extern void bcm_dma_wait_idle(void __iomem *dma_chan_base)
|
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{
|
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dsb();
|
||||
|
||||
/* ugly busy wait only option for now */
|
||||
while (readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE)
|
||||
cpu_relax();
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(bcm_dma_start);
|
||||
|
||||
extern bool bcm_dma_is_busy(void __iomem *dma_chan_base)
|
||||
{
|
||||
dsb();
|
||||
|
||||
return readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcm_dma_is_busy);
|
||||
|
||||
/* Complete an ongoing DMA (assuming its results are to be ignored)
|
||||
Does nothing if there is no DMA in progress.
|
||||
This routine waits for the current AXI transfer to complete before
|
||||
terminating the current DMA. If the current transfer is hung on a DREQ used
|
||||
by an uncooperative peripheral the AXI transfer may never complete. In this
|
||||
case the routine times out and return a non-zero error code.
|
||||
Use of this routine doesn't guarantee that the ongoing or aborted DMA
|
||||
does not produce an interrupt.
|
||||
*/
|
||||
extern int
|
||||
bcm_dma_abort(void __iomem *dma_chan_base)
|
||||
{
|
||||
unsigned long int cs;
|
||||
int rc = 0;
|
||||
|
||||
cs = readl(dma_chan_base + BCM2708_DMA_CS);
|
||||
|
||||
if (BCM2708_DMA_ACTIVE & cs) {
|
||||
long int timeout = 10000;
|
||||
|
||||
/* write 0 to the active bit - pause the DMA */
|
||||
writel(0, dma_chan_base + BCM2708_DMA_CS);
|
||||
|
||||
/* wait for any current AXI transfer to complete */
|
||||
while (0 != (cs & BCM2708_DMA_ISPAUSED) && --timeout >= 0)
|
||||
cs = readl(dma_chan_base + BCM2708_DMA_CS);
|
||||
|
||||
if (0 != (cs & BCM2708_DMA_ISPAUSED)) {
|
||||
/* we'll un-pause when we set of our next DMA */
|
||||
rc = -ETIMEDOUT;
|
||||
|
||||
} else if (BCM2708_DMA_ACTIVE & cs) {
|
||||
/* terminate the control block chain */
|
||||
writel(0, dma_chan_base + BCM2708_DMA_NEXTCB);
|
||||
|
||||
/* abort the whole DMA */
|
||||
writel(BCM2708_DMA_ABORT | BCM2708_DMA_ACTIVE,
|
||||
dma_chan_base + BCM2708_DMA_CS);
|
||||
}
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcm_dma_abort);
|
||||
|
||||
|
||||
/***************************************************************************** \
|
||||
* *
|
||||
* DMA Manager Device Methods *
|
||||
* *
|
||||
\*****************************************************************************/
|
||||
|
||||
struct vc_dmaman {
|
||||
void __iomem *dma_base;
|
||||
u32 chan_available; /* bitmap of available channels */
|
||||
u32 has_feature[BCM_DMA_FEATURE_COUNT]; /* bitmap of feature presence */
|
||||
};
|
||||
|
||||
static void vc_dmaman_init(struct vc_dmaman *dmaman, void __iomem *dma_base,
|
||||
u32 chans_available)
|
||||
{
|
||||
dmaman->dma_base = dma_base;
|
||||
dmaman->chan_available = chans_available;
|
||||
dmaman->has_feature[BCM_DMA_FEATURE_FAST_ORD] = 0x0c; /* chans 2 & 3 */
|
||||
dmaman->has_feature[BCM_DMA_FEATURE_BULK_ORD] = 0x01; /* chan 0 */
|
||||
dmaman->has_feature[BCM_DMA_FEATURE_NORMAL_ORD] = 0xfe; /* chans 1 to 7 */
|
||||
dmaman->has_feature[BCM_DMA_FEATURE_LITE_ORD] = 0x7f00; /* chans 8 to 14 */
|
||||
}
|
||||
|
||||
static int vc_dmaman_chan_alloc(struct vc_dmaman *dmaman,
|
||||
unsigned preferred_feature_set)
|
||||
{
|
||||
u32 chans;
|
||||
int feature;
|
||||
|
||||
chans = dmaman->chan_available;
|
||||
for (feature = 0; feature < BCM_DMA_FEATURE_COUNT; feature++)
|
||||
/* select the subset of available channels with the desired
|
||||
feature so long as some of the candidate channels have that
|
||||
feature */
|
||||
if ((preferred_feature_set & (1 << feature)) &&
|
||||
(chans & dmaman->has_feature[feature]))
|
||||
chans &= dmaman->has_feature[feature];
|
||||
|
||||
if (chans) {
|
||||
int chan = 0;
|
||||
/* return the ordinal of the first channel in the bitmap */
|
||||
while (chans != 0 && (chans & 1) == 0) {
|
||||
chans >>= 1;
|
||||
chan++;
|
||||
}
|
||||
/* claim the channel */
|
||||
dmaman->chan_available &= ~(1 << chan);
|
||||
return chan;
|
||||
} else
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
static int vc_dmaman_chan_free(struct vc_dmaman *dmaman, int chan)
|
||||
{
|
||||
if (chan < 0)
|
||||
return -EINVAL;
|
||||
else if ((1 << chan) & dmaman->chan_available)
|
||||
return -EIDRM;
|
||||
else {
|
||||
dmaman->chan_available |= (1 << chan);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************\
|
||||
* *
|
||||
* DMA IRQs *
|
||||
* *
|
||||
\*****************************************************************************/
|
||||
|
||||
static unsigned char bcm_dma_irqs[] = {
|
||||
IRQ_DMA0,
|
||||
IRQ_DMA1,
|
||||
IRQ_DMA2,
|
||||
IRQ_DMA3,
|
||||
IRQ_DMA4,
|
||||
IRQ_DMA5,
|
||||
IRQ_DMA6,
|
||||
IRQ_DMA7,
|
||||
IRQ_DMA8,
|
||||
IRQ_DMA9,
|
||||
IRQ_DMA10,
|
||||
IRQ_DMA11,
|
||||
IRQ_DMA12
|
||||
};
|
||||
|
||||
|
||||
/***************************************************************************** \
|
||||
* *
|
||||
* DMA Manager Monitor *
|
||||
* *
|
||||
\*****************************************************************************/
|
||||
|
||||
static struct device *dmaman_dev; /* we assume there's only one! */
|
||||
|
||||
extern int bcm_dma_chan_alloc(unsigned preferred_feature_set,
|
||||
void __iomem **out_dma_base, int *out_dma_irq)
|
||||
{
|
||||
if (!dmaman_dev)
|
||||
return -ENODEV;
|
||||
else {
|
||||
struct vc_dmaman *dmaman = dev_get_drvdata(dmaman_dev);
|
||||
int rc;
|
||||
|
||||
device_lock(dmaman_dev);
|
||||
rc = vc_dmaman_chan_alloc(dmaman, preferred_feature_set);
|
||||
if (rc >= 0) {
|
||||
*out_dma_base = BCM2708_DMA_CHANIO(dmaman->dma_base,
|
||||
rc);
|
||||
*out_dma_irq = bcm_dma_irqs[rc];
|
||||
}
|
||||
device_unlock(dmaman_dev);
|
||||
|
||||
return rc;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcm_dma_chan_alloc);
|
||||
|
||||
extern int bcm_dma_chan_free(int channel)
|
||||
{
|
||||
if (dmaman_dev) {
|
||||
struct vc_dmaman *dmaman = dev_get_drvdata(dmaman_dev);
|
||||
int rc;
|
||||
|
||||
device_lock(dmaman_dev);
|
||||
rc = vc_dmaman_chan_free(dmaman, channel);
|
||||
device_unlock(dmaman_dev);
|
||||
|
||||
return rc;
|
||||
} else
|
||||
return -ENODEV;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcm_dma_chan_free);
|
||||
|
||||
static int dev_dmaman_register(const char *dev_name, struct device *dev)
|
||||
{
|
||||
int rc = dmaman_dev ? -EINVAL : 0;
|
||||
dmaman_dev = dev;
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void dev_dmaman_deregister(const char *dev_name, struct device *dev)
|
||||
{
|
||||
dmaman_dev = NULL;
|
||||
}
|
||||
|
||||
/*****************************************************************************\
|
||||
* *
|
||||
* DMA Device *
|
||||
* *
|
||||
\*****************************************************************************/
|
||||
|
||||
static int dmachans = -1; /* module parameter */
|
||||
|
||||
static int bcm_dmaman_probe(struct platform_device *pdev)
|
||||
{
|
||||
int ret = 0;
|
||||
struct vc_dmaman *dmaman;
|
||||
struct resource *dma_res = NULL;
|
||||
void __iomem *dma_base = NULL;
|
||||
int have_dma_region = 0;
|
||||
|
||||
dmaman = kzalloc(sizeof(*dmaman), GFP_KERNEL);
|
||||
if (NULL == dmaman) {
|
||||
printk(KERN_ERR DRIVER_NAME ": failed to allocate "
|
||||
"DMA management memory\n");
|
||||
ret = -ENOMEM;
|
||||
} else {
|
||||
|
||||
dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (dma_res == NULL) {
|
||||
printk(KERN_ERR DRIVER_NAME ": failed to obtain memory "
|
||||
"resource\n");
|
||||
ret = -ENODEV;
|
||||
} else if (!request_mem_region(dma_res->start,
|
||||
resource_size(dma_res),
|
||||
DRIVER_NAME)) {
|
||||
dev_err(&pdev->dev, "cannot obtain DMA region\n");
|
||||
ret = -EBUSY;
|
||||
} else {
|
||||
have_dma_region = 1;
|
||||
dma_base = ioremap(dma_res->start,
|
||||
resource_size(dma_res));
|
||||
if (!dma_base) {
|
||||
dev_err(&pdev->dev, "cannot map DMA region\n");
|
||||
ret = -ENOMEM;
|
||||
} else {
|
||||
/* use module parameter if one was provided */
|
||||
if (dmachans > 0)
|
||||
vc_dmaman_init(dmaman, dma_base,
|
||||
dmachans);
|
||||
else
|
||||
vc_dmaman_init(dmaman, dma_base,
|
||||
DEFAULT_DMACHAN_BITMAP);
|
||||
|
||||
platform_set_drvdata(pdev, dmaman);
|
||||
dev_dmaman_register(DRIVER_NAME, &pdev->dev);
|
||||
|
||||
printk(KERN_INFO DRIVER_NAME ": DMA manager "
|
||||
"at %p\n", dma_base);
|
||||
}
|
||||
}
|
||||
}
|
||||
if (ret != 0) {
|
||||
if (dma_base)
|
||||
iounmap(dma_base);
|
||||
if (dma_res && have_dma_region)
|
||||
release_mem_region(dma_res->start,
|
||||
resource_size(dma_res));
|
||||
if (dmaman)
|
||||
kfree(dmaman);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int bcm_dmaman_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct vc_dmaman *dmaman = platform_get_drvdata(pdev);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
dev_dmaman_deregister(DRIVER_NAME, &pdev->dev);
|
||||
kfree(dmaman);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver bcm_dmaman_driver = {
|
||||
.probe = bcm_dmaman_probe,
|
||||
.remove = bcm_dmaman_remove,
|
||||
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
/*****************************************************************************\
|
||||
* *
|
||||
* Driver init/exit *
|
||||
* *
|
||||
\*****************************************************************************/
|
||||
|
||||
static int __init bcm_dmaman_drv_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = platform_driver_register(&bcm_dmaman_driver);
|
||||
if (ret != 0) {
|
||||
printk(KERN_ERR DRIVER_NAME ": failed to register "
|
||||
"on platform\n");
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit bcm_dmaman_drv_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&bcm_dmaman_driver);
|
||||
}
|
||||
|
||||
module_init(bcm_dmaman_drv_init);
|
||||
module_exit(bcm_dmaman_drv_exit);
|
||||
|
||||
module_param(dmachans, int, 0644);
|
||||
|
||||
MODULE_AUTHOR("Gray Girling <grayg@broadcom.com>");
|
||||
MODULE_DESCRIPTION("DMA channel manager driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
MODULE_PARM_DESC(dmachans, "Bitmap of DMA channels available to the ARM");
|
||||
Reference in New Issue
Block a user