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drm/amd/display: Make sure to reprogram ODM when resync fifo
Need to reconfigure ODM when resyncing FIFO because on OTG disable we clear all ODM programming Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -379,8 +379,25 @@ void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc
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for (i = 0; i < dc->res_pool->pipe_count; i++) {
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pipe = &dc->current_state->res_ctx.pipe_ctx[i];
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if (otg_disabled[i])
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if (otg_disabled[i]) {
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int opp_inst[MAX_PIPES] = { pipe->stream_res.opp->inst };
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int opp_cnt = 1;
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int last_odm_slice_width = resource_get_odm_slice_dst_width(pipe, true);
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int odm_slice_width = resource_get_odm_slice_dst_width(pipe, false);
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struct pipe_ctx *odm_pipe;
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for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) {
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opp_inst[opp_cnt] = odm_pipe->stream_res.opp->inst;
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opp_cnt++;
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}
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if (opp_cnt > 1)
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pipe->stream_res.tg->funcs->set_odm_combine(
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pipe->stream_res.tg,
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opp_inst, opp_cnt,
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odm_slice_width,
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last_odm_slice_width);
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pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
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}
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}
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}
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@@ -1237,8 +1237,25 @@ void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_
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for (i = 0; i < dc->res_pool->pipe_count; i++) {
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pipe = &dc->current_state->res_ctx.pipe_ctx[i];
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if (otg_disabled[i])
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if (otg_disabled[i]) {
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int opp_inst[MAX_PIPES] = { pipe->stream_res.opp->inst };
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int opp_cnt = 1;
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int last_odm_slice_width = resource_get_odm_slice_dst_width(pipe, true);
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int odm_slice_width = resource_get_odm_slice_dst_width(pipe, false);
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struct pipe_ctx *odm_pipe;
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for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) {
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opp_inst[opp_cnt] = odm_pipe->stream_res.opp->inst;
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opp_cnt++;
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}
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if (opp_cnt > 1)
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pipe->stream_res.tg->funcs->set_odm_combine(
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pipe->stream_res.tg,
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opp_inst, opp_cnt,
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odm_slice_width,
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last_odm_slice_width);
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pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
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}
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}
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}
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